llvm-mirror/docs/AMDGPU/gfx9_vdata_7.rst

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.. _amdgpu_synid_gfx9_vdata_7:

vdata
=====

Image data to store by an *image_store* instruction.

*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` which may specify from 1 to 4 data elements. Each data element occupies 1 dword.

*Operands:* :ref:`v<amdgpu_synid_v>`
[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368 2018-12-17 18:38:11 +01:00			`..`
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[AMDGPU][MC][GFX9][NFC][DOC] Updated AMD GPU assembler syntax description. Fixed bugs 48639, 49447, 49448, 49449. 2021-07-23 11:51:37 +02:00			`.. _amdgpu_synid_gfx9_vdata_7:`
[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368 2018-12-17 18:38:11 +01:00
			`vdata`
[AMDGPU][MC][GFX9][NFC][DOC] Updated AMD GPU assembler syntax description. Fixed bugs 48639, 49447, 49448, 49449. 2021-07-23 11:51:37 +02:00			`=====`
[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368 2018-12-17 18:38:11 +01:00
			`Image data to store by an image_store instruction.`

			Size: depends on :ref:`dmask<amdgpu_synid_dmask>` which may specify from 1 to 4 data elements. Each data element occupies 1 dword.

			Operands: :ref:`v<amdgpu_synid_v>`