2010-12-15 23:14:01 +01:00
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s
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2010-11-11 22:15:47 +01:00
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.code 16
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vmul.i8 d16, d16, d17
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vmul.i16 d16, d16, d17
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vmul.i32 d16, d16, d17
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vmul.f32 d16, d16, d17
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vmul.i8 q8, q8, q9
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vmul.i16 q8, q8, q9
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vmul.i32 q8, q8, q9
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vmul.f32 q8, q8, q9
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vmul.p8 d16, d16, d17
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vmul.p8 q8, q8, q9
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2011-10-18 20:01:52 +02:00
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vmul.i16 d18, d8, d0[3]
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2011-10-18 20:05:16 +02:00
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@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x09]
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@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x09]
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@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x09]
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@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x0d]
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@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x09]
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@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x09]
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@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x09]
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@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x0d]
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@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x09]
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@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x09]
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@ CHECK: vmul.i16 d18, d8, d0[3] @ encoding: [0xd8,0xef,0x68,0x28]
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2010-11-11 22:15:47 +01:00
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vqdmulh.s16 d16, d16, d17
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vqdmulh.s32 d16, d16, d17
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vqdmulh.s16 q8, q8, q9
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vqdmulh.s32 q8, q8, q9
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2011-10-18 20:12:09 +02:00
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vqdmulh.s16 d11, d2, d3[0]
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2011-10-18 20:05:16 +02:00
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@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x0b]
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@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x0b]
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@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x0b]
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@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x0b]
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2011-10-18 20:12:09 +02:00
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@ CHECK: vqdmulh.s16 d11, d2, d3[0] @ encoding: [0x92,0xef,0x43,0xbc]
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2011-10-18 20:05:16 +02:00
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2010-11-11 22:15:47 +01:00
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vqrdmulh.s16 d16, d16, d17
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vqrdmulh.s32 d16, d16, d17
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vqrdmulh.s16 q8, q8, q9
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vqrdmulh.s32 q8, q8, q9
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2011-10-18 20:05:16 +02:00
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@ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x0b]
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@ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x0b]
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@ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x0b]
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@ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x0b]
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2010-11-11 22:15:47 +01:00
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vmull.s8 q8, d16, d17
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vmull.s16 q8, d16, d17
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vmull.s32 q8, d16, d17
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vmull.u8 q8, d16, d17
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vmull.u16 q8, d16, d17
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vmull.u32 q8, d16, d17
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vmull.p8 q8, d16, d17
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2011-10-18 20:05:16 +02:00
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@ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xc0,0xef,0xa1,0x0c]
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@ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xd0,0xef,0xa1,0x0c]
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@ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0c]
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@ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xc0,0xff,0xa1,0x0c]
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@ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xd0,0xff,0xa1,0x0c]
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@ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xe0,0xff,0xa1,0x0c]
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@ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xc0,0xef,0xa1,0x0e]
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2010-11-11 22:15:47 +01:00
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vqdmull.s16 q8, d16, d17
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vqdmull.s32 q8, d16, d17
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2011-12-21 00:20:00 +01:00
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vqdmull.s16 q1, d7, d1[1]
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2011-10-18 19:50:22 +02:00
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2011-10-18 20:05:16 +02:00
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@ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xd0,0xef,0xa1,0x0d]
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@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0d]
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2011-12-21 00:20:00 +01:00
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@ CHECK: vqdmull.s16 q1, d7, d1[1] @ encoding: [0x97,0xef,0x49,0x2b]
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2011-10-18 20:23:03 +02:00
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