llvm-mirror/test/CodeGen/Thumb2/thumb2-sub5.ll

; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+32bit %s -o - \
; RUN:  | FileCheck %s

define i64 @f1(i64 %a, i64 %b) {
; CHECK-LABEL: f1:
; CHECK: subs.w r0, r0, r2
; To test dead_carry, +32bit prevents sbc conveting to 16-bit sbcs
; CHECK: sbc.w  r1, r1, r3
    %tmp = sub i64 %a, %b
    ret i64 %tmp
}
ARM: yet another round of ARM test clean ups llvm-svn: 205586 2014-04-04 01:47:24 +02:00			`; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+32bit %s -o - \`
Enabling thumb2 mode used to force support for armv6t2. Replace this with a temporary assertion and adjust the various test cases. llvm-svn: 197224 2013-12-13 12:16:00 +01:00			`; RUN: \| FileCheck %s`
Thumb-2 tests llvm-svn: 74464 2009-06-30 00:25:22 +02:00
			`define i64 @f1(i64 %a, i64 %b) {`
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name ".ll" \| \ while read NAME; do echo "$NAME" if ! grep -q "^; RUN: llc.debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]@\([A-Za-z0-9_]\)(.$/\1/p" < $NAME \| \ while read FUNC; do sed -i '' "s/;\(.\)\([A-Za-z0-9_-]\):\( \)$FUNC: \$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280 2013-07-14 08:24:09 +02:00			`; CHECK-LABEL: f1:`
Thumb2 and ARM add/subtract with carry fixes. Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). llvm-svn: 130048 2011-04-23 05:55:32 +02:00			`; CHECK: subs.w r0, r0, r2`
			`; To test dead_carry, +32bit prevents sbc conveting to 16-bit sbcs`
			`; CHECK: sbc.w r1, r1, r3`
Thumb-2 tests llvm-svn: 74464 2009-06-30 00:25:22 +02:00			`%tmp = sub i64 %a, %b`
			`ret i64 %tmp`
			`}`