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AArch64
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[AArch64] Refactor instructions using SIMD immediates
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2018-02-20 20:31:45 +00:00 |
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AMDGPU
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AMDGPU: Do not combine loads/store across physreg defs
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2018-02-21 13:31:35 +00:00 |
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ARC
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ARM
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Recommit: [ARM] f16 constant pool fix
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2018-02-22 10:43:57 +00:00 |
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AVR
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[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
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2018-02-09 00:10:31 +00:00 |
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BPF
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[BPF] Return true in enableMultipleCopyHints().
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2018-02-18 10:09:54 +00:00 |
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Generic
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Made test dbg_value_fastisel.ll specific to AArch64 fast-isel.
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2018-02-17 17:43:24 +00:00 |
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Hexagon
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[Hexagon] Return true in enableMultipleCopyHints().
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2018-02-21 16:37:45 +00:00 |
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Inputs
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Lanai
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Mips
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[mips] Generate memory dependencies for byVal arguments
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2018-02-22 13:40:42 +00:00 |
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MIR
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[GISel]: Verify COPIES involving generic registers.
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2018-02-09 01:27:23 +00:00 |
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MSP430
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Nios2
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NVPTX
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[DAGCombiner] Call ExtendUsesToFormExtLoad in (zext (and (load)))->(and (zextload)) even when the and does not have multiple uses
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2018-02-15 20:20:32 +00:00 |
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PowerPC
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[PowerPC] Do not produce invalid CTR loop with an FRem
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2018-02-22 03:02:41 +00:00 |
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RISCV
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[RISCV] Revert r324172 now r323991 was reverted
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2018-02-17 18:17:47 +00:00 |
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SPARC
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[Sparc] Include __tls_get_addr in symbol table for TLS calls to it
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2018-02-21 15:25:26 +00:00 |
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SystemZ
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Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
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2018-02-17 03:05:33 +00:00 |
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Thumb
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[ARM] Fix issue with large xor constants.
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2018-02-22 09:38:57 +00:00 |
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Thumb2
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[ARM] Return true in enableMultipleCopyHints().
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2018-02-16 09:51:01 +00:00 |
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WebAssembly
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[WebAssembly] Add mechanisms for specifying an explicit import module name.
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2018-02-09 23:13:22 +00:00 |
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WinCFGuard
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WinEH
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X86
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[X86][AVX512] Add DQ+VLX scalar int<->fp tests cases for D43441
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2018-02-22 16:29:08 +00:00 |
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XCore
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Emit smaller exception tables for non-SJLJ mode.
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2018-02-09 17:13:37 +00:00 |
