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[AMDGPU][MC][GFX9][NFC][DOC] Updated AMD GPU assembler syntax description.
Fixed bugs 48639, 49447, 49448, 49449.
This commit is contained in:
Dmitry Preobrazhensky
parent
c98a4cb73f
commit
1d7a6567dd
File diff suppressed because it is too large
Load Diff
@ -5,10 +5,10 @@
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_attr:
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.. _amdgpu_synid_gfx9_attr:
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attr
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attr
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===========================
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====
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Interpolation attribute and channel:
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Interpolation attribute and channel:
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@ -5,9 +5,9 @@
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_ret:
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.. _amdgpu_synid_gfx9_dst:
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dst
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dst
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===========================
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===
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This is an input operand. It may optionally serve as a destination if :ref:`glc<amdgpu_synid_glc>` is specified.
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This is an input operand. It may optionally serve as a destination if :ref:`glc<amdgpu_synid_glc>` is specified.
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@ -5,10 +5,10 @@
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_hwreg:
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.. _amdgpu_synid_gfx9_hwreg:
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hwreg
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hwreg
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===========================
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=====
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Bits of a hardware register being accessed.
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Bits of a hardware register being accessed.
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@ -5,10 +5,10 @@
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_imask:
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.. _amdgpu_synid_gfx9_imask:
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imask
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imask
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===========================
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=====
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This operand is a mask which controls indexing mode for operands of subsequent instructions.
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This operand is a mask which controls indexing mode for operands of subsequent instructions.
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Bits 0, 1 and 2 control indexing of *src0*, *src1* and *src2*, while bit 3 controls indexing of *dst*.
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Bits 0, 1 and 2 control indexing of *src0*, *src1* and *src2*, while bit 3 controls indexing of *dst*.
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@ -5,9 +5,9 @@
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_simm16:
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.. _amdgpu_synid_gfx9_imm16:
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imm16
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imm16
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===========================
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=====
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An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
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An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
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@ -5,9 +5,9 @@
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_uimm16:
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.. _amdgpu_synid_gfx9_imm16_1:
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imm16
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imm16
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===========================
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=====
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An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..65535.
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An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..65535.
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@ -5,9 +5,9 @@
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_bimm16:
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.. _amdgpu_synid_gfx9_imm16_2:
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imm16
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imm16
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===========================
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=====
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A 16-bit :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
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A 16-bit :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
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@ -5,10 +5,10 @@
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_label:
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.. _amdgpu_synid_gfx9_label:
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label
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label
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===========================
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=====
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A branch target which is a 16-bit signed integer treated as a PC-relative dword offset.
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A branch target which is a 16-bit signed integer treated as a PC-relative dword offset.
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_mod_sdwa_sext:
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.. _amdgpu_synid_gfx9_m:
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m
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m
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===========================
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=
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This operand may be used with integer operand modifier :ref:`sext<amdgpu_synid_sext>`.
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This operand may be used with integer operand modifier :ref:`sext<amdgpu_synid_sext>`.
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@ -5,9 +5,9 @@
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_mod_vop3_abs_neg:
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.. _amdgpu_synid_gfx9_m_1:
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m
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m
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===========================
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=
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This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :ref:`neg<amdgpu_synid_neg>`.
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This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :ref:`neg<amdgpu_synid_neg>`.
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@ -1,13 +0,0 @@
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..
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**************************************************
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* *
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* Automatically generated file, do not edit! *
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* *
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**************************************************
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.. _amdgpu_synid9_mod_dpp_sdwa_abs_neg:
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m
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===========================
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This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :ref:`neg<amdgpu_synid_neg>`.
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_msg:
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.. _amdgpu_synid_gfx9_msg:
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msg
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msg
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===========================
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===
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A 16-bit message code. The bits of this operand have the following meaning:
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A 16-bit message code. The bits of this operand have the following meaning:
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@ -94,4 +94,3 @@ Examples:
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stream = 1
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stream = 1
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s_sendmsg sendmsg(msg, op, stream)
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s_sendmsg sendmsg(msg, op, stream)
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s_sendmsg sendmsg(2, GS_OP_CUT)
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s_sendmsg sendmsg(2, GS_OP_CUT)
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_opt:
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.. _amdgpu_synid_gfx9_opt:
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opt
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opt
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===========================
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===
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This is an optional operand. It must be used if and only if :ref:`glc<amdgpu_synid_glc>` is specified.
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This is an optional operand. It must be used if and only if :ref:`glc<amdgpu_synid_glc>` is specified.
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@ -5,10 +5,10 @@
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_param:
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.. _amdgpu_synid_gfx9_param:
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param
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param
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===========================
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=====
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Interpolation parameter to read:
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Interpolation parameter to read:
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@ -5,10 +5,10 @@
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_perm_smem:
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.. _amdgpu_synid_gfx9_probe:
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imm3
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probe
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===========================
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=====
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A bit mask which indicates request permissions.
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A bit mask which indicates request permissions.
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_saddr_flat_global:
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.. _amdgpu_synid_gfx9_saddr:
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saddr
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saddr
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===========================
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=====
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An optional 64-bit flat global address. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
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An optional 64-bit flat global address. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
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See :ref:`vaddr<amdgpu_synid9_vaddr_flat_global>` for description of available addressing modes.
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See :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` for description of available addressing modes.
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*Size:* 2 dwords.
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*Size:* 2 dwords.
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`off<amdgpu_synid_off>`
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`off<amdgpu_synid_off>`
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_saddr_flat_scratch:
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.. _amdgpu_synid_gfx9_saddr_1:
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saddr
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saddr
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===========================
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=====
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An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
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An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
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Either this operand or :ref:`vaddr<amdgpu_synid9_vaddr_flat_scratch>` must be set to :ref:`off<amdgpu_synid_off>`.
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Either this operand or :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>` must be set to :ref:`off<amdgpu_synid_off>`.
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*Size:* 1 dword.
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*Size:* 1 dword.
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`off<amdgpu_synid_off>`
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`off<amdgpu_synid_off>`
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_base_smem_addr:
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.. _amdgpu_synid_gfx9_sbase:
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sbase
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sbase
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===========================
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=====
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A 64-bit base address for scalar memory operations.
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A 64-bit base address for scalar memory operations.
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*Size:* 2 dwords.
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*Size:* 2 dwords.
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_base_smem_buf:
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.. _amdgpu_synid_gfx9_sbase_1:
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sbase
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sbase
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===========================
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=====
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A 128-bit buffer resource constant for scalar memory operations which provides a base address, a size and a stride.
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A 128-bit buffer resource constant for scalar memory operations which provides a base address, a size and a stride.
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_base_smem_scratch:
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.. _amdgpu_synid_gfx9_sbase_2:
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sbase
|
sbase
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===========================
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=====
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This operand is ignored by H/W and :ref:`flat_scratch<amdgpu_synid_flat_scratch>` is supplied instead.
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This operand is ignored by H/W and :ref:`flat_scratch<amdgpu_synid_flat_scratch>` is supplied instead.
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*Size:* 2 dwords.
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*Size:* 2 dwords.
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_data_smem_atomic32:
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.. _amdgpu_synid_gfx9_sdata:
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sdata
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sdata
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===========================
|
=====
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Input data for an atomic instruction.
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Input data for an atomic instruction.
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@ -18,4 +18,4 @@ Optionally may serve as an output data:
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*Size:* 1 dword.
|
*Size:* 1 dword.
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_data_smem_atomic64:
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.. _amdgpu_synid_gfx9_sdata_1:
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sdata
|
sdata
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===========================
|
=====
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Input data for an atomic instruction.
|
Input data for an atomic instruction.
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@ -18,4 +18,4 @@ Optionally may serve as an output data:
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*Size:* 2 dwords.
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*Size:* 2 dwords.
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_data_smem_atomic128:
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.. _amdgpu_synid_gfx9_sdata_2:
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sdata
|
sdata
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===========================
|
=====
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Input data for an atomic instruction.
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Input data for an atomic instruction.
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* *
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* *
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**************************************************
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**************************************************
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.. _amdgpu_synid9_sdata32_0:
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.. _amdgpu_synid_gfx9_sdata_3:
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sdata
|
sdata
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===========================
|
=====
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Instruction input.
|
Instruction input.
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*Size:* 1 dword.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_sdata64_0:
|
.. _amdgpu_synid_gfx9_sdata_4:
|
||||||
|
|
||||||
sdata
|
sdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
*Size:* 2 dwords.
|
*Size:* 2 dwords.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_sdata128_0:
|
.. _amdgpu_synid_gfx9_sdata_5:
|
||||||
|
|
||||||
sdata
|
sdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_sdst32_0:
|
.. _amdgpu_synid_gfx9_sdst:
|
||||||
|
|
||||||
sdst
|
sdst
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction output.
|
Instruction output.
|
||||||
|
|
||||||
*Size:* 1 dword.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_sdst512_0:
|
.. _amdgpu_synid_gfx9_sdst_1:
|
||||||
|
|
||||||
sdst
|
sdst
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction output.
|
Instruction output.
|
||||||
|
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_sdst64_0:
|
.. _amdgpu_synid_gfx9_sdst_2:
|
||||||
|
|
||||||
sdst
|
sdst
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction output.
|
Instruction output.
|
||||||
|
|
||||||
*Size:* 2 dwords.
|
*Size:* 2 dwords.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_sdst128_0:
|
.. _amdgpu_synid_gfx9_sdst_3:
|
||||||
|
|
||||||
sdst
|
sdst
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction output.
|
Instruction output.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_sdst256_0:
|
.. _amdgpu_synid_gfx9_sdst_4:
|
||||||
|
|
||||||
sdst
|
sdst
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction output.
|
Instruction output.
|
||||||
|
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_sdst32_1:
|
.. _amdgpu_synid_gfx9_sdst_5:
|
||||||
|
|
||||||
sdst
|
sdst
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction output.
|
Instruction output.
|
||||||
|
|
||||||
*Size:* 1 dword.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_sdst64_1:
|
.. _amdgpu_synid_gfx9_sdst_6:
|
||||||
|
|
||||||
sdst
|
sdst
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction output.
|
Instruction output.
|
||||||
|
|
||||||
*Size:* 2 dwords.
|
*Size:* 2 dwords.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_sdst32_2:
|
.. _amdgpu_synid_gfx9_sdst_7:
|
||||||
|
|
||||||
sdst
|
sdst
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction output.
|
Instruction output.
|
||||||
|
|
||||||
*Size:* 1 dword.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||||
@ -5,9 +5,9 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_bimm32:
|
.. _amdgpu_synid_gfx9_simm32:
|
||||||
|
|
||||||
imm32
|
simm32
|
||||||
===========================
|
======
|
||||||
|
|
||||||
An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value is truncated to 32 bits.
|
An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value is truncated to 32 bits.
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_fimm16:
|
.. _amdgpu_synid_gfx9_simm32_1:
|
||||||
|
|
||||||
imm32
|
simm32
|
||||||
===========================
|
======
|
||||||
|
|
||||||
A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
|
A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
|
||||||
The value is converted to *f16* as described :ref:`here<amdgpu_synid_fp_conv>`.
|
The value is converted to *f16* as described :ref:`here<amdgpu_synid_fp_conv>`.
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_fimm32:
|
.. _amdgpu_synid_gfx9_simm32_2:
|
||||||
|
|
||||||
imm32
|
simm32
|
||||||
===========================
|
======
|
||||||
|
|
||||||
A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
|
A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
|
||||||
The value is converted to *f32* as described :ref:`here<amdgpu_synid_fp_conv>`.
|
The value is converted to *f32* as described :ref:`here<amdgpu_synid_fp_conv>`.
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_offset_buf:
|
.. _amdgpu_synid_gfx9_soffset:
|
||||||
|
|
||||||
soffset
|
soffset
|
||||||
===========================
|
=======
|
||||||
|
|
||||||
An unsigned byte offset.
|
An unsigned byte offset.
|
||||||
|
|
||||||
*Size:* 1 dword.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_offset_smem_plain:
|
.. _amdgpu_synid_gfx9_soffset_1:
|
||||||
|
|
||||||
soffset
|
soffset
|
||||||
===========================
|
=======
|
||||||
|
|
||||||
An offset added to the base address to get memory address.
|
An offset added to the base address to get memory address.
|
||||||
|
|
||||||
@ -17,4 +17,4 @@ An offset added to the base address to get memory address.
|
|||||||
|
|
||||||
*Size:* 1 dword.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`simm21<amdgpu_synid_simm21>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`simm21<amdgpu_synid_simm21>`
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_offset_smem_buf:
|
.. _amdgpu_synid_gfx9_soffset_2:
|
||||||
|
|
||||||
soffset
|
soffset
|
||||||
===========================
|
=======
|
||||||
|
|
||||||
An unsigned 20-bit offset added to the base address to get memory address.
|
An unsigned 20-bit offset added to the base address to get memory address.
|
||||||
|
|
||||||
*Size:* 1 dword.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`uimm20<amdgpu_synid_uimm20>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`uimm20<amdgpu_synid_uimm20>`
|
||||||
17
docs/AMDGPU/gfx9_src.rst
Normal file
17
docs/AMDGPU/gfx9_src.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_src:
|
||||||
|
|
||||||
|
src
|
||||||
|
===
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 1 dword.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
||||||
@ -1,17 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_src32_0:
|
|
||||||
|
|
||||||
src
|
|
||||||
===========================
|
|
||||||
|
|
||||||
Instruction input.
|
|
||||||
|
|
||||||
*Size:* 1 dword.
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
|
||||||
@ -1,17 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_src32_1:
|
|
||||||
|
|
||||||
src
|
|
||||||
===========================
|
|
||||||
|
|
||||||
Instruction input.
|
|
||||||
|
|
||||||
*Size:* 1 dword.
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`literal<amdgpu_synid_literal>`
|
|
||||||
@ -1,17 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_src32_2:
|
|
||||||
|
|
||||||
src
|
|
||||||
===========================
|
|
||||||
|
|
||||||
Instruction input.
|
|
||||||
|
|
||||||
*Size:* 1 dword.
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`literal<amdgpu_synid_literal>`
|
|
||||||
@ -1,17 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_src32_3:
|
|
||||||
|
|
||||||
src
|
|
||||||
===========================
|
|
||||||
|
|
||||||
Instruction input.
|
|
||||||
|
|
||||||
*Size:* 1 dword.
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
|
||||||
@ -1,17 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_src32_4:
|
|
||||||
|
|
||||||
src
|
|
||||||
===========================
|
|
||||||
|
|
||||||
Instruction input.
|
|
||||||
|
|
||||||
*Size:* 1 dword.
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`constant<amdgpu_synid_constant>`
|
|
||||||
@ -1,17 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_src32_5:
|
|
||||||
|
|
||||||
src
|
|
||||||
===========================
|
|
||||||
|
|
||||||
Instruction input.
|
|
||||||
|
|
||||||
*Size:* 1 dword.
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
|
||||||
@ -1,17 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_src32_6:
|
|
||||||
|
|
||||||
src
|
|
||||||
===========================
|
|
||||||
|
|
||||||
Instruction input.
|
|
||||||
|
|
||||||
*Size:* 1 dword.
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`iconst<amdgpu_synid_iconst>`
|
|
||||||
@ -1,17 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_src32_7:
|
|
||||||
|
|
||||||
src
|
|
||||||
===========================
|
|
||||||
|
|
||||||
Instruction input.
|
|
||||||
|
|
||||||
*Size:* 1 dword.
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`
|
|
||||||
@ -1,17 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_src64_0:
|
|
||||||
|
|
||||||
src
|
|
||||||
===========================
|
|
||||||
|
|
||||||
Instruction input.
|
|
||||||
|
|
||||||
*Size:* 2 dwords.
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_ssrc64_2:
|
.. _amdgpu_synid_gfx9_src_1:
|
||||||
|
|
||||||
ssrc
|
src
|
||||||
===========================
|
===
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
*Size:* 2 dwords.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
||||||
17
docs/AMDGPU/gfx9_src_10.rst
Normal file
17
docs/AMDGPU/gfx9_src_10.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_src_10:
|
||||||
|
|
||||||
|
src
|
||||||
|
===
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 1 dword.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`
|
||||||
17
docs/AMDGPU/gfx9_src_2.rst
Normal file
17
docs/AMDGPU/gfx9_src_2.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_src_2:
|
||||||
|
|
||||||
|
src
|
||||||
|
===
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 2 dwords.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
||||||
17
docs/AMDGPU/gfx9_src_3.rst
Normal file
17
docs/AMDGPU/gfx9_src_3.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_src_3:
|
||||||
|
|
||||||
|
src
|
||||||
|
===
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 1 dword.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`, :ref:`literal<amdgpu_synid_literal>`
|
||||||
17
docs/AMDGPU/gfx9_src_4.rst
Normal file
17
docs/AMDGPU/gfx9_src_4.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_src_4:
|
||||||
|
|
||||||
|
src
|
||||||
|
===
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 1 dword.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_vsrc32_1:
|
.. _amdgpu_synid_gfx9_src_5:
|
||||||
|
|
||||||
vsrc
|
src
|
||||||
===========================
|
===
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
17
docs/AMDGPU/gfx9_src_6.rst
Normal file
17
docs/AMDGPU/gfx9_src_6.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_src_6:
|
||||||
|
|
||||||
|
src
|
||||||
|
===
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 1 dword.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`, :ref:`literal<amdgpu_synid_literal>`
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_ssrc64_0:
|
.. _amdgpu_synid_gfx9_src_7:
|
||||||
|
|
||||||
ssrc
|
src
|
||||||
===========================
|
===
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
*Size:* 2 dwords.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
||||||
17
docs/AMDGPU/gfx9_src_8.rst
Normal file
17
docs/AMDGPU/gfx9_src_8.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_src_8:
|
||||||
|
|
||||||
|
src
|
||||||
|
===
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 1 dword.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`constant<amdgpu_synid_constant>`
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_src64_1:
|
.. _amdgpu_synid_gfx9_src_9:
|
||||||
|
|
||||||
src
|
src
|
||||||
===========================
|
===
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
*Size:* 2 dwords.
|
*Size:* 2 dwords.
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_rsrc_mimg:
|
.. _amdgpu_synid_gfx9_srsrc:
|
||||||
|
|
||||||
srsrc
|
srsrc
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Image resource constant which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
|
Image resource constant which defines the location of the image buffer in memory, its dimensions, tiling, and data format.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_rsrc_buf:
|
.. _amdgpu_synid_gfx9_srsrc_1:
|
||||||
|
|
||||||
srsrc
|
srsrc
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Buffer resource constant which defines the address and characteristics of the buffer in memory.
|
Buffer resource constant which defines the address and characteristics of the buffer in memory.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_samp_mimg:
|
.. _amdgpu_synid_gfx9_ssamp:
|
||||||
|
|
||||||
ssamp
|
ssamp
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Sampler constant used to specify filtering options applied to the image data after it is read.
|
Sampler constant used to specify filtering options applied to the image data after it is read.
|
||||||
|
|
||||||
17
docs/AMDGPU/gfx9_ssrc.rst
Normal file
17
docs/AMDGPU/gfx9_ssrc.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_ssrc:
|
||||||
|
|
||||||
|
ssrc
|
||||||
|
====
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 1 dword.
|
||||||
|
|
||||||
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
||||||
@ -1,17 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_ssrc32_0:
|
|
||||||
|
|
||||||
ssrc
|
|
||||||
===========================
|
|
||||||
|
|
||||||
Instruction input.
|
|
||||||
|
|
||||||
*Size:* 1 dword.
|
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
|
||||||
@ -1,17 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_ssrc32_4:
|
|
||||||
|
|
||||||
ssrc
|
|
||||||
===========================
|
|
||||||
|
|
||||||
Instruction input.
|
|
||||||
|
|
||||||
*Size:* 1 dword.
|
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
|
||||||
17
docs/AMDGPU/gfx9_ssrc_1.rst
Normal file
17
docs/AMDGPU/gfx9_ssrc_1.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_ssrc_1:
|
||||||
|
|
||||||
|
ssrc
|
||||||
|
====
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 2 dwords.
|
||||||
|
|
||||||
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_ssrc32_1:
|
.. _amdgpu_synid_gfx9_ssrc_2:
|
||||||
|
|
||||||
ssrc
|
ssrc
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
*Size:* 1 dword.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_ssrc64_1:
|
.. _amdgpu_synid_gfx9_ssrc_3:
|
||||||
|
|
||||||
ssrc
|
ssrc
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
*Size:* 2 dwords.
|
*Size:* 2 dwords.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
|
||||||
17
docs/AMDGPU/gfx9_ssrc_4.rst
Normal file
17
docs/AMDGPU/gfx9_ssrc_4.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_ssrc_4:
|
||||||
|
|
||||||
|
ssrc
|
||||||
|
====
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 2 dwords.
|
||||||
|
|
||||||
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_ssrc64_3:
|
.. _amdgpu_synid_gfx9_ssrc_5:
|
||||||
|
|
||||||
ssrc
|
ssrc
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
*Size:* 2 dwords.
|
*Size:* 2 dwords.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_ssrc32_2:
|
.. _amdgpu_synid_gfx9_ssrc_6:
|
||||||
|
|
||||||
ssrc
|
ssrc
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
*Size:* 1 dword.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`
|
||||||
@ -5,13 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_ssrc32_3:
|
.. _amdgpu_synid_gfx9_ssrc_7:
|
||||||
|
|
||||||
ssrc
|
ssrc
|
||||||
===========================
|
====
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
*Size:* 1 dword.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`iconst<amdgpu_synid_iconst>`
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`iconst<amdgpu_synid_iconst>`
|
||||||
17
docs/AMDGPU/gfx9_ssrc_8.rst
Normal file
17
docs/AMDGPU/gfx9_ssrc_8.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_ssrc_8:
|
||||||
|
|
||||||
|
ssrc
|
||||||
|
====
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 1 dword.
|
||||||
|
|
||||||
|
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_tgt:
|
.. _amdgpu_synid_gfx9_tgt:
|
||||||
|
|
||||||
tgt
|
tgt
|
||||||
===========================
|
===
|
||||||
|
|
||||||
An export target:
|
An export target:
|
||||||
|
|
||||||
|
|||||||
@ -5,9 +5,9 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_type_dev:
|
.. _amdgpu_synid_gfx9_type_deviation:
|
||||||
|
|
||||||
Type deviation
|
Type Deviation
|
||||||
===========================
|
==============
|
||||||
|
|
||||||
*Type* of this operand differs from *type* :ref:`implied by the opcode<amdgpu_syn_instruction_type>`. This tag specifies actual operand *type*.
|
*Type* of this operand differs from *type* :ref:`implied by the opcode<amdgpu_syn_instruction_type>`. This tag specifies actual operand *type*.
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_addr_ds:
|
.. _amdgpu_synid_gfx9_vaddr:
|
||||||
|
|
||||||
vaddr
|
vaddr
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
An offset from the start of GDS/LDS memory.
|
An offset from the start of GDS/LDS memory.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_addr_flat:
|
.. _amdgpu_synid_gfx9_vaddr_1:
|
||||||
|
|
||||||
vaddr
|
vaddr
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
A 64-bit flat address.
|
A 64-bit flat address.
|
||||||
|
|
||||||
20
docs/AMDGPU/gfx9_vaddr_2.rst
Normal file
20
docs/AMDGPU/gfx9_vaddr_2.rst
Normal file
@ -0,0 +1,20 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_vaddr_2:
|
||||||
|
|
||||||
|
vaddr
|
||||||
|
=====
|
||||||
|
|
||||||
|
A 64-bit flat global address or a 32-bit offset depending on addressing mode:
|
||||||
|
|
||||||
|
* Address = :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid_gfx9_saddr>` set to :ref:`off<amdgpu_synid_off>`.
|
||||||
|
* Address = :ref:`saddr<amdgpu_synid_gfx9_saddr>` + :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid_gfx9_saddr>` is not :ref:`off<amdgpu_synid_off>`.
|
||||||
|
|
||||||
|
*Size:* 1 or 2 dwords.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||||
@ -5,14 +5,14 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_vaddr_flat_scratch:
|
.. _amdgpu_synid_gfx9_vaddr_3:
|
||||||
|
|
||||||
vaddr
|
vaddr
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
|
An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
|
||||||
|
|
||||||
Either this operand or :ref:`saddr<amdgpu_synid9_saddr_flat_scratch>` must be set to :ref:`off<amdgpu_synid_off>`.
|
Either this operand or :ref:`saddr<amdgpu_synid_gfx9_saddr_1>` must be set to :ref:`off<amdgpu_synid_off>`.
|
||||||
|
|
||||||
*Size:* 1 dword.
|
*Size:* 1 dword.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_addr_mimg:
|
.. _amdgpu_synid_gfx9_vaddr_4:
|
||||||
|
|
||||||
vaddr
|
vaddr
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Image address which includes from one to four dimensional coordinates and other data used to locate a position in the image.
|
Image address which includes from one to four dimensional coordinates and other data used to locate a position in the image.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_addr_buf:
|
.. _amdgpu_synid_gfx9_vaddr_5:
|
||||||
|
|
||||||
vaddr
|
vaddr
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
This is an optional operand which may specify offset and/or index.
|
This is an optional operand which may specify offset and/or index.
|
||||||
|
|
||||||
@ -1,20 +0,0 @@
|
|||||||
..
|
|
||||||
**************************************************
|
|
||||||
* *
|
|
||||||
* Automatically generated file, do not edit! *
|
|
||||||
* *
|
|
||||||
**************************************************
|
|
||||||
|
|
||||||
.. _amdgpu_synid9_vaddr_flat_global:
|
|
||||||
|
|
||||||
vaddr
|
|
||||||
===========================
|
|
||||||
|
|
||||||
A 64-bit flat global address or a 32-bit offset depending on addressing mode:
|
|
||||||
|
|
||||||
* Address = :ref:`vaddr<amdgpu_synid9_vaddr_flat_global>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid9_vaddr_flat_global>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid9_saddr_flat_global>` set to :ref:`off<amdgpu_synid_off>`.
|
|
||||||
* Address = :ref:`saddr<amdgpu_synid9_saddr_flat_global>` + :ref:`vaddr<amdgpu_synid9_vaddr_flat_global>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid9_vaddr_flat_global>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid9_saddr_flat_global>` is not :ref:`off<amdgpu_synid_off>`.
|
|
||||||
|
|
||||||
*Size:* 1 or 2 dwords.
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_vcc_64:
|
.. _amdgpu_synid_gfx9_vcc:
|
||||||
|
|
||||||
vcc
|
vcc
|
||||||
===========================
|
===
|
||||||
|
|
||||||
Vector condition code.
|
Vector condition code.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_vdata32_0:
|
.. _amdgpu_synid_gfx9_vdata:
|
||||||
|
|
||||||
vdata
|
vdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
17
docs/AMDGPU/gfx9_vdata0.rst
Normal file
17
docs/AMDGPU/gfx9_vdata0.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_vdata0:
|
||||||
|
|
||||||
|
vdata0
|
||||||
|
======
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 1 dword.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||||
17
docs/AMDGPU/gfx9_vdata0_1.rst
Normal file
17
docs/AMDGPU/gfx9_vdata0_1.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_vdata0_1:
|
||||||
|
|
||||||
|
vdata0
|
||||||
|
======
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 2 dwords.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||||
17
docs/AMDGPU/gfx9_vdata1.rst
Normal file
17
docs/AMDGPU/gfx9_vdata1.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_vdata1:
|
||||||
|
|
||||||
|
vdata1
|
||||||
|
======
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 1 dword.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||||
17
docs/AMDGPU/gfx9_vdata1_1.rst
Normal file
17
docs/AMDGPU/gfx9_vdata1_1.rst
Normal file
@ -0,0 +1,17 @@
|
|||||||
|
..
|
||||||
|
**************************************************
|
||||||
|
* *
|
||||||
|
* Automatically generated file, do not edit! *
|
||||||
|
* *
|
||||||
|
**************************************************
|
||||||
|
|
||||||
|
.. _amdgpu_synid_gfx9_vdata1_1:
|
||||||
|
|
||||||
|
vdata1
|
||||||
|
======
|
||||||
|
|
||||||
|
Instruction input.
|
||||||
|
|
||||||
|
*Size:* 2 dwords.
|
||||||
|
|
||||||
|
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_vdata64_0:
|
.. _amdgpu_synid_gfx9_vdata_1:
|
||||||
|
|
||||||
vdata
|
vdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_data_buf_atomic128:
|
.. _amdgpu_synid_gfx9_vdata_10:
|
||||||
|
|
||||||
vdata
|
vdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Input data for an atomic instruction.
|
Input data for an atomic instruction.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_vdata128_0:
|
.. _amdgpu_synid_gfx9_vdata_2:
|
||||||
|
|
||||||
vdata
|
vdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_vdata96_0:
|
.. _amdgpu_synid_gfx9_vdata_3:
|
||||||
|
|
||||||
vdata
|
vdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Instruction input.
|
Instruction input.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_data_mimg_atomic_reg:
|
.. _amdgpu_synid_gfx9_vdata_4:
|
||||||
|
|
||||||
vdata
|
vdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Input data for an atomic instruction.
|
Input data for an atomic instruction.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_data_mimg_atomic_cmp:
|
.. _amdgpu_synid_gfx9_vdata_5:
|
||||||
|
|
||||||
vdata
|
vdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Input data for an atomic instruction.
|
Input data for an atomic instruction.
|
||||||
|
|
||||||
@ -23,5 +23,4 @@ Optionally may serve as an output data:
|
|||||||
|
|
||||||
Note: the surface data format is indicated in the image resource constant but not in the instruction.
|
Note: the surface data format is indicated in the image resource constant but not in the instruction.
|
||||||
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_data_mimg_store_d16:
|
.. _amdgpu_synid_gfx9_vdata_6:
|
||||||
|
|
||||||
vdata
|
vdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Image data to store by an *image_store* instruction.
|
Image data to store by an *image_store* instruction.
|
||||||
|
|
||||||
@ -17,5 +17,4 @@ Image data to store by an *image_store* instruction.
|
|||||||
* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
|
* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
|
||||||
* :ref:`d16<amdgpu_synid_d16>` specifies that data in registers are packed; each value occupies 16 bits.
|
* :ref:`d16<amdgpu_synid_d16>` specifies that data in registers are packed; each value occupies 16 bits.
|
||||||
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||||
@ -5,14 +5,13 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_data_mimg_store:
|
.. _amdgpu_synid_gfx9_vdata_7:
|
||||||
|
|
||||||
vdata
|
vdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Image data to store by an *image_store* instruction.
|
Image data to store by an *image_store* instruction.
|
||||||
|
|
||||||
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` which may specify from 1 to 4 data elements. Each data element occupies 1 dword.
|
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` which may specify from 1 to 4 data elements. Each data element occupies 1 dword.
|
||||||
|
|
||||||
|
|
||||||
*Operands:* :ref:`v<amdgpu_synid_v>`
|
*Operands:* :ref:`v<amdgpu_synid_v>`
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_data_buf_atomic32:
|
.. _amdgpu_synid_gfx9_vdata_8:
|
||||||
|
|
||||||
vdata
|
vdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Input data for an atomic instruction.
|
Input data for an atomic instruction.
|
||||||
|
|
||||||
@ -5,10 +5,10 @@
|
|||||||
* *
|
* *
|
||||||
**************************************************
|
**************************************************
|
||||||
|
|
||||||
.. _amdgpu_synid9_data_buf_atomic64:
|
.. _amdgpu_synid_gfx9_vdata_9:
|
||||||
|
|
||||||
vdata
|
vdata
|
||||||
===========================
|
=====
|
||||||
|
|
||||||
Input data for an atomic instruction.
|
Input data for an atomic instruction.
|
||||||
|
|
||||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user