1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/docs/AMDGPU/gfx9_vaddr_2.rst
Dmitry Preobrazhensky 1d7a6567dd [AMDGPU][MC][GFX9][NFC][DOC] Updated AMD GPU assembler syntax description.
Fixed bugs 48639, 49447, 49448, 49449.
2021-07-23 12:59:42 +03:00

21 lines
1.0 KiB
ReStructuredText

..
**************************************************
* *
* Automatically generated file, do not edit! *
* *
**************************************************
.. _amdgpu_synid_gfx9_vaddr_2:
vaddr
=====
A 64-bit flat global address or a 32-bit offset depending on addressing mode:
* Address = :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid_gfx9_saddr>` set to :ref:`off<amdgpu_synid_off>`.
* Address = :ref:`saddr<amdgpu_synid_gfx9_saddr>` + :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid_gfx9_saddr>` is not :ref:`off<amdgpu_synid_off>`.
*Size:* 1 or 2 dwords.
*Operands:* :ref:`v<amdgpu_synid_v>`