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[PPCInstPrinter] Print conditional branches as bt 2, $target instead of bt 2, .+$imm

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Follow-up of D76591.

Reviewed By: #powerpc, sfertile

Differential Revision: https://reviews.llvm.org/D76907
This commit is contained in:
Fangrui Song 2020-03-26 23:40:23 -07:00
parent 9fb4af2f28
commit 1f417e7ba5
7 changed files with 20 additions and 9 deletions
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7
lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
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@ -60,6 +60,13 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCDisassembler() {
createPPCLEDisassembler);
}
static DecodeStatus decodeCondBrTarget(MCInst &Inst, unsigned Imm,
uint64_t /*Address*/,
const void * /*Decoder*/) {
Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm)));
return MCDisassembler::Success;
}
static DecodeStatus DecodePCRel24BranchTarget(MCInst &Inst, unsigned Imm,
uint64_t Addr,
const void *Decoder) {

2
lib/Target/PowerPC/PPCInstrInfo.td
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@ -764,7 +764,9 @@ def PPCCondBrAsmOperand : AsmOperandClass {
def condbrtarget : Operand<OtherVT> {
let PrintMethod = "printBranchOperand";
let EncoderMethod = "getCondBrEncoding";
let DecoderMethod = "decodeCondBrTarget";
let ParserMatchClass = PPCCondBrAsmOperand;
let OperandType = "OPERAND_PCREL";
}
def abscondbrtarget : Operand<OtherVT> {
let PrintMethod = "printAbsBranchOperand";

2
test/CodeGen/PowerPC/aix-return55.ll
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@ -31,7 +31,7 @@ entry:
;CHECKOBJ-NEXT: 18: 00 01 23 45 <unknown>
;CHECKOBJ-NEXT: 1c: 67 8a bc de oris 10, 28, 48350{{[[:space:]] *}}
;CHECKOBJ-NEXT: 00000020 <d>:
;CHECKOBJ-NEXT: 20: 40 14 00 00 bdnzf 20, $+0
;CHECKOBJ-NEXT: 20: 40 14 00 00 bdnzf 20, 0x20
;CHECKOBJ-NEXT: 24: 00 00 00 00 <unknown>{{[[:space:]] *}}
;CHECKOBJ-NEXT: 00000028 <foo>:
;CHECKOBJ-NEXT: 28: 00 00 00 00 <unknown>

4
test/CodeGen/PowerPC/alignlongjumptest.mir
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@ -70,12 +70,12 @@ body: |
...
# Check for the long branch.
# CHECK-LE: 08 00 82 4{{[01]}} b{{[tf]}} 2, .+8
# CHECK-LE: 08 00 82 4{{[01]}} b{{[tf]}} 2, 0xc
# CHECK-LE-NEXT: fc 7f 00 48 b .+32764
# CHECK-LE-DAG: paddi 3, 3, 13, 0
# CHECK-LE-DAG: paddi 3, 3, 21, 0
# CHECK-LE: blr
# CHECK-BE: 4{{[01]}} 82 00 08 b{{[tf]}} 2, .+8
# CHECK-BE: 4{{[01]}} 82 00 08 b{{[tf]}} 2, 0xc
# CHECK-BE-NEXT: 48 00 7f fc b .+32764
# CHECK-BE-DAG: paddi 3, 3, 13, 0
# CHECK-BE-DAG: paddi 3, 3, 21, 0

8
test/MC/PowerPC/ppc64-prefix-align.s
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@ -13,10 +13,10 @@
beq 0, LAB1 # 4
beq 1, LAB2 # 8
# CHECK-BE: 0: 41 82 00 c0 bt 2, .+192
# CHECK-BE-NEXT: 4: 41 86 00 f8 bt 6, .+248
# CHECK-LE: 0: c0 00 82 41 bt 2, .+192
# CHECK-LE-NEXT: 4: f8 00 86 41 bt 6, .+248
# CHECK-BE: 0: 41 82 00 c0 bt 2, 0xc0
# CHECK-BE-NEXT: 4: 41 86 00 f8 bt 6, 0xfc
# CHECK-LE: 0: c0 00 82 41 bt 2, 0xc0
# CHECK-LE-NEXT: 4: f8 00 86 41 bt 6, 0xfc
paddi 1, 2, 8589934576, 0 # 16
paddi 1, 2, 8589934576, 0 # 24
paddi 1, 2, 8589934576, 0 # 32

4
test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s
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@ -29,7 +29,9 @@ b:
b .+4
# CHECK-LABEL: <bt>:
# CHECK-NEXT: bt 2, .+65532
# CHECK-NEXT: 18: bt 2, 0x14
# CHECK-NEXT: 1c: bt 1, 0x20
bt:
bt 2, .-4
bgt .+4

2
test/tools/llvm-objdump/XCOFF/disassemble-all.test
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@ -55,7 +55,7 @@ CHECK: 000000a4 <a>:
CHECK-NEXT: ...
CHECK: Disassembly of section .tdata:
CHECK: 00000000 <d>:
CHECK-NEXT: 0: 40 09 21 f9 bdnzfl 9, $+8696
CHECK-NEXT: 0: 40 09 21 f9 bdnzfl 9, 0x21f8
CHECK-NEXT: 4: f0 1b 86 6e <unknown>
CHECK: Disassembly of section .tbss:
CHECK: 00000008 <c>: