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[NFC][InstCombine] Tests for negation of sign-/zero- extensions

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* sext of non-positive can be negated.
* zext of non-negative can be negated.
This commit is contained in:
Roman Lebedev 2020-04-22 17:30:58 +03:00
parent ddd19cae7c
commit 2bfe7ae375
1 changed files with 147 additions and 0 deletions
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147
test/Transforms/InstCombine/sub-of-negatible.ll
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@ -675,3 +675,150 @@ define <2 x i4> @negate_shufflevector_oneinput_extrause(<2 x i4> %x, <2 x i4> %y
%t2 = sub <2 x i4> %y, %t1
ret <2 x i4> %t2
}
; zext of non-negative can be negated
; sext of non-positive can be negated
define i16 @negation_of_zeroext_of_nonnegative(i8 %x) {
; CHECK-LABEL: @negation_of_zeroext_of_nonnegative(
; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]]
; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], -1
; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]]
; CHECK: nonneg_bb:
; CHECK-NEXT: [[T2:%.*]] = zext i8 [[T0]] to i16
; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]]
; CHECK-NEXT: ret i16 [[T3]]
; CHECK: neg_bb:
; CHECK-NEXT: ret i16 0
;
%t0 = sub i8 0, %x
%t1 = icmp sge i8 %t0, 0
br i1 %t1, label %nonneg_bb, label %neg_bb
nonneg_bb:
%t2 = zext i8 %t0 to i16
%t3 = sub i16 0, %t2
ret i16 %t3
neg_bb:
ret i16 0
}
define i16 @negation_of_zeroext_of_positive(i8 %x) {
; CHECK-LABEL: @negation_of_zeroext_of_positive(
; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]]
; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], 0
; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]]
; CHECK: nonneg_bb:
; CHECK-NEXT: [[T2:%.*]] = zext i8 [[T0]] to i16
; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]]
; CHECK-NEXT: ret i16 [[T3]]
; CHECK: neg_bb:
; CHECK-NEXT: ret i16 0
;
%t0 = sub i8 0, %x
%t1 = icmp sgt i8 %t0, 0
br i1 %t1, label %nonneg_bb, label %neg_bb
nonneg_bb:
%t2 = zext i8 %t0 to i16
%t3 = sub i16 0, %t2
ret i16 %t3
neg_bb:
ret i16 0
}
define i16 @negation_of_signext_of_negative(i8 %x) {
; CHECK-LABEL: @negation_of_signext_of_negative(
; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]]
; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 0
; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]]
; CHECK: neg_bb:
; CHECK-NEXT: [[T2:%.*]] = sext i8 [[T0]] to i16
; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]]
; CHECK-NEXT: ret i16 [[T3]]
; CHECK: nonneg_bb:
; CHECK-NEXT: ret i16 0
;
%t0 = sub i8 0, %x
%t1 = icmp slt i8 %t0, 0
br i1 %t1, label %neg_bb, label %nonneg_bb
neg_bb:
%t2 = sext i8 %t0 to i16
%t3 = sub i16 0, %t2
ret i16 %t3
nonneg_bb:
ret i16 0
}
define i16 @negation_of_signext_of_nonpositive(i8 %x) {
; CHECK-LABEL: @negation_of_signext_of_nonpositive(
; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]]
; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 1
; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]]
; CHECK: neg_bb:
; CHECK-NEXT: [[T2:%.*]] = sext i8 [[T0]] to i16
; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]]
; CHECK-NEXT: ret i16 [[T3]]
; CHECK: nonneg_bb:
; CHECK-NEXT: ret i16 0
;
%t0 = sub i8 0, %x
%t1 = icmp sle i8 %t0, 0
br i1 %t1, label %neg_bb, label %nonneg_bb
neg_bb:
%t2 = sext i8 %t0 to i16
%t3 = sub i16 0, %t2
ret i16 %t3
nonneg_bb:
ret i16 0
}
define i16 @negation_of_signext_of_nonnegative__wrong_cast(i8 %x) {
; CHECK-LABEL: @negation_of_signext_of_nonnegative__wrong_cast(
; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]]
; CHECK-NEXT: [[T1:%.*]] = icmp sgt i8 [[T0]], -1
; CHECK-NEXT: br i1 [[T1]], label [[NONNEG_BB:%.*]], label [[NEG_BB:%.*]]
; CHECK: nonneg_bb:
; CHECK-NEXT: [[T2:%.*]] = sext i8 [[T0]] to i16
; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]]
; CHECK-NEXT: ret i16 [[T3]]
; CHECK: neg_bb:
; CHECK-NEXT: ret i16 0
;
%t0 = sub i8 0, %x
%t1 = icmp sge i8 %t0, 0
br i1 %t1, label %nonneg_bb, label %neg_bb
nonneg_bb:
%t2 = sext i8 %t0 to i16
%t3 = sub i16 0, %t2
ret i16 %t3
neg_bb:
ret i16 0
}
define i16 @negation_of_zeroext_of_negative_wrongcast(i8 %x) {
; CHECK-LABEL: @negation_of_zeroext_of_negative_wrongcast(
; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]]
; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[T0]], 0
; CHECK-NEXT: br i1 [[T1]], label [[NEG_BB:%.*]], label [[NONNEG_BB:%.*]]
; CHECK: neg_bb:
; CHECK-NEXT: [[T2:%.*]] = zext i8 [[T0]] to i16
; CHECK-NEXT: [[T3:%.*]] = sub nsw i16 0, [[T2]]
; CHECK-NEXT: ret i16 [[T3]]
; CHECK: nonneg_bb:
; CHECK-NEXT: ret i16 0
;
%t0 = sub i8 0, %x
%t1 = icmp slt i8 %t0, 0
br i1 %t1, label %neg_bb, label %nonneg_bb
neg_bb:
%t2 = zext i8 %t0 to i16
%t3 = sub i16 0, %t2
ret i16 %t3
nonneg_bb:
ret i16 0
}