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[DAGCombiner] Use APInt directly in (shl (zext (srl x, C)), C) combine range test

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To avoid assertion, we must ensure that the inner shift constant is within range before calling ConstantSDNode::getZExtValue(). We already know that the outer shift constant is in range.

Followup to D23007

llvm-svn: 281362
This commit is contained in:
Simon Pilgrim 2016-09-13 18:33:29 +00:00
parent 5306c76b08
commit 3f9a40fa37
2 changed files with 9 additions and 2 deletions
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4
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -4545,8 +4545,8 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
N0.getOperand(0).getOpcode() == ISD::SRL) {
SDValue N0Op0 = N0.getOperand(0);
if (ConstantSDNode *N0Op0C1 = isConstOrConstSplat(N0Op0.getOperand(1))) {
uint64_t c1 = N0Op0C1->getZExtValue();
if (c1 < VT.getScalarSizeInBits()) {
if (N0Op0C1->getAPIntValue().ult(VT.getScalarSizeInBits())) {
uint64_t c1 = N0Op0C1->getZExtValue();
uint64_t c2 = N1C->getZExtValue();
if (c1 == c2) {
SDValue NewOp0 = N0.getOperand(0);

7
test/CodeGen/X86/shift-i128.ll
View File

@ -134,3 +134,10 @@ define <2 x i256> @shl_zext_shl_outofrange(<2 x i128> %a0) {
%3 = shl <2 x i256> %2, <i256 128, i256 128>
ret <2 x i256> %3
}
define <2 x i256> @shl_zext_lshr_outofrange(<2 x i128> %a0) {
%1 = lshr <2 x i128> %a0, <i128 -1, i128 -1>
%2 = zext <2 x i128> %1 to <2 x i256>
%3 = shl <2 x i256> %2, <i256 128, i256 128>
ret <2 x i256> %3
}