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[X86][AVX] Add tests showing missed VPBROADCASTQ folding on 32-bit targets.

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As i64 isn't a value type on 32-bit targets, we fail to fold the VZEXT_LOAD into VPBROADCASTQ.

Also shows that we're not decoding VPERMIV3 shuffles very well....

llvm-svn: 295729
This commit is contained in:
Simon Pilgrim 2017-02-21 16:05:35 +00:00
parent b00f09b587
commit 497673b60c
2 changed files with 54 additions and 0 deletions
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36
test/CodeGen/X86/vector-shuffle-combining-avx2.ll
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@ -774,6 +774,42 @@ define <32 x i8> @combine_unpack_unpack_pshufb(<32 x i8> %a0) {
ret <32 x i8> %6
}
define <16 x i8> @combine_broadcast_pshufb_insertion_v2i64(i64 %a0) {
; X32-LABEL: combine_broadcast_pshufb_insertion_v2i64:
; X32: # BB#0:
; X32-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; X32-NEXT: vpbroadcastq %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: combine_broadcast_pshufb_insertion_v2i64:
; X64: # BB#0:
; X64-NEXT: vmovq %rdi, %xmm0
; X64-NEXT: vpbroadcastq %xmm0, %xmm0
; X64-NEXT: retq
%1 = insertelement <2 x i64> undef, i64 %a0, i32 0
%2 = bitcast <2 x i64> %1 to <16 x i8>
%3 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)
ret <16 x i8> %3
}
define <8 x i32> @combine_broadcast_permd_insertion_v4i64(i64 %a0) {
; X32-LABEL: combine_broadcast_permd_insertion_v4i64:
; X32: # BB#0:
; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; X32-NEXT: vbroadcastsd %xmm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: combine_broadcast_permd_insertion_v4i64:
; X64: # BB#0:
; X64-NEXT: vmovq %rdi, %xmm0
; X64-NEXT: vpbroadcastq %xmm0, %ymm0
; X64-NEXT: retq
%1 = insertelement <4 x i64> undef, i64 %a0, i32 0
%2 = bitcast <4 x i64> %1 to <8 x i32>
%3 = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %2, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>)
ret <8 x i32> %3
}
define <8 x i32> @constant_fold_permd() {
; X32-LABEL: constant_fold_permd:
; X32: # BB#0:

18
test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
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@ -1133,3 +1133,21 @@ define <16 x float> @combine_vpermi2var_vpermvar_16f32_as_vperm2_zero(<16 x floa
ret <16 x float> %res1
}
define <8 x i64> @combine_broadcast_vpermvar_insertion_v8i64(i64 %a0) {
; X32-LABEL: combine_broadcast_vpermvar_insertion_v8i64:
; X32: # BB#0:
; X32-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; X32-NEXT: vpxord %zmm0, %zmm0, %zmm0
; X32-NEXT: vpermi2q %zmm0, %zmm1, %zmm0
; X32-NEXT: retl
;
; X64-LABEL: combine_broadcast_vpermvar_insertion_v8i64:
; X64: # BB#0:
; X64-NEXT: vmovq %rdi, %xmm1
; X64-NEXT: vpxord %zmm0, %zmm0, %zmm0
; X64-NEXT: vpermi2q %zmm0, %zmm1, %zmm0
; X64-NEXT: retq
%1 = insertelement <8 x i64> undef, i64 %a0, i32 0
%2 = tail call <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64> %1, <8 x i64> zeroinitializer, <8 x i64> undef, i8 -1)
ret <8 x i64> %2
}