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Add experimental -x86-use-regmask command line option.

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It adds register mask operands to x86 call instructions.  Once all the
backend passes support register mask operands, this will be permanently
enabled.

llvm-svn: 148438
This commit is contained in:
Jakob Stoklund Olesen 2012-01-18 23:52:22 +00:00
parent 85ef53eb8d
commit 498e016c87
1 changed files with 12 additions and 0 deletions
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12
lib/Target/X86/X86ISelLowering.cpp
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@ -45,6 +45,7 @@
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/VariadicFunction.h"
#include "llvm/Support/CallSite.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Dwarf.h"
#include "llvm/Support/ErrorHandling.h"
@ -56,6 +57,9 @@ using namespace dwarf;
STATISTIC(NumTailCalls, "Number of tail calls");
static cl::opt<bool> UseRegMask("x86-use-regmask",
cl::desc("Use register masks for x86 calls"));
// Forward declarations.
static SDValue getMOVL(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1,
SDValue V2);
@ -2506,6 +2510,14 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
if (Is64Bit && isVarArg && !IsWin64)
Ops.push_back(DAG.getRegister(X86::AL, MVT::i8));
// Experimental: Add a register mask operand representing the call-preserved
// registers.
if (UseRegMask) {
const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);
Ops.push_back(DAG.getRegisterMask(Mask));
}
if (InFlag.getNode())
Ops.push_back(InFlag);