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[FastISel][ARM] Do not emit stores for undef arguments.

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This is a followup patch for r214366, which added the same behavior to the
AArch64 and X86 FastISel code. This fix reproduces the already existing
behavior of SelectionDAG in FastISel.

llvm-svn: 214531
This commit is contained in:
Juergen Ributzka 2014-08-01 18:04:14 +00:00
parent 4b31591fa8
commit 51affe9d31
2 changed files with 21 additions and 0 deletions
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6
lib/Target/ARM/ARMFastISel.cpp
View File

@ -1941,6 +1941,7 @@ bool ARMFastISel::ProcessCallArgs(SmallVectorImpl<Value*> &Args,
// Process the args.
for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
CCValAssign &VA = ArgLocs[i];
const Value *ArgVal = Args[VA.getValNo()];
unsigned Arg = ArgRegs[VA.getValNo()];
MVT ArgVT = ArgVTs[VA.getValNo()];
@ -2001,6 +2002,11 @@ bool ARMFastISel::ProcessCallArgs(SmallVectorImpl<Value*> &Args,
} else {
assert(VA.isMemLoc());
// Need to store on the stack.
// Don't emit stores for undef values.
if (isa<UndefValue>(ArgVal))
continue;
Address Addr;
Addr.BaseType = Address::RegBase;
Addr.Base.Reg = ARM::SP;

15
test/CodeGen/ARM/fast-isel-call.ll
View File

@ -250,4 +250,19 @@ entry:
ret void
}
declare void @bar2(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6)
define void @call_undef_args() {
; ARM-LABEL: call_undef_args
; ARM: movw r0, #1
; ARM-NEXT: movw r1, #2
; ARM-NEXT: movw r2, #3
; ARM-NEXT: movw r3, #4
; ARM-NOT: str {{r[0-9]+}}, [sp]
; ARM: movw [[REG:l?r[0-9]*]], #6
; ARM-NEXT: str [[REG]], [sp, #4]
call void @bar2(i32 1, i32 2, i32 3, i32 4, i32 undef, i32 6)
ret void
}
declare void @print(float)