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[Alignment][NFC] Use Align version of getMachineMemOperand

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: jyknight, sdardis, nemanjai, hiraditya, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, jfb, PkmX, jocewei, Jim, lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77059
This commit is contained in:
Guillaume Chatelet 2020-03-30 14:45:57 +00:00
parent ee8a6b7a61
commit 61ed715c3a
26 changed files with 100 additions and 116 deletions

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@ -1200,7 +1200,7 @@ void IRTranslator::getStackGuard(Register DstReg,
MachineMemOperand::MODereferenceable; MachineMemOperand::MODereferenceable;
MachineMemOperand *MemRef = MachineMemOperand *MemRef =
MF->getMachineMemOperand(MPInfo, Flags, DL->getPointerSizeInBits() / 8, MF->getMachineMemOperand(MPInfo, Flags, DL->getPointerSizeInBits() / 8,
DL->getPointerABIAlignment(0).value()); DL->getPointerABIAlignment(0));
MIB.setMemRefs({MemRef}); MIB.setMemRefs({MemRef});
} }
@ -1384,8 +1384,9 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
// FIXME: Get alignment // FIXME: Get alignment
MIRBuilder.buildInstr(TargetOpcode::G_VASTART, {}, {getOrCreateVReg(*Ptr)}) MIRBuilder.buildInstr(TargetOpcode::G_VASTART, {}, {getOrCreateVReg(*Ptr)})
.addMemOperand(MF->getMachineMemOperand( .addMemOperand(MF->getMachineMemOperand(MachinePointerInfo(Ptr),
MachinePointerInfo(Ptr), MachineMemOperand::MOStore, ListSize, 1)); MachineMemOperand::MOStore,
ListSize, Align(1)));
return true; return true;
} }
case Intrinsic::dbg_value: { case Intrinsic::dbg_value: {
@ -1711,14 +1712,12 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
TargetLowering::IntrinsicInfo Info; TargetLowering::IntrinsicInfo Info;
// TODO: Add a GlobalISel version of getTgtMemIntrinsic. // TODO: Add a GlobalISel version of getTgtMemIntrinsic.
if (TLI.getTgtMemIntrinsic(Info, CI, *MF, ID)) { if (TLI.getTgtMemIntrinsic(Info, CI, *MF, ID)) {
MaybeAlign Align = Info.align; Align Alignment = Info.align.getValueOr(
if (!Align) DL->getABITypeAlign(Info.memVT.getTypeForEVT(F->getContext())));
Align = MaybeAlign(
DL->getABITypeAlignment(Info.memVT.getTypeForEVT(F->getContext())));
uint64_t Size = Info.memVT.getStoreSize(); uint64_t Size = Info.memVT.getStoreSize();
MIB.addMemOperand(MF->getMachineMemOperand( MIB.addMemOperand(MF->getMachineMemOperand(MachinePointerInfo(Info.ptrVal),
MachinePointerInfo(Info.ptrVal), Info.flags, Size, Align->value())); Info.flags, Size, Alignment));
} }
return true; return true;

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@ -1525,14 +1525,13 @@ void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
} }
Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
LD->getPointerInfo(), LoMemVT, Alignment.value(), MMOFlags, LD->getPointerInfo(), LoMemVT, Alignment, MMOFlags, AAInfo);
AAInfo);
unsigned IncrementSize = LoMemVT.getSizeInBits()/8; unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
Ptr = DAG.getObjectPtrOffset(dl, Ptr, IncrementSize); Ptr = DAG.getObjectPtrOffset(dl, Ptr, IncrementSize);
Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
LD->getPointerInfo().getWithOffset(IncrementSize), HiMemVT, LD->getPointerInfo().getWithOffset(IncrementSize), HiMemVT,
Alignment.value(), MMOFlags, AAInfo); Alignment, MMOFlags, AAInfo);
// Build a factor node to remember that this load is independent of the // Build a factor node to remember that this load is independent of the
// other one. // other one.
@ -1583,7 +1582,7 @@ void DAGTypeLegalizer::SplitVecRes_MLOAD(MaskedLoadSDNode *MLD,
MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
MLD->getPointerInfo(), MachineMemOperand::MOLoad, LoMemVT.getStoreSize(), MLD->getPointerInfo(), MachineMemOperand::MOLoad, LoMemVT.getStoreSize(),
Alignment.value(), MLD->getAAInfo(), MLD->getRanges()); Alignment, MLD->getAAInfo(), MLD->getRanges());
Lo = DAG.getMaskedLoad(LoVT, dl, Ch, Ptr, Offset, MaskLo, PassThruLo, LoMemVT, Lo = DAG.getMaskedLoad(LoVT, dl, Ch, Ptr, Offset, MaskLo, PassThruLo, LoMemVT,
MMO, MLD->getAddressingMode(), ExtType, MMO, MLD->getAddressingMode(), ExtType,
@ -1595,8 +1594,7 @@ void DAGTypeLegalizer::SplitVecRes_MLOAD(MaskedLoadSDNode *MLD,
MMO = DAG.getMachineFunction().getMachineMemOperand( MMO = DAG.getMachineFunction().getMachineMemOperand(
MLD->getPointerInfo().getWithOffset(HiOffset), MachineMemOperand::MOLoad, MLD->getPointerInfo().getWithOffset(HiOffset), MachineMemOperand::MOLoad,
HiMemVT.getStoreSize(), Alignment.value(), MLD->getAAInfo(), HiMemVT.getStoreSize(), Alignment, MLD->getAAInfo(), MLD->getRanges());
MLD->getRanges());
Hi = DAG.getMaskedLoad(HiVT, dl, Ch, Ptr, Offset, MaskHi, PassThruHi, HiMemVT, Hi = DAG.getMaskedLoad(HiVT, dl, Ch, Ptr, Offset, MaskHi, PassThruHi, HiMemVT,
MMO, MLD->getAddressingMode(), ExtType, MMO, MLD->getAddressingMode(), ExtType,
@ -1652,7 +1650,7 @@ void DAGTypeLegalizer::SplitVecRes_MGATHER(MaskedGatherSDNode *MGT,
MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
MGT->getPointerInfo(), MachineMemOperand::MOLoad, MGT->getPointerInfo(), MachineMemOperand::MOLoad,
MemoryLocation::UnknownSize, Alignment.value(), MGT->getAAInfo(), MemoryLocation::UnknownSize, Alignment, MGT->getAAInfo(),
MGT->getRanges()); MGT->getRanges());
SDValue OpsLo[] = {Ch, PassThruLo, MaskLo, Ptr, IndexLo, Scale}; SDValue OpsLo[] = {Ch, PassThruLo, MaskLo, Ptr, IndexLo, Scale};
@ -2282,7 +2280,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_MGATHER(MaskedGatherSDNode *MGT,
MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
MGT->getPointerInfo(), MachineMemOperand::MOLoad, LoMemVT.getStoreSize(), MGT->getPointerInfo(), MachineMemOperand::MOLoad, LoMemVT.getStoreSize(),
Alignment.value(), MGT->getAAInfo(), MGT->getRanges()); Alignment, MGT->getAAInfo(), MGT->getRanges());
SDValue OpsLo[] = {Ch, PassThruLo, MaskLo, Ptr, IndexLo, Scale}; SDValue OpsLo[] = {Ch, PassThruLo, MaskLo, Ptr, IndexLo, Scale};
SDValue Lo = DAG.getMaskedGather(DAG.getVTList(LoVT, MVT::Other), LoVT, dl, SDValue Lo = DAG.getMaskedGather(DAG.getVTList(LoVT, MVT::Other), LoVT, dl,
@ -2290,7 +2288,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_MGATHER(MaskedGatherSDNode *MGT,
MMO = DAG.getMachineFunction().getMachineMemOperand( MMO = DAG.getMachineFunction().getMachineMemOperand(
MGT->getPointerInfo(), MachineMemOperand::MOLoad, HiMemVT.getStoreSize(), MGT->getPointerInfo(), MachineMemOperand::MOLoad, HiMemVT.getStoreSize(),
Alignment.value(), MGT->getAAInfo(), MGT->getRanges()); Alignment, MGT->getAAInfo(), MGT->getRanges());
SDValue OpsHi[] = {Ch, PassThruHi, MaskHi, Ptr, IndexHi, Scale}; SDValue OpsHi[] = {Ch, PassThruHi, MaskHi, Ptr, IndexHi, Scale};
SDValue Hi = DAG.getMaskedGather(DAG.getVTList(HiVT, MVT::Other), HiVT, dl, SDValue Hi = DAG.getMaskedGather(DAG.getVTList(HiVT, MVT::Other), HiVT, dl,
@ -2348,7 +2346,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_MSTORE(MaskedStoreSDNode *N,
SDValue Lo, Hi; SDValue Lo, Hi;
MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
N->getPointerInfo(), MachineMemOperand::MOStore, LoMemVT.getStoreSize(), N->getPointerInfo(), MachineMemOperand::MOStore, LoMemVT.getStoreSize(),
Alignment.value(), N->getAAInfo(), N->getRanges()); Alignment, N->getAAInfo(), N->getRanges());
Lo = DAG.getMaskedStore(Ch, DL, DataLo, Ptr, Offset, MaskLo, LoMemVT, MMO, Lo = DAG.getMaskedStore(Ch, DL, DataLo, Ptr, Offset, MaskLo, LoMemVT, MMO,
N->getAddressingMode(), N->isTruncatingStore(), N->getAddressingMode(), N->isTruncatingStore(),
@ -2360,8 +2358,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_MSTORE(MaskedStoreSDNode *N,
MMO = DAG.getMachineFunction().getMachineMemOperand( MMO = DAG.getMachineFunction().getMachineMemOperand(
N->getPointerInfo().getWithOffset(HiOffset), MachineMemOperand::MOStore, N->getPointerInfo().getWithOffset(HiOffset), MachineMemOperand::MOStore,
HiMemVT.getStoreSize(), Alignment.value(), N->getAAInfo(), HiMemVT.getStoreSize(), Alignment, N->getAAInfo(), N->getRanges());
N->getRanges());
Hi = DAG.getMaskedStore(Ch, DL, DataHi, Ptr, Offset, MaskHi, HiMemVT, MMO, Hi = DAG.getMaskedStore(Ch, DL, DataHi, Ptr, Offset, MaskHi, HiMemVT, MMO,
N->getAddressingMode(), N->isTruncatingStore(), N->getAddressingMode(), N->isTruncatingStore(),
@ -2412,8 +2409,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_MSCATTER(MaskedScatterSDNode *N,
SDValue Lo; SDValue Lo;
MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
N->getPointerInfo(), MachineMemOperand::MOStore, N->getPointerInfo(), MachineMemOperand::MOStore,
MemoryLocation::UnknownSize, Alignment.value(), N->getAAInfo(), MemoryLocation::UnknownSize, Alignment, N->getAAInfo(), N->getRanges());
N->getRanges());
SDValue OpsLo[] = {Ch, DataLo, MaskLo, Ptr, IndexLo, Scale}; SDValue OpsLo[] = {Ch, DataLo, MaskLo, Ptr, IndexLo, Scale};
Lo = DAG.getMaskedScatter(DAG.getVTList(MVT::Other), DataLo.getValueType(), Lo = DAG.getMaskedScatter(DAG.getVTList(MVT::Other), DataLo.getValueType(),
@ -2453,10 +2449,10 @@ SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
if (isTruncating) if (isTruncating)
Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(), LoMemVT, Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(), LoMemVT,
Alignment.value(), MMOFlags, AAInfo); Alignment, MMOFlags, AAInfo);
else else
Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(), Alignment.value(), Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(), Alignment, MMOFlags,
MMOFlags, AAInfo); AAInfo);
// Increment the pointer to the other half. // Increment the pointer to the other half.
Ptr = DAG.getObjectPtrOffset(DL, Ptr, IncrementSize); Ptr = DAG.getObjectPtrOffset(DL, Ptr, IncrementSize);
@ -2464,11 +2460,11 @@ SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
if (isTruncating) if (isTruncating)
Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr, Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
N->getPointerInfo().getWithOffset(IncrementSize), N->getPointerInfo().getWithOffset(IncrementSize),
HiMemVT, Alignment.value(), MMOFlags, AAInfo); HiMemVT, Alignment, MMOFlags, AAInfo);
else else
Hi = DAG.getStore(Ch, DL, Hi, Ptr, Hi = DAG.getStore(Ch, DL, Hi, Ptr,
N->getPointerInfo().getWithOffset(IncrementSize), N->getPointerInfo().getWithOffset(IncrementSize),
Alignment.value(), MMOFlags, AAInfo); Alignment, MMOFlags, AAInfo);
return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi); return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
} }

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@ -6822,8 +6822,8 @@ SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
uint64_t Size = MemoryLocation::getSizeOrUnknown(MemVT.getStoreSize()); uint64_t Size = MemoryLocation::getSizeOrUnknown(MemVT.getStoreSize());
MachineFunction &MF = getMachineFunction(); MachineFunction &MF = getMachineFunction();
MachineMemOperand *MMO = MF.getMachineMemOperand( MachineMemOperand *MMO = MF.getMachineMemOperand(PtrInfo, MMOFlags, Size,
PtrInfo, MMOFlags, Size, Alignment.value(), AAInfo, Ranges); Alignment, AAInfo, Ranges);
return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
} }
@ -6943,8 +6943,8 @@ SDValue SelectionDAG::getStore(SDValue Chain, const SDLoc &dl, SDValue Val,
MachineFunction &MF = getMachineFunction(); MachineFunction &MF = getMachineFunction();
uint64_t Size = uint64_t Size =
MemoryLocation::getSizeOrUnknown(Val.getValueType().getStoreSize()); MemoryLocation::getSizeOrUnknown(Val.getValueType().getStoreSize());
MachineMemOperand *MMO = MF.getMachineMemOperand(PtrInfo, MMOFlags, Size, MachineMemOperand *MMO =
Alignment.value(), AAInfo); MF.getMachineMemOperand(PtrInfo, MMOFlags, Size, Alignment, AAInfo);
return getStore(Chain, dl, Val, Ptr, MMO); return getStore(Chain, dl, Val, Ptr, MMO);
} }
@ -6994,7 +6994,7 @@ SDValue SelectionDAG::getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val,
MachineFunction &MF = getMachineFunction(); MachineFunction &MF = getMachineFunction();
MachineMemOperand *MMO = MF.getMachineMemOperand( MachineMemOperand *MMO = MF.getMachineMemOperand(
PtrInfo, MMOFlags, SVT.getStoreSize(), Alignment.value(), AAInfo); PtrInfo, MMOFlags, SVT.getStoreSize(), Alignment, AAInfo);
return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
} }

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@ -2512,7 +2512,7 @@ static SDValue getLoadStackGuard(SelectionDAG &DAG, const SDLoc &DL,
auto Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant | auto Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant |
MachineMemOperand::MODereferenceable; MachineMemOperand::MODereferenceable;
MachineMemOperand *MemRef = MF.getMachineMemOperand( MachineMemOperand *MemRef = MF.getMachineMemOperand(
MPInfo, Flags, PtrTy.getSizeInBits() / 8, DAG.getEVTAlignment(PtrTy)); MPInfo, Flags, PtrTy.getSizeInBits() / 8, DAG.getEVTAlign(PtrTy));
DAG.setNodeMemRefs(Node, {MemRef}); DAG.setNodeMemRefs(Node, {MemRef});
} }
if (PtrTy != PtrMemTy) if (PtrTy != PtrMemTy)
@ -4574,13 +4574,10 @@ void SelectionDAGBuilder::visitAtomicLoad(const LoadInst &I) {
auto Flags = TLI.getLoadMemOperandFlags(I, DAG.getDataLayout()); auto Flags = TLI.getLoadMemOperandFlags(I, DAG.getDataLayout());
MachineMemOperand *MMO = MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
DAG.getMachineFunction(). MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(),
getMachineMemOperand(MachinePointerInfo(I.getPointerOperand()), I.getAlign().getValueOr(DAG.getEVTAlign(MemVT)), AAMDNodes(), nullptr,
Flags, MemVT.getStoreSize(), SSID, Order);
I.getAlignment() ? I.getAlignment() :
DAG.getEVTAlignment(MemVT),
AAMDNodes(), nullptr, SSID, Order);
InChain = TLI.prepareVolatileOrAtomicLoad(InChain, dl, DAG); InChain = TLI.prepareVolatileOrAtomicLoad(InChain, dl, DAG);
@ -4631,10 +4628,9 @@ void SelectionDAGBuilder::visitAtomicStore(const StoreInst &I) {
auto Flags = TLI.getStoreMemOperandFlags(I, DAG.getDataLayout()); auto Flags = TLI.getStoreMemOperandFlags(I, DAG.getDataLayout());
MachineFunction &MF = DAG.getMachineFunction(); MachineFunction &MF = DAG.getMachineFunction();
MachineMemOperand *MMO = MachineMemOperand *MMO = MF.getMachineMemOperand(
MF.getMachineMemOperand(MachinePointerInfo(I.getPointerOperand()), Flags, MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(),
MemVT.getStoreSize(), I.getAlignment(), AAMDNodes(), *I.getAlign(), AAMDNodes(), nullptr, SSID, Ordering);
nullptr, SSID, Ordering);
SDValue Val = getValue(I.getValueOperand()); SDValue Val = getValue(I.getValueOperand());
if (Val.getValueType() != MemVT) if (Val.getValueType() != MemVT)

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@ -314,9 +314,9 @@ static MachineMemOperand* getMachineMemOperand(MachineFunction &MF,
auto MMOFlags = MachineMemOperand::MOStore | auto MMOFlags = MachineMemOperand::MOStore |
MachineMemOperand::MOLoad | MachineMemOperand::MOVolatile; MachineMemOperand::MOLoad | MachineMemOperand::MOVolatile;
auto &MFI = MF.getFrameInfo(); auto &MFI = MF.getFrameInfo();
return MF.getMachineMemOperand(PtrInfo, MMOFlags, return MF.getMachineMemOperand(PtrInfo, MMOFlags,
MFI.getObjectSize(FI.getIndex()), MFI.getObjectSize(FI.getIndex()),
MFI.getObjectAlignment(FI.getIndex())); MFI.getObjectAlign(FI.getIndex()));
} }
/// Spill a value incoming to the statepoint. It might be either part of /// Spill a value incoming to the statepoint. It might be either part of
@ -354,10 +354,9 @@ spillIncomingStatepointValue(SDValue Incoming, SDValue Chain,
// slots with preferred alignments larger than frame alignment.. // slots with preferred alignments larger than frame alignment..
auto &MF = Builder.DAG.getMachineFunction(); auto &MF = Builder.DAG.getMachineFunction();
auto PtrInfo = MachinePointerInfo::getFixedStack(MF, Index); auto PtrInfo = MachinePointerInfo::getFixedStack(MF, Index);
auto *StoreMMO = auto *StoreMMO = MF.getMachineMemOperand(
MF.getMachineMemOperand(PtrInfo, MachineMemOperand::MOStore, PtrInfo, MachineMemOperand::MOStore, MFI.getObjectSize(Index),
MFI.getObjectSize(Index), MFI.getObjectAlign(Index));
MFI.getObjectAlignment(Index));
Chain = Builder.DAG.getStore(Chain, Builder.getCurSDLoc(), Incoming, Loc, Chain = Builder.DAG.getStore(Chain, Builder.getCurSDLoc(), Incoming, Loc,
StoreMMO); StoreMMO);
@ -1002,10 +1001,9 @@ void SelectionDAGBuilder::visitGCRelocate(const GCRelocateInst &Relocate) {
auto &MF = DAG.getMachineFunction(); auto &MF = DAG.getMachineFunction();
auto &MFI = MF.getFrameInfo(); auto &MFI = MF.getFrameInfo();
auto PtrInfo = MachinePointerInfo::getFixedStack(MF, Index); auto PtrInfo = MachinePointerInfo::getFixedStack(MF, Index);
auto *LoadMMO = auto *LoadMMO = MF.getMachineMemOperand(PtrInfo, MachineMemOperand::MOLoad,
MF.getMachineMemOperand(PtrInfo, MachineMemOperand::MOLoad, MFI.getObjectSize(Index),
MFI.getObjectSize(Index), MFI.getObjectAlign(Index));
MFI.getObjectAlignment(Index));
auto LoadVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), auto LoadVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(),
Relocate.getType()); Relocate.getType());

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@ -690,10 +690,10 @@ void HexagonSplitDoubleRegs::splitMemRef(MachineInstr *MI,
MachineMemOperand::Flags F = MO->getFlags(); MachineMemOperand::Flags F = MO->getFlags();
Align A = MO->getAlign(); Align A = MO->getAlign();
auto *Tmp1 = MF.getMachineMemOperand(Ptr, F, 4 /*size*/, A.value()); auto *Tmp1 = MF.getMachineMemOperand(Ptr, F, 4 /*size*/, A);
LowI->addMemOperand(MF, Tmp1); LowI->addMemOperand(MF, Tmp1);
auto *Tmp2 = MF.getMachineMemOperand(Ptr, F, 4 /*size*/, auto *Tmp2 =
std::min(A, Align(4)).value()); MF.getMachineMemOperand(Ptr, F, 4 /*size*/, std::min(A, Align(4)));
HighI->addMemOperand(MF, Tmp2); HighI->addMemOperand(MF, Tmp2);
} }
} }

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@ -416,9 +416,9 @@ bool HexagonStoreWidening::createWideStores(InstrGroup &OG, InstrGroup &NG,
MachineInstr *FirstSt = OG.front(); MachineInstr *FirstSt = OG.front();
DebugLoc DL = OG.back()->getDebugLoc(); DebugLoc DL = OG.back()->getDebugLoc();
const MachineMemOperand &OldM = getStoreTarget(FirstSt); const MachineMemOperand &OldM = getStoreTarget(FirstSt);
MachineMemOperand *NewM = MF->getMachineMemOperand( MachineMemOperand *NewM =
OldM.getPointerInfo(), OldM.getFlags(), TotalSize, MF->getMachineMemOperand(OldM.getPointerInfo(), OldM.getFlags(),
OldM.getAlign().value(), OldM.getAAInfo()); TotalSize, OldM.getAlign(), OldM.getAAInfo());
if (Acc < 0x10000) { if (Acc < 0x10000) {
// Create mem[hw] = #Acc // Create mem[hw] = #Acc

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@ -73,7 +73,7 @@ void MSP430InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineMemOperand *MMO = MF.getMachineMemOperand( MachineMemOperand *MMO = MF.getMachineMemOperand(
MachinePointerInfo::getFixedStack(MF, FrameIdx), MachinePointerInfo::getFixedStack(MF, FrameIdx),
MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIdx), MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIdx),
MFI.getObjectAlignment(FrameIdx)); MFI.getObjectAlign(FrameIdx));
if (RC == &MSP430::GR16RegClass) if (RC == &MSP430::GR16RegClass)
BuildMI(MBB, MI, DL, get(MSP430::MOV16rm)) BuildMI(MBB, MI, DL, get(MSP430::MOV16rm))

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@ -180,8 +180,8 @@ Register IncomingValueHandler::getStackAddress(const CCValAssign &VA,
const TargetFrameLowering *TFL = MF.getSubtarget().getFrameLowering(); const TargetFrameLowering *TFL = MF.getSubtarget().getFrameLowering();
Align Alignment = commonAlignment(TFL->getStackAlign(), Offset); Align Alignment = commonAlignment(TFL->getStackAlign(), Offset);
MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, Size, MMO =
Alignment.value()); MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, Size, Alignment);
return MIRBuilder.buildFrameIndex(LLT::pointer(0, 32), FI).getReg(0); return MIRBuilder.buildFrameIndex(LLT::pointer(0, 32), FI).getReg(0);
} }

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@ -7900,7 +7900,7 @@ void PPCTargetLowering::LowerFP_TO_INTForReuse(SDValue Op, ReuseLoadInfo &RLI,
if (i32Stack) { if (i32Stack) {
MachineFunction &MF = DAG.getMachineFunction(); MachineFunction &MF = DAG.getMachineFunction();
MachineMemOperand *MMO = MachineMemOperand *MMO =
MF.getMachineMemOperand(MPI, MachineMemOperand::MOStore, 4, 4); MF.getMachineMemOperand(MPI, MachineMemOperand::MOStore, 4, Align(4));
SDValue Ops[] = { DAG.getEntryNode(), Tmp, FIPtr }; SDValue Ops[] = { DAG.getEntryNode(), Tmp, FIPtr };
Chain = DAG.getMemIntrinsicNode(PPCISD::STFIWX, dl, Chain = DAG.getMemIntrinsicNode(PPCISD::STFIWX, dl,
DAG.getVTList(MVT::Other), Ops, MVT::i32, MMO); DAG.getVTList(MVT::Other), Ops, MVT::i32, MMO);
@ -12036,9 +12036,9 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
int FrameIdx = MFI.CreateStackObject(8, 8, false); int FrameIdx = MFI.CreateStackObject(8, 8, false);
MachineMemOperand *MMOStore = F->getMachineMemOperand( MachineMemOperand *MMOStore = F->getMachineMemOperand(
MachinePointerInfo::getFixedStack(*F, FrameIdx, 0), MachinePointerInfo::getFixedStack(*F, FrameIdx, 0),
MachineMemOperand::MOStore, MFI.getObjectSize(FrameIdx), MachineMemOperand::MOStore, MFI.getObjectSize(FrameIdx),
MFI.getObjectAlignment(FrameIdx)); MFI.getObjectAlign(FrameIdx));
// Store the SrcReg into the stack. // Store the SrcReg into the stack.
BuildMI(*BB, MI, dl, TII->get(StoreOp)) BuildMI(*BB, MI, dl, TII->get(StoreOp))
@ -12048,9 +12048,9 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
.addMemOperand(MMOStore); .addMemOperand(MMOStore);
MachineMemOperand *MMOLoad = F->getMachineMemOperand( MachineMemOperand *MMOLoad = F->getMachineMemOperand(
MachinePointerInfo::getFixedStack(*F, FrameIdx, 0), MachinePointerInfo::getFixedStack(*F, FrameIdx, 0),
MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIdx), MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIdx),
MFI.getObjectAlignment(FrameIdx)); MFI.getObjectAlign(FrameIdx));
// Load from the stack where SrcReg is stored, and save to DestReg, // Load from the stack where SrcReg is stored, and save to DestReg,
// so we have done the RegClass conversion from RegClass::SrcReg to // so we have done the RegClass conversion from RegClass::SrcReg to

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@ -1206,7 +1206,7 @@ static MachineBasicBlock *emitSplitF64Pseudo(MachineInstr &MI,
RI); RI);
MachineMemOperand *MMO = MachineMemOperand *MMO =
MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MF, FI), MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MF, FI),
MachineMemOperand::MOLoad, 8, 8); MachineMemOperand::MOLoad, 8, Align(8));
BuildMI(*BB, MI, DL, TII.get(RISCV::LW), LoReg) BuildMI(*BB, MI, DL, TII.get(RISCV::LW), LoReg)
.addFrameIndex(FI) .addFrameIndex(FI)
.addImm(0) .addImm(0)
@ -1236,7 +1236,7 @@ static MachineBasicBlock *emitBuildPairF64Pseudo(MachineInstr &MI,
MachineMemOperand *MMO = MachineMemOperand *MMO =
MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MF, FI), MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MF, FI),
MachineMemOperand::MOStore, 8, 8); MachineMemOperand::MOStore, 8, Align(8));
BuildMI(*BB, MI, DL, TII.get(RISCV::SW)) BuildMI(*BB, MI, DL, TII.get(RISCV::SW))
.addReg(LoReg, getKillRegState(MI.getOperand(1).isKill())) .addReg(LoReg, getKillRegState(MI.getOperand(1).isKill()))
.addFrameIndex(FI) .addFrameIndex(FI)

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@ -403,7 +403,7 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
const MachineFrameInfo &MFI = MF->getFrameInfo(); const MachineFrameInfo &MFI = MF->getFrameInfo();
MachineMemOperand *MMO = MF->getMachineMemOperand( MachineMemOperand *MMO = MF->getMachineMemOperand(
MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOStore, MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOStore,
MFI.getObjectSize(FI), MFI.getObjectAlignment(FI)); MFI.getObjectSize(FI), MFI.getObjectAlign(FI));
// On the order of operands here: think "[FrameIdx + 0] = SrcReg". // On the order of operands here: think "[FrameIdx + 0] = SrcReg".
if (RC == &SP::I64RegsRegClass) if (RC == &SP::I64RegsRegClass)
@ -442,7 +442,7 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
const MachineFrameInfo &MFI = MF->getFrameInfo(); const MachineFrameInfo &MFI = MF->getFrameInfo();
MachineMemOperand *MMO = MF->getMachineMemOperand( MachineMemOperand *MMO = MF->getMachineMemOperand(
MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOLoad, MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOLoad,
MFI.getObjectSize(FI), MFI.getObjectAlignment(FI)); MFI.getObjectSize(FI), MFI.getObjectAlign(FI));
if (RC == &SP::I64RegsRegClass) if (RC == &SP::I64RegsRegClass)
BuildMI(MBB, I, DL, get(SP::LDXri), DestReg).addFrameIndex(FI).addImm(0) BuildMI(MBB, I, DL, get(SP::LDXri), DestReg).addFrameIndex(FI).addImm(0)

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@ -36,7 +36,7 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI) {
int64_t Offset = 0; int64_t Offset = 0;
MachineMemOperand *MMO = MF.getMachineMemOperand( MachineMemOperand *MMO = MF.getMachineMemOperand(
MachinePointerInfo::getFixedStack(MF, FI, Offset), Flags, MachinePointerInfo::getFixedStack(MF, FI, Offset), Flags,
MFFrame.getObjectSize(FI), MFFrame.getObjectAlignment(FI)); MFFrame.getObjectSize(FI), MFFrame.getObjectAlign(FI));
return MIB.addFrameIndex(FI).addImm(Offset).addReg(0).addMemOperand(MMO); return MIB.addFrameIndex(FI).addImm(Offset).addReg(0).addMemOperand(MMO);
} }

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@ -148,11 +148,11 @@ struct OutgoingValueHandler : public CallLowering::ValueHandler {
MachinePointerInfo &MPO, CCValAssign &VA) override { MachinePointerInfo &MPO, CCValAssign &VA) override {
MachineFunction &MF = MIRBuilder.getMF(); MachineFunction &MF = MIRBuilder.getMF();
Register ExtReg = extendRegister(ValVReg, VA); Register ExtReg = extendRegister(ValVReg, VA);
unsigned Align = inferAlignmentFromPtrInfo(MF, MPO); unsigned Alignment = inferAlignmentFromPtrInfo(MF, MPO);
auto MMO = MF.getMachineMemOperand( auto MMO =
MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(), MF.getMachineMemOperand(MPO, MachineMemOperand::MOStore,
Align); VA.getLocVT().getStoreSize(), Align(Alignment));
MIRBuilder.buildStore(ExtReg, Addr, *MMO); MIRBuilder.buildStore(ExtReg, Addr, *MMO);
} }

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@ -3423,7 +3423,7 @@ bool X86FastISel::fastLowerCall(CallLoweringInfo &CLI) {
AM.Base.Reg = RegInfo->getStackRegister(); AM.Base.Reg = RegInfo->getStackRegister();
AM.Disp = LocMemOffset; AM.Disp = LocMemOffset;
ISD::ArgFlagsTy Flags = OutFlags[VA.getValNo()]; ISD::ArgFlagsTy Flags = OutFlags[VA.getValNo()];
unsigned Alignment = DL.getABITypeAlignment(ArgVal->getType()); Align Alignment = DL.getABITypeAlign(ArgVal->getType());
MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand( MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
MachinePointerInfo::getStack(*FuncInfo.MF, LocMemOffset), MachinePointerInfo::getStack(*FuncInfo.MF, LocMemOffset),
MachineMemOperand::MOStore, ArgVT.getStoreSize(), Alignment); MachineMemOperand::MOStore, ArgVT.getStoreSize(), Alignment);
@ -3775,11 +3775,7 @@ unsigned X86FastISel::X86MaterializeFP(const ConstantFP *CFP, MVT VT) {
} }
// MachineConstantPool wants an explicit alignment. // MachineConstantPool wants an explicit alignment.
unsigned Align = DL.getPrefTypeAlignment(CFP->getType()); Align Alignment = DL.getPrefTypeAlign(CFP->getType());
if (Align == 0) {
// Alignment of vector types. FIXME!
Align = DL.getTypeAllocSize(CFP->getType());
}
// x86-32 PIC requires a PIC base register for constant pools. // x86-32 PIC requires a PIC base register for constant pools.
unsigned PICBase = 0; unsigned PICBase = 0;
@ -3792,7 +3788,7 @@ unsigned X86FastISel::X86MaterializeFP(const ConstantFP *CFP, MVT VT) {
PICBase = X86::RIP; PICBase = X86::RIP;
// Create the load from the constant pool. // Create the load from the constant pool.
unsigned CPI = MCP.getConstantPoolIndex(CFP, Align); unsigned CPI = MCP.getConstantPoolIndex(CFP, Alignment.value());
unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy)); unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy));
if (CM == CodeModel::Large) { if (CM == CodeModel::Large) {
@ -3805,7 +3801,7 @@ unsigned X86FastISel::X86MaterializeFP(const ConstantFP *CFP, MVT VT) {
addDirectMem(MIB, AddrReg); addDirectMem(MIB, AddrReg);
MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand( MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
MachinePointerInfo::getConstantPool(*FuncInfo.MF), MachinePointerInfo::getConstantPool(*FuncInfo.MF),
MachineMemOperand::MOLoad, DL.getPointerSize(), Align); MachineMemOperand::MOLoad, DL.getPointerSize(), Alignment);
MIB->addMemOperand(*FuncInfo.MF, MMO); MIB->addMemOperand(*FuncInfo.MF, MMO);
return ResultReg; return ResultReg;
} }

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@ -1514,17 +1514,17 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher), addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher),
Establisher, false, PSPSlotOffset) Establisher, false, PSPSlotOffset)
.addMemOperand(MF.getMachineMemOperand( .addMemOperand(MF.getMachineMemOperand(
NoInfo, MachineMemOperand::MOLoad, SlotSize, SlotSize)); NoInfo, MachineMemOperand::MOLoad, SlotSize, Align(SlotSize)));
; ;
// Save the root establisher back into the current funclet's (mostly // Save the root establisher back into the current funclet's (mostly
// empty) frame, in case a sub-funclet or the GC needs it. // empty) frame, in case a sub-funclet or the GC needs it.
addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr,
false, PSPSlotOffset) false, PSPSlotOffset)
.addReg(Establisher) .addReg(Establisher)
.addMemOperand( .addMemOperand(MF.getMachineMemOperand(
MF.getMachineMemOperand(NoInfo, MachineMemOperand::MOStore | NoInfo,
MachineMemOperand::MOVolatile, MachineMemOperand::MOStore | MachineMemOperand::MOVolatile,
SlotSize, SlotSize)); SlotSize, Align(SlotSize)));
} }
SPOrEstablisher = Establisher; SPOrEstablisher = Establisher;
} else { } else {
@ -1614,7 +1614,7 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
.addReg(StackPtr) .addReg(StackPtr)
.addMemOperand(MF.getMachineMemOperand( .addMemOperand(MF.getMachineMemOperand(
PSPInfo, MachineMemOperand::MOStore | MachineMemOperand::MOVolatile, PSPInfo, MachineMemOperand::MOStore | MachineMemOperand::MOVolatile,
SlotSize, SlotSize)); SlotSize, Align(SlotSize)));
} }
// Realign stack after we spilled callee-saved registers (so that we'll be // Realign stack after we spilled callee-saved registers (so that we'll be

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@ -19232,7 +19232,7 @@ SDValue X86TargetLowering::LowerSINT_TO_FP(SDValue Op,
std::pair<SDValue, SDValue> X86TargetLowering::BuildFILD( std::pair<SDValue, SDValue> X86TargetLowering::BuildFILD(
EVT DstVT, EVT SrcVT, const SDLoc &DL, SDValue Chain, SDValue Pointer, EVT DstVT, EVT SrcVT, const SDLoc &DL, SDValue Chain, SDValue Pointer,
MachinePointerInfo PtrInfo, unsigned Align, SelectionDAG &DAG) const { MachinePointerInfo PtrInfo, unsigned Alignment, SelectionDAG &DAG) const {
// Build the FILD // Build the FILD
SDVTList Tys; SDVTList Tys;
bool useSSE = isScalarFPTypeInSSEReg(DstVT); bool useSSE = isScalarFPTypeInSSEReg(DstVT);
@ -19244,7 +19244,7 @@ std::pair<SDValue, SDValue> X86TargetLowering::BuildFILD(
SDValue FILDOps[] = {Chain, Pointer}; SDValue FILDOps[] = {Chain, Pointer};
SDValue Result = SDValue Result =
DAG.getMemIntrinsicNode(X86ISD::FILD, DL, Tys, FILDOps, SrcVT, PtrInfo, DAG.getMemIntrinsicNode(X86ISD::FILD, DL, Tys, FILDOps, SrcVT, PtrInfo,
Align, MachineMemOperand::MOLoad); Alignment, MachineMemOperand::MOLoad);
Chain = Result.getValue(1); Chain = Result.getValue(1);
if (useSSE) { if (useSSE) {
@ -19257,7 +19257,7 @@ std::pair<SDValue, SDValue> X86TargetLowering::BuildFILD(
SDValue FSTOps[] = {Chain, Result, StackSlot}; SDValue FSTOps[] = {Chain, Result, StackSlot};
MachineMemOperand *StoreMMO = DAG.getMachineFunction().getMachineMemOperand( MachineMemOperand *StoreMMO = DAG.getMachineFunction().getMachineMemOperand(
MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SSFI), MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SSFI),
MachineMemOperand::MOStore, SSFISize, SSFISize); MachineMemOperand::MOStore, SSFISize, Align(SSFISize));
Chain = Chain =
DAG.getMemIntrinsicNode(X86ISD::FST, DL, Tys, FSTOps, DstVT, StoreMMO); DAG.getMemIntrinsicNode(X86ISD::FST, DL, Tys, FSTOps, DstVT, StoreMMO);
@ -19900,14 +19900,14 @@ X86TargetLowering::FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG,
unsigned FLDSize = TheVT.getStoreSize(); unsigned FLDSize = TheVT.getStoreSize();
assert(FLDSize <= MemSize && "Stack slot not big enough"); assert(FLDSize <= MemSize && "Stack slot not big enough");
MachineMemOperand *MMO = MF.getMachineMemOperand( MachineMemOperand *MMO = MF.getMachineMemOperand(
MPI, MachineMemOperand::MOLoad, FLDSize, FLDSize); MPI, MachineMemOperand::MOLoad, FLDSize, Align(FLDSize));
Value = DAG.getMemIntrinsicNode(X86ISD::FLD, DL, Tys, Ops, TheVT, MMO); Value = DAG.getMemIntrinsicNode(X86ISD::FLD, DL, Tys, Ops, TheVT, MMO);
Chain = Value.getValue(1); Chain = Value.getValue(1);
} }
// Build the FP_TO_INT*_IN_MEM // Build the FP_TO_INT*_IN_MEM
MachineMemOperand *MMO = MF.getMachineMemOperand( MachineMemOperand *MMO = MF.getMachineMemOperand(
MPI, MachineMemOperand::MOStore, MemSize, MemSize); MPI, MachineMemOperand::MOStore, MemSize, Align(MemSize));
SDValue Ops[] = { Chain, Value, StackSlot }; SDValue Ops[] = { Chain, Value, StackSlot };
SDValue FIST = DAG.getMemIntrinsicNode(X86ISD::FP_TO_INT_IN_MEM, DL, SDValue FIST = DAG.getMemIntrinsicNode(X86ISD::FP_TO_INT_IN_MEM, DL,
DAG.getVTList(MVT::Other), DAG.getVTList(MVT::Other),
@ -31069,7 +31069,7 @@ MachineBasicBlock *X86TargetLowering::EmitVAStartSaveXMMRegsWithCustomInserter(
MachineMemOperand *MMO = F->getMachineMemOperand( MachineMemOperand *MMO = F->getMachineMemOperand(
MachinePointerInfo::getFixedStack(*F, RegSaveFrameIndex, Offset), MachinePointerInfo::getFixedStack(*F, RegSaveFrameIndex, Offset),
MachineMemOperand::MOStore, MachineMemOperand::MOStore,
/*Size=*/16, /*Align=*/16); /*Size=*/16, Align(16));
BuildMI(XMMSaveMBB, DL, TII->get(MOVOpc)) BuildMI(XMMSaveMBB, DL, TII->get(MOVOpc))
.addFrameIndex(RegSaveFrameIndex) .addFrameIndex(RegSaveFrameIndex)
.addImm(/*Scale=*/1) .addImm(/*Scale=*/1)

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@ -207,7 +207,7 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
Flags |= MachineMemOperand::MOStore; Flags |= MachineMemOperand::MOStore;
MachineMemOperand *MMO = MF.getMachineMemOperand( MachineMemOperand *MMO = MF.getMachineMemOperand(
MachinePointerInfo::getFixedStack(MF, FI, Offset), Flags, MachinePointerInfo::getFixedStack(MF, FI, Offset), Flags,
MFI.getObjectSize(FI), MFI.getObjectAlignment(FI)); MFI.getObjectSize(FI), MFI.getObjectAlign(FI));
return addOffset(MIB.addFrameIndex(FI), Offset) return addOffset(MIB.addFrameIndex(FI), Offset)
.addMemOperand(MMO); .addMemOperand(MMO);
} }

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@ -4473,7 +4473,7 @@ static void expandLoadStackGuard(MachineInstrBuilder &MIB,
MachineMemOperand::MODereferenceable | MachineMemOperand::MODereferenceable |
MachineMemOperand::MOInvariant; MachineMemOperand::MOInvariant;
MachineMemOperand *MMO = MBB.getParent()->getMachineMemOperand( MachineMemOperand *MMO = MBB.getParent()->getMachineMemOperand(
MachinePointerInfo::getGOT(*MBB.getParent()), Flags, 8, 8); MachinePointerInfo::getGOT(*MBB.getParent()), Flags, 8, Align(8));
MachineBasicBlock::iterator I = MIB.getInstr(); MachineBasicBlock::iterator I = MIB.getInstr();
BuildMI(MBB, I, DL, TII.get(X86::MOV64rm), Reg).addReg(X86::RIP).addImm(1) BuildMI(MBB, I, DL, TII.get(X86::MOV64rm), Reg).addReg(X86::RIP).addImm(1)

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@ -1458,7 +1458,7 @@ bool X86InstructionSelector::materializeFP(MachineInstr &I,
MachineMemOperand *MMO = MF.getMachineMemOperand( MachineMemOperand *MMO = MF.getMachineMemOperand(
MachinePointerInfo::getConstantPool(MF), MachineMemOperand::MOLoad, MachinePointerInfo::getConstantPool(MF), MachineMemOperand::MOLoad,
MF.getDataLayout().getPointerSize(), Alignment.value()); MF.getDataLayout().getPointerSize(), Alignment);
LoadInst = LoadInst =
addDirectMem(BuildMI(*I.getParent(), I, DbgLoc, TII.get(Opc), DstReg), addDirectMem(BuildMI(*I.getParent(), I, DbgLoc, TII.get(Opc), DstReg),

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@ -179,7 +179,7 @@ static MachineMemOperand *getFrameIndexMMO(MachineBasicBlock &MBB,
const MachineFrameInfo &MFI = MF->getFrameInfo(); const MachineFrameInfo &MFI = MF->getFrameInfo();
MachineMemOperand *MMO = MF->getMachineMemOperand( MachineMemOperand *MMO = MF->getMachineMemOperand(
MachinePointerInfo::getFixedStack(*MF, FrameIndex), flags, MachinePointerInfo::getFixedStack(*MF, FrameIndex), flags,
MFI.getObjectSize(FrameIndex), MFI.getObjectAlignment(FrameIndex)); MFI.getObjectSize(FrameIndex), MFI.getObjectAlign(FrameIndex));
return MMO; return MMO;
} }

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@ -152,7 +152,7 @@ void XCoreDAGToDAGISel::Select(SDNode *N) {
CurDAG->getEntryNode()); CurDAG->getEntryNode());
MachineMemOperand *MemOp = MachineMemOperand *MemOp =
MF->getMachineMemOperand(MachinePointerInfo::getConstantPool(*MF), MF->getMachineMemOperand(MachinePointerInfo::getConstantPool(*MF),
MachineMemOperand::MOLoad, 4, 4); MachineMemOperand::MOLoad, 4, Align(4));
CurDAG->setNodeMemRefs(cast<MachineSDNode>(node), {MemOp}); CurDAG->setNodeMemRefs(cast<MachineSDNode>(node), {MemOp});
ReplaceNode(N, node); ReplaceNode(N, node);
return; return;

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@ -370,7 +370,7 @@ void XCoreInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
MachineMemOperand *MMO = MF->getMachineMemOperand( MachineMemOperand *MMO = MF->getMachineMemOperand(
MachinePointerInfo::getFixedStack(*MF, FrameIndex), MachinePointerInfo::getFixedStack(*MF, FrameIndex),
MachineMemOperand::MOStore, MFI.getObjectSize(FrameIndex), MachineMemOperand::MOStore, MFI.getObjectSize(FrameIndex),
MFI.getObjectAlignment(FrameIndex)); MFI.getObjectAlign(FrameIndex));
BuildMI(MBB, I, DL, get(XCore::STWFI)) BuildMI(MBB, I, DL, get(XCore::STWFI))
.addReg(SrcReg, getKillRegState(isKill)) .addReg(SrcReg, getKillRegState(isKill))
.addFrameIndex(FrameIndex) .addFrameIndex(FrameIndex)
@ -392,7 +392,7 @@ void XCoreInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineMemOperand *MMO = MF->getMachineMemOperand( MachineMemOperand *MMO = MF->getMachineMemOperand(
MachinePointerInfo::getFixedStack(*MF, FrameIndex), MachinePointerInfo::getFixedStack(*MF, FrameIndex),
MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIndex), MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIndex),
MFI.getObjectAlignment(FrameIndex)); MFI.getObjectAlign(FrameIndex));
BuildMI(MBB, I, DL, get(XCore::LDWFI), DestReg) BuildMI(MBB, I, DL, get(XCore::LDWFI), DestReg)
.addFrameIndex(FrameIndex) .addFrameIndex(FrameIndex)
.addImm(0) .addImm(0)

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@ -2578,7 +2578,7 @@ TEST_F(AArch64GISelMITest, BitcastLoad) {
DefineLegalizerInfo(A, {}); DefineLegalizerInfo(A, {});
MachineMemOperand *MMO = B.getMF().getMachineMemOperand( MachineMemOperand *MMO = B.getMF().getMachineMemOperand(
MachinePointerInfo(), MachineMemOperand::MOLoad, 4, 4); MachinePointerInfo(), MachineMemOperand::MOLoad, 4, Align(4));
auto Load = B.buildLoad(V4S8, Ptr, *MMO); auto Load = B.buildLoad(V4S8, Ptr, *MMO);
AInfo Info(MF->getSubtarget()); AInfo Info(MF->getSubtarget());
@ -2611,7 +2611,7 @@ TEST_F(AArch64GISelMITest, BitcastStore) {
DefineLegalizerInfo(A, {}); DefineLegalizerInfo(A, {});
MachineMemOperand *MMO = B.getMF().getMachineMemOperand( MachineMemOperand *MMO = B.getMF().getMachineMemOperand(
MachinePointerInfo(), MachineMemOperand::MOStore, 4, 4); MachinePointerInfo(), MachineMemOperand::MOStore, 4, Align(4));
auto Val = B.buildUndef(V4S8); auto Val = B.buildUndef(V4S8);
auto Store = B.buildStore(Val, Ptr, *MMO); auto Store = B.buildStore(Val, Ptr, *MMO);

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@ -302,11 +302,10 @@ TEST_F(AArch64GISelMITest, BuildAtomicRMW) {
SmallVector<Register, 4> Copies; SmallVector<Register, 4> Copies;
collectCopies(Copies, MF); collectCopies(Copies, MF);
MachineMemOperand *MMO = MachineMemOperand *MMO = MF->getMachineMemOperand(
MF->getMachineMemOperand(
MachinePointerInfo(), MachinePointerInfo(),
MachineMemOperand::MOLoad | MachineMemOperand::MOStore, MachineMemOperand::MOLoad | MachineMemOperand::MOStore, 8, Align(8),
8, 8, AAMDNodes(), nullptr, SyncScope::System, AtomicOrdering::Unordered); AAMDNodes(), nullptr, SyncScope::System, AtomicOrdering::Unordered);
auto Ptr = B.buildUndef(P0); auto Ptr = B.buildUndef(P0);
B.buildAtomicRMWFAdd(S64, Ptr, Copies[0], *MMO); B.buildAtomicRMWFAdd(S64, Ptr, Copies[0], *MMO);

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@ -261,7 +261,7 @@ TEST(MachineInstrExtraInfo, AddExtraInfo) {
auto MAI = MCAsmInfo(); auto MAI = MCAsmInfo();
auto MC = createMCContext(&MAI); auto MC = createMCContext(&MAI);
auto MMO = MF->getMachineMemOperand(MachinePointerInfo(), auto MMO = MF->getMachineMemOperand(MachinePointerInfo(),
MachineMemOperand::MOLoad, 8, 8); MachineMemOperand::MOLoad, 8, Align(8));
SmallVector<MachineMemOperand *, 2> MMOs; SmallVector<MachineMemOperand *, 2> MMOs;
MMOs.push_back(MMO); MMOs.push_back(MMO);
MCSymbol *Sym1 = MC->createTempSymbol("pre_label", false); MCSymbol *Sym1 = MC->createTempSymbol("pre_label", false);
@ -308,7 +308,7 @@ TEST(MachineInstrExtraInfo, ChangeExtraInfo) {
auto MAI = MCAsmInfo(); auto MAI = MCAsmInfo();
auto MC = createMCContext(&MAI); auto MC = createMCContext(&MAI);
auto MMO = MF->getMachineMemOperand(MachinePointerInfo(), auto MMO = MF->getMachineMemOperand(MachinePointerInfo(),
MachineMemOperand::MOLoad, 8, 8); MachineMemOperand::MOLoad, 8, Align(8));
SmallVector<MachineMemOperand *, 2> MMOs; SmallVector<MachineMemOperand *, 2> MMOs;
MMOs.push_back(MMO); MMOs.push_back(MMO);
MCSymbol *Sym1 = MC->createTempSymbol("pre_label", false); MCSymbol *Sym1 = MC->createTempSymbol("pre_label", false);
@ -345,7 +345,7 @@ TEST(MachineInstrExtraInfo, RemoveExtraInfo) {
auto MAI = MCAsmInfo(); auto MAI = MCAsmInfo();
auto MC = createMCContext(&MAI); auto MC = createMCContext(&MAI);
auto MMO = MF->getMachineMemOperand(MachinePointerInfo(), auto MMO = MF->getMachineMemOperand(MachinePointerInfo(),
MachineMemOperand::MOLoad, 8, 8); MachineMemOperand::MOLoad, 8, Align(8));
SmallVector<MachineMemOperand *, 2> MMOs; SmallVector<MachineMemOperand *, 2> MMOs;
MMOs.push_back(MMO); MMOs.push_back(MMO);
MMOs.push_back(MMO); MMOs.push_back(MMO);