mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-20 03:23:01 +02:00
Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly
llvm-svn: 57252
This commit is contained in:
parent
a52546fec4
commit
61f8207ac9
@ -392,14 +392,11 @@ unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI,
|
||||
|
||||
// Encode first non-shifter register operand if there is one.
|
||||
unsigned Format = TID.TSFlags & ARMII::FormMask;
|
||||
bool isUnary = (Format == ARMII::DPRdMisc ||
|
||||
Format == ARMII::DPRdIm ||
|
||||
Format == ARMII::DPRdReg ||
|
||||
Format == ARMII::DPRdSoReg ||
|
||||
Format == ARMII::DPRnIm ||
|
||||
Format == ARMII::DPRnReg ||
|
||||
Format == ARMII::DPRnSoReg);
|
||||
if (!isUnary) {
|
||||
bool hasRnOperand= !(Format == ARMII::DPRdMisc ||
|
||||
Format == ARMII::DPRdIm ||
|
||||
Format == ARMII::DPRdReg ||
|
||||
Format == ARMII::DPRdSoReg);
|
||||
if (hasRnOperand) {
|
||||
Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRnShift;
|
||||
++OpIdx;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user