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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 12:41:49 +01:00

Reduce global namespace pollution. NFC.

llvm-svn: 284521
This commit is contained in:
Benjamin Kramer 2016-10-18 19:39:31 +00:00
parent a424fc3b0e
commit 641730af4a
7 changed files with 15 additions and 10 deletions

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@ -41,7 +41,7 @@
using namespace llvm;
using namespace lto;
LLVM_ATTRIBUTE_NORETURN void reportOpenError(StringRef Path, Twine Msg) {
LLVM_ATTRIBUTE_NORETURN static void reportOpenError(StringRef Path, Twine Msg) {
errs() << "failed to open " << Path << ": " << Msg << '\n';
errs().flush();
exit(1);

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@ -1194,7 +1194,7 @@ StringRef sys::getHostCPUName() { return "generic"; }
// On Linux, the number of physical cores can be computed from /proc/cpuinfo,
// using the number of unique physical/core id pairs. The following
// implementation reads the /proc/cpuinfo format on an x86_64 system.
int computeHostNumPhysicalCores() {
static int computeHostNumPhysicalCores() {
// Read /proc/cpuinfo as a stream (until EOF reached). It cannot be
// mmapped because it appears to have 0 size.
llvm::ErrorOr<std::unique_ptr<llvm::MemoryBuffer>> Text =
@ -1236,7 +1236,7 @@ int computeHostNumPhysicalCores() {
}
#else
// On other systems, return -1 to indicate unknown.
int computeHostNumPhysicalCores() { return -1; }
static int computeHostNumPhysicalCores() { return -1; }
#endif
int sys::getHostNumPhysicalCores() {

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@ -47,8 +47,9 @@ LanaiDisassembler::LanaiDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
// Forward declare because the autogenerated code will reference this.
// Definition is further down.
DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
uint64_t Address,
const void *Decoder);
static DecodeStatus decodeRiMemoryValue(MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder);

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@ -73,11 +73,12 @@ static MCInstPrinter *createLanaiMCInstPrinter(const Triple & /*T*/,
return 0;
}
MCRelocationInfo *createLanaiElfRelocation(const Triple &TheTriple,
MCContext &Ctx) {
static MCRelocationInfo *createLanaiElfRelocation(const Triple &TheTriple,
MCContext &Ctx) {
return createMCRelocationInfo(TheTriple, Ctx);
}
namespace {
class LanaiMCInstrAnalysis : public MCInstrAnalysis {
public:
explicit LanaiMCInstrAnalysis(const MCInstrInfo *Info)
@ -106,6 +107,7 @@ public:
}
}
};
} // end anonymous namespace
static MCInstrAnalysis *createLanaiInstrAnalysis(const MCInstrInfo *Info) {
return new LanaiMCInstrAnalysis(Info);

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@ -29151,7 +29151,8 @@ static SDValue combineLogicBlendIntoPBLENDV(SDNode *N, SelectionDAG &DAG,
// into:
// srl(ctlz x), log2(bitsize(x))
// Input pattern is checked by caller.
SDValue lowerX86CmpEqZeroToCtlzSrl(SDValue Op, EVT ExtTy, SelectionDAG &DAG) {
static SDValue lowerX86CmpEqZeroToCtlzSrl(SDValue Op, EVT ExtTy,
SelectionDAG &DAG) {
SDValue Cmp = Op.getOperand(1);
EVT VT = Cmp.getOperand(0).getValueType();
unsigned Log2b = Log2_32(VT.getSizeInBits());

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@ -16,6 +16,7 @@
#include "X86InstrInfo.h"
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/Threading.h"
using namespace llvm;
/// This flag is used in the method llvm::call_once() used below to make the
/// initialization of the map 'OpcodeToGroup' thread safe.

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@ -20,8 +20,7 @@
#include <cassert>
#include <set>
using namespace llvm;
namespace llvm {
/// This class is used to group {132, 213, 231} forms of FMA opcodes together.
/// Each of the groups has either 3 register opcodes, 3 memory opcodes,
/// or 6 register and memory opcodes. Also, each group has an attrubutes field
@ -311,5 +310,6 @@ public:
return rm_iterator(getX86InstrFMA3Info()->OpcodeToGroup.end());
}
};
} // namespace llvm
#endif