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[SDA] Don't stop divergence propagation at the IPD.
Summary: This fixes B42473 and B42706. This patch makes the SDA propagate branch divergence until the end of the RPO traversal. Before, the SyncDependenceAnalysis propagated divergence only until the IPD in rpo order. RPO is incompatible with post dominance in the presence of loops. This made the SDA crash because blocks were missed in the propagation. Reviewers: foad, nhaehnle Reviewed By: foad Subscribers: jvesely, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65274 llvm-svn: 372223
This commit is contained in:
Jay Foad
parent
6a1f00145f
commit
6c1703b074
@ -218,9 +218,11 @@ struct DivergencePropagator {
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template <typename SuccessorIterable>
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std::unique_ptr<ConstBlockSet>
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computeJoinPoints(const BasicBlock &RootBlock,
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SuccessorIterable NodeSuccessors, const Loop *ParentLoop, const BasicBlock * PdBoundBlock) {
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SuccessorIterable NodeSuccessors, const Loop *ParentLoop) {
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assert(JoinBlocks);
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LLVM_DEBUG(dbgs() << "SDA:computeJoinPoints. Parent loop: " << (ParentLoop ? ParentLoop->getName() : "<null>") << "\n" );
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// bootstrap with branch targets
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for (const auto *SuccBlock : NodeSuccessors) {
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DefMap.emplace(SuccBlock, SuccBlock);
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@ -228,13 +230,19 @@ struct DivergencePropagator {
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if (ParentLoop && !ParentLoop->contains(SuccBlock)) {
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// immediate loop exit from node.
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ReachedLoopExits.insert(SuccBlock);
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continue;
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} else {
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// regular successor
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PendingUpdates.insert(SuccBlock);
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}
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}
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LLVM_DEBUG(
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dbgs() << "SDA: rpo order:\n";
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for (const auto * RpoBlock : FuncRPOT) {
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dbgs() << "- " << RpoBlock->getName() << "\n";
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}
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);
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auto ItBeginRPO = FuncRPOT.begin();
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// skip until term (TODO RPOT won't let us start at @term directly)
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@ -245,16 +253,18 @@ struct DivergencePropagator {
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// propagate definitions at the immediate successors of the node in RPO
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auto ItBlockRPO = ItBeginRPO;
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while (++ItBlockRPO != ItEndRPO && *ItBlockRPO != PdBoundBlock) {
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while ((++ItBlockRPO != ItEndRPO) &&
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!PendingUpdates.empty()) {
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const auto *Block = *ItBlockRPO;
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LLVM_DEBUG(dbgs() << "SDA::joins. visiting " << Block->getName() << "\n");
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// skip @block if not pending update
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// skip Block if not pending update
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auto ItPending = PendingUpdates.find(Block);
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if (ItPending == PendingUpdates.end())
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continue;
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PendingUpdates.erase(ItPending);
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// propagate definition at @block to its successors
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// propagate definition at Block to its successors
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auto ItDef = DefMap.find(Block);
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const auto *DefBlock = ItDef->second;
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assert(DefBlock);
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@ -278,6 +288,8 @@ struct DivergencePropagator {
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}
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}
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LLVM_DEBUG(dbgs() << "SDA::joins. After propagation:\n"; printDefs(dbgs()));
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// We need to know the definition at the parent loop header to decide
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// whether the definition at the header is different from the definition at
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// the loop exits, which would indicate a divergent loop exits.
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@ -292,24 +304,17 @@ struct DivergencePropagator {
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// |
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// proper exit from both loops
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//
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// D post-dominates B as it is the only proper exit from the "A loop".
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// If C has a divergent branch, propagation will therefore stop at D.
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// That implies that B will never receive a definition.
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// But that definition can only be the same as at D (D itself in thise case)
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// because all paths to anywhere have to pass through D.
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//
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const BasicBlock *ParentLoopHeader =
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ParentLoop ? ParentLoop->getHeader() : nullptr;
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if (ParentLoop && ParentLoop->contains(PdBoundBlock)) {
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DefMap[ParentLoopHeader] = DefMap[PdBoundBlock];
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}
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// analyze reached loop exits
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if (!ReachedLoopExits.empty()) {
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const BasicBlock *ParentLoopHeader =
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ParentLoop ? ParentLoop->getHeader() : nullptr;
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assert(ParentLoop);
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const auto *HeaderDefBlock = DefMap[ParentLoopHeader];
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auto ItHeaderDef = DefMap.find(ParentLoopHeader);
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const auto *HeaderDefBlock = (ItHeaderDef == DefMap.end()) ? nullptr : ItHeaderDef->second;
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LLVM_DEBUG(printDefs(dbgs()));
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assert(HeaderDefBlock && "no definition in header of carrying loop");
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assert(HeaderDefBlock && "no definition at header of carrying loop");
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for (const auto *ExitBlock : ReachedLoopExits) {
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auto ItExitDef = DefMap.find(ExitBlock);
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@ -339,19 +344,10 @@ const ConstBlockSet &SyncDependenceAnalysis::join_blocks(const Loop &Loop) {
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return *ItCached->second;
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}
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// dont propagte beyond the immediate post dom of the loop
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const auto *PdNode = PDT.getNode(const_cast<BasicBlock *>(Loop.getHeader()));
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const auto *IpdNode = PdNode->getIDom();
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const auto *PdBoundBlock = IpdNode ? IpdNode->getBlock() : nullptr;
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while (PdBoundBlock && Loop.contains(PdBoundBlock)) {
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IpdNode = IpdNode->getIDom();
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PdBoundBlock = IpdNode ? IpdNode->getBlock() : nullptr;
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}
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// compute all join points
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DivergencePropagator Propagator{FuncRPOT, DT, PDT, LI};
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auto JoinBlocks = Propagator.computeJoinPoints<const LoopExitVec &>(
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*Loop.getHeader(), LoopExits, Loop.getParentLoop(), PdBoundBlock);
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*Loop.getHeader(), LoopExits, Loop.getParentLoop());
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auto ItInserted = CachedLoopExitJoins.emplace(&Loop, std::move(JoinBlocks));
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assert(ItInserted.second);
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@ -370,16 +366,11 @@ SyncDependenceAnalysis::join_blocks(const Instruction &Term) {
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if (ItCached != CachedBranchJoins.end())
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return *ItCached->second;
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// dont propagate beyond the immediate post dominator of the branch
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const auto *PdNode = PDT.getNode(const_cast<BasicBlock *>(Term.getParent()));
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const auto *IpdNode = PdNode->getIDom();
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const auto *PdBoundBlock = IpdNode ? IpdNode->getBlock() : nullptr;
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// compute all join points
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DivergencePropagator Propagator{FuncRPOT, DT, PDT, LI};
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const auto &TermBlock = *Term.getParent();
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auto JoinBlocks = Propagator.computeJoinPoints<succ_const_range>(
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TermBlock, successors(Term.getParent()), LI.getLoopFor(&TermBlock), PdBoundBlock);
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TermBlock, successors(Term.getParent()), LI.getLoopFor(&TermBlock));
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auto ItInserted = CachedBranchJoins.emplace(&Term, std::move(JoinBlocks));
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assert(ItInserted.second);
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111
test/Analysis/DivergenceAnalysis/AMDGPU/b42473-r1-crash.ll
Normal file
111
test/Analysis/DivergenceAnalysis/AMDGPU/b42473-r1-crash.ll
Normal file
@ -0,0 +1,111 @@
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; RUN: opt -mtriple amdgcn-unknown-amdhsa -analyze -divergence -use-gpu-divergence-analysis %s | FileCheck %s
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declare i32 @gf2(i32)
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declare i32 @gf1(i32)
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define void @tw1(i32 addrspace(4)* noalias nocapture readonly %A, i32 addrspace(4)* noalias nocapture %B) local_unnamed_addr #2 {
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; CHECK: Printing analysis 'Legacy Divergence Analysis' for function 'tw1':
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; CHECK: DIVERGENT: i32 addrspace(4)* %A
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; CHECK: DIVERGENT: i32 addrspace(4)* %B
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entry:
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; CHECK: DIVERGENT: %call = tail call i32 @gf2(i32 0) #0
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; CHECK: DIVERGENT: %cmp = icmp ult i32 %call, 16
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; CHECK: DIVERGENT: br i1 %cmp, label %if.then, label %new_exit
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%call = tail call i32 @gf2(i32 0) #3
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%cmp = icmp ult i32 %call, 16
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br i1 %cmp, label %if.then, label %new_exit
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if.then:
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; CHECK: DIVERGENT: %call1 = tail call i32 @gf1(i32 0) #0
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; CHECK: DIVERGENT: %arrayidx = getelementptr inbounds i32, i32 addrspace(4)* %A, i32 %call1
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; CHECK: DIVERGENT: %0 = load i32, i32 addrspace(4)* %arrayidx, align 4
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; CHECK: DIVERGENT: %cmp225 = icmp sgt i32 %0, 0
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; CHECK: DIVERGENT: %arrayidx10 = getelementptr inbounds i32, i32 addrspace(4)* %B, i32 %call1
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; CHECK: DIVERGENT: br i1 %cmp225, label %while.body.preheader, label %if.then.while.end_crit_edge
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%call1 = tail call i32 @gf1(i32 0) #4
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%arrayidx = getelementptr inbounds i32, i32 addrspace(4)* %A, i32 %call1
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%0 = load i32, i32 addrspace(4)* %arrayidx, align 4
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%cmp225 = icmp sgt i32 %0, 0
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%arrayidx10 = getelementptr inbounds i32, i32 addrspace(4)* %B, i32 %call1
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br i1 %cmp225, label %while.body.preheader, label %if.then.while.end_crit_edge
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while.body.preheader:
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br label %while.body
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if.then.while.end_crit_edge:
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; CHECK: DIVERGENT: %.pre = load i32, i32 addrspace(4)* %arrayidx10, align 4
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%.pre = load i32, i32 addrspace(4)* %arrayidx10, align 4
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br label %while.end
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while.body:
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; CHECK-NOT: DIVERGENT: %i.026 = phi i32 [ %inc, %if.end.while.body_crit_edge ], [ 0, %while.body.preheader ]
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; CHECK: DIVERGENT: %call3 = tail call i32 @gf1(i32 0) #0
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; CHECK: DIVERGENT: %cmp4 = icmp ult i32 %call3, 10
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; CHECK: DIVERGENT: %arrayidx6 = getelementptr inbounds i32, i32 addrspace(4)* %A, i32 %i.026
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; CHECK: DIVERGENT: %1 = load i32, i32 addrspace(4)* %arrayidx6, align 4
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; CHECK: DIVERGENT: br i1 %cmp4, label %if.then5, label %if.else
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%i.026 = phi i32 [ %inc, %if.end.while.body_crit_edge ], [ 0, %while.body.preheader ]
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%call3 = tail call i32 @gf1(i32 0) #4
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%cmp4 = icmp ult i32 %call3, 10
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%arrayidx6 = getelementptr inbounds i32, i32 addrspace(4)* %A, i32 %i.026
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%1 = load i32, i32 addrspace(4)* %arrayidx6, align 4
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br i1 %cmp4, label %if.then5, label %if.else
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if.then5:
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; CHECK: DIVERGENT: %mul = shl i32 %1, 1
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; CHECK: DIVERGENT: %2 = load i32, i32 addrspace(4)* %arrayidx10, align 4
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; CHECK: DIVERGENT: %add = add nsw i32 %2, %mul
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%mul = shl i32 %1, 1
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%2 = load i32, i32 addrspace(4)* %arrayidx10, align 4
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%add = add nsw i32 %2, %mul
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br label %if.end
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if.else:
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; CHECK: DIVERGENT: %mul9 = shl i32 %1, 2
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; CHECK: DIVERGENT: %3 = load i32, i32 addrspace(4)* %arrayidx10, align 4
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; CHECK: DIVERGENT: %add11 = add nsw i32 %3, %mul9
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%mul9 = shl i32 %1, 2
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%3 = load i32, i32 addrspace(4)* %arrayidx10, align 4
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%add11 = add nsw i32 %3, %mul9
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br label %if.end
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if.end:
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; CHECK: DIVERGENT: %storemerge = phi i32 [ %add11, %if.else ], [ %add, %if.then5 ]
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; CHECK: DIVERGENT: store i32 %storemerge, i32 addrspace(4)* %arrayidx10, align 4
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; CHECK-NOT: DIVERGENT: %inc = add nuw nsw i32 %i.026, 1
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; CHECK: DIVERGENT: %exitcond = icmp ne i32 %inc, %0
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; CHECK: DIVERGENT: br i1 %exitcond, label %if.end.while.body_crit_edge, label %while.end.loopexit
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%storemerge = phi i32 [ %add11, %if.else ], [ %add, %if.then5 ]
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store i32 %storemerge, i32 addrspace(4)* %arrayidx10, align 4
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%inc = add nuw nsw i32 %i.026, 1
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%exitcond = icmp ne i32 %inc, %0
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br i1 %exitcond, label %if.end.while.body_crit_edge, label %while.end.loopexit
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if.end.while.body_crit_edge:
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br label %while.body
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while.end.loopexit:
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; CHECK: DIVERGENT: %storemerge.lcssa = phi i32 [ %storemerge, %if.end ]
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%storemerge.lcssa = phi i32 [ %storemerge, %if.end ]
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br label %while.end
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while.end:
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; CHECK: DIVERGENT: %4 = phi i32 [ %.pre, %if.then.while.end_crit_edge ], [ %storemerge.lcssa, %while.end.loopexit ]
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; CHECK: DIVERGENT: %i.0.lcssa = phi i32 [ 0, %if.then.while.end_crit_edge ], [ %0, %while.end.loopexit ]
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; CHECK: DIVERGENT: %sub = sub nsw i32 %4, %i.0.lcssa
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; CHECK: DIVERGENT: store i32 %sub, i32 addrspace(4)* %arrayidx10, align 4
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%4 = phi i32 [ %.pre, %if.then.while.end_crit_edge ], [ %storemerge.lcssa, %while.end.loopexit ]
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%i.0.lcssa = phi i32 [ 0, %if.then.while.end_crit_edge ], [ %0, %while.end.loopexit ]
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%sub = sub nsw i32 %4, %i.0.lcssa
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store i32 %sub, i32 addrspace(4)* %arrayidx10, align 4
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br label %new_exit
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new_exit:
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ret void
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind readnone }
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attributes #2 = { nounwind readnone }
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attributes #3 = { nounwind readnone }
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attributes #4 = { nounwind readnone }
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