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[X86] SimplifyDemandedVectorElts - add X86ISD::VPERMV3 mask support
Completes SimplifyDemandedVectorElts's basic variable shuffle mask support which should help D60512 + D60562 llvm-svn: 358186
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@ -33234,8 +33234,8 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
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break;
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}
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case X86ISD::PSHUFB:
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case X86ISD::VPERMV3:
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case X86ISD::VPERMILPV: {
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// TODO - simplify other variable shuffle masks.
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SDValue Mask = Op.getOperand(1);
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APInt MaskUndef, MaskZero;
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if (SimplifyDemandedVectorElts(Mask, DemandedElts, MaskUndef, MaskZero, TLO,
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@ -933,10 +933,8 @@ define <8 x double> @combine_vpermi2var_8f64_as_permpd(<8 x double> %x0, <8 x do
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;
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; X64-LABEL: combine_vpermi2var_8f64_as_permpd:
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; X64: # %bb.0:
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; X64-NEXT: vmovdqa {{.*#+}} xmm2 = <u,2,1,3,4,6,5,7>
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; X64-NEXT: vpinsrq $0, %rdi, %xmm2, %xmm2
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; X64-NEXT: vmovdqa64 {{.*#+}} zmm3 = <u,2,1,3,4,6,5,7>
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; X64-NEXT: vinserti32x4 $0, %xmm2, %zmm3, %zmm2
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; X64-NEXT: vmovapd {{.*#+}} zmm2 = <u,2,1,3,4,6,5,7>
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; X64-NEXT: vinsertf32x4 $0, {{.*}}(%rip), %zmm2, %zmm2
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; X64-NEXT: vpermi2pd %zmm1, %zmm0, %zmm2
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; X64-NEXT: vpermpd {{.*#+}} zmm0 = zmm2[2,3,1,1,6,7,5,5]
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; X64-NEXT: retq
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