1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00

[gn build] Port 2a6c871596ce & 44a6bda19b40

This commit is contained in:
Fangrui Song 2020-07-22 09:40:41 -07:00
parent 030e640555
commit 71ef60fd8c
3 changed files with 7 additions and 7 deletions

View File

@ -47,6 +47,7 @@ static_library("Analysis") {
"DomTreeUpdater.cpp",
"DominanceFrontier.cpp",
"EHPersonalities.cpp",
"FunctionPropertiesAnalysis.cpp",
"GlobalsModRef.cpp",
"GuardUtils.cpp",
"HeatUtils.cpp",
@ -55,7 +56,6 @@ static_library("Analysis") {
"IndirectCallPromotionAnalysis.cpp",
"InlineAdvisor.cpp",
"InlineCost.cpp",
"InlineFeaturesAnalysis.cpp",
"InlineSizeEstimatorAnalysis.cpp",
"InstCount.cpp",
"InstructionPrecedenceTracking.cpp",

View File

@ -63,6 +63,11 @@ tablegen("AMDGPUGenRegisterBank") {
td_file = "AMDGPU.td"
}
tablegen("InstCombineTables") {
visibility = [ ":LLVMAMDGPUCodeGen" ]
args = [ "-gen-searchable-tables" ]
}
tablegen("R600GenCallingConv") {
visibility = [ ":LLVMAMDGPUCodeGen" ]
args = [ "-gen-callingconv" ]
@ -92,6 +97,7 @@ static_library("LLVMAMDGPUCodeGen") {
":AMDGPUGenPreLegalizeGICombiner",
":AMDGPUGenRegBankGICombiner",
":AMDGPUGenRegisterBank",
":InstCombineTables",
":R600GenCallingConv",
":R600GenDAGISel",
":R600GenDFAPacketizer",

View File

@ -1,14 +1,8 @@
import("//llvm/utils/TableGen/tablegen.gni")
tablegen("InstCombineTables") {
visibility = [ ":InstCombine" ]
args = [ "-gen-searchable-tables" ]
}
static_library("InstCombine") {
output_name = "LLVMInstCombine"
deps = [
":InstCombineTables",
"//llvm/lib/Analysis",
"//llvm/lib/IR",
"//llvm/lib/Support",