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[gn build] Port 2a6c871596ce & 44a6bda19b40
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030e640555
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@ -47,6 +47,7 @@ static_library("Analysis") {
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"DomTreeUpdater.cpp",
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"DominanceFrontier.cpp",
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"EHPersonalities.cpp",
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"FunctionPropertiesAnalysis.cpp",
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"GlobalsModRef.cpp",
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"GuardUtils.cpp",
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"HeatUtils.cpp",
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@ -55,7 +56,6 @@ static_library("Analysis") {
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"IndirectCallPromotionAnalysis.cpp",
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"InlineAdvisor.cpp",
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"InlineCost.cpp",
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"InlineFeaturesAnalysis.cpp",
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"InlineSizeEstimatorAnalysis.cpp",
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"InstCount.cpp",
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"InstructionPrecedenceTracking.cpp",
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@ -63,6 +63,11 @@ tablegen("AMDGPUGenRegisterBank") {
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td_file = "AMDGPU.td"
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}
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tablegen("InstCombineTables") {
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visibility = [ ":LLVMAMDGPUCodeGen" ]
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args = [ "-gen-searchable-tables" ]
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}
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tablegen("R600GenCallingConv") {
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visibility = [ ":LLVMAMDGPUCodeGen" ]
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args = [ "-gen-callingconv" ]
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@ -92,6 +97,7 @@ static_library("LLVMAMDGPUCodeGen") {
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":AMDGPUGenPreLegalizeGICombiner",
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":AMDGPUGenRegBankGICombiner",
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":AMDGPUGenRegisterBank",
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":InstCombineTables",
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":R600GenCallingConv",
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":R600GenDAGISel",
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":R600GenDFAPacketizer",
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@ -1,14 +1,8 @@
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import("//llvm/utils/TableGen/tablegen.gni")
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tablegen("InstCombineTables") {
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visibility = [ ":InstCombine" ]
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args = [ "-gen-searchable-tables" ]
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}
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static_library("InstCombine") {
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output_name = "LLVMInstCombine"
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deps = [
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":InstCombineTables",
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"//llvm/lib/Analysis",
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"//llvm/lib/IR",
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"//llvm/lib/Support",
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