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ARM: Fix PR32578

Browse Source 
https://llvm.org/PR32578

I simplified and converted the reproducer into a lit test.

Patch by Vedant Kumar!

llvm-svn: 319130
This commit is contained in:
Matthias Braun 2017-11-28 01:17:52 +00:00
parent a8ca9c74a2
commit 794f5f371c
2 changed files with 28 additions and 1 deletions
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2
lib/Target/ARM/ARMFrameLowering.cpp
View File

@ -482,7 +482,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
if (DPRCSSize > 0) { if (DPRCSSize > 0) {
// Since vpush register list cannot have gaps, there may be multiple vpush // Since vpush register list cannot have gaps, there may be multiple vpush
// instructions in the prologue. // instructions in the prologue.
while (MBBI->getOpcode() == ARM::VSTMDDB_UPD) { while (MBBI != MBB.end() && MBBI->getOpcode() == ARM::VSTMDDB_UPD) {
DefCFAOffsetCandidates.addInst(MBBI, sizeOfSPAdjustment(*MBBI)); DefCFAOffsetCandidates.addInst(MBBI, sizeOfSPAdjustment(*MBBI));
LastPush = MBBI++; LastPush = MBBI++;
} }

27
test/CodeGen/ARM/pr32578.ll Normal file
View File

@ -0,0 +1,27 @@
; RUN: llc -o - %s | FileCheck %s
target triple = "armv7"
; CHECK-LABEL: func:
; CHECK: push {r11, lr}
; CHECK: vpush {d8}
; CEHCK: b .LBB0_2
define arm_aapcscc double @func() {
br label %tailrecurse
tailrecurse:
%v0 = load i16, i16* undef, align 8
%cond36.i = icmp eq i16 %v0, 3
br i1 %cond36.i, label %sw.bb.i, label %sw.epilog.i
sw.bb.i:
%v1 = load double, double* undef, align 8
%call21.i = tail call arm_aapcscc double @func()
%mul.i = fmul double %v1, %call21.i
ret double %mul.i
sw.epilog.i:
tail call arm_aapcscc void @_ZNK10shared_ptrdeEv()
br label %tailrecurse
}
declare arm_aapcscc void @_ZNK10shared_ptrdeEv() local_unnamed_addr