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[AMDGPU] gfx1032 target

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Differential Revision: https://reviews.llvm.org/D89487
This commit is contained in:
Stanislav Mekhanoshin 2020-10-15 10:48:46 -07:00
parent 438da14930
commit 86aeb69232
13 changed files with 31 additions and 2 deletions
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10
docs/AMDGPUUsage.rst
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@ -277,6 +277,15 @@ names from both the *Processor* and *Alternative Processor* can be used.
.. TODO
Add product
names.
``gfx1032`` ``amdgcn`` dGPU - xnack *TBA*
[off]
- wavefrontsize64
[off]
- cumode
[off]
.. TODO
Add product
names.
=========== =============== ============ ===== ================= ======= ======================
.. _amdgpu-target-features:
@ -822,6 +831,7 @@ The AMDGPU backend uses the following ELF header:
``EF_AMDGPU_MACH_AMDGCN_GFX1012`` 0x035 ``gfx1012``
``EF_AMDGPU_MACH_AMDGCN_GFX1030`` 0x036 ``gfx1030``
``EF_AMDGPU_MACH_AMDGCN_GFX1031`` 0x037 ``gfx1031``
``EF_AMDGPU_MACH_AMDGCN_GFX1032`` 0x038 ``gfx1032``
*reserved* 0x038 Reserved.
*reserved* 0x039 Reserved.
``EF_AMDGPU_MACH_AMDGCN_GFX602`` 0x03a ``gfx602``

1
include/llvm/BinaryFormat/ELF.h
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@ -726,6 +726,7 @@ enum : unsigned {
EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035,
EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036,
EF_AMDGPU_MACH_AMDGCN_GFX1031 = 0x037,
EF_AMDGPU_MACH_AMDGCN_GFX1032 = 0x038,
// Reserved for AMDGCN-based processors.
EF_AMDGPU_MACH_AMDGCN_RESERVED0 = 0x027,

3
include/llvm/Support/TargetParser.h
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@ -89,9 +89,10 @@ enum GPUKind : uint32_t {
GK_GFX1012 = 73,
GK_GFX1030 = 75,
GK_GFX1031 = 76,
GK_GFX1032 = 77,
GK_AMDGCN_FIRST = GK_GFX600,
GK_AMDGCN_LAST = GK_GFX1031,
GK_AMDGCN_LAST = GK_GFX1032,
};
/// Instruction set architecture version.

1
lib/ObjectYAML/ELFYAML.cpp
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@ -444,6 +444,7 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1012, EF_AMDGPU_MACH);
BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1030, EF_AMDGPU_MACH);
BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1031, EF_AMDGPU_MACH);
BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1032, EF_AMDGPU_MACH);
BCase(EF_AMDGPU_XNACK);
BCase(EF_AMDGPU_SRAM_ECC);
break;

4
lib/Support/TargetParser.cpp
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@ -63,7 +63,7 @@ constexpr GPUInfo R600GPUs[26] = {
// This table should be sorted by the value of GPUKind
// Don't bother listing the implicitly true features
constexpr GPUInfo AMDGCNGPUs[43] = {
constexpr GPUInfo AMDGCNGPUs[44] = {
// Name Canonical Kind Features
// Name
{{"gfx600"}, {"gfx600"}, GK_GFX600, FEATURE_FAST_FMA_F32},
@ -109,6 +109,7 @@ constexpr GPUInfo AMDGCNGPUs[43] = {
{{"gfx1012"}, {"gfx1012"}, GK_GFX1012, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
{{"gfx1030"}, {"gfx1030"}, GK_GFX1030, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
{{"gfx1031"}, {"gfx1031"}, GK_GFX1031, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
{{"gfx1032"}, {"gfx1032"}, GK_GFX1032, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
};
const GPUInfo *getArchEntry(AMDGPU::GPUKind AK, ArrayRef<GPUInfo> Table) {
@ -215,6 +216,7 @@ AMDGPU::IsaVersion AMDGPU::getIsaVersion(StringRef GPU) {
case GK_GFX1012: return {10, 1, 2};
case GK_GFX1030: return {10, 3, 0};
case GK_GFX1031: return {10, 3, 1};
case GK_GFX1032: return {10, 3, 2};
default: return {0, 0, 0};
}
}

4
lib/Target/AMDGPU/GCNProcessors.td
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@ -207,3 +207,7 @@ def : ProcessorModel<"gfx1030", GFX10SpeedModel,
def : ProcessorModel<"gfx1031", GFX10SpeedModel,
FeatureISAVersion10_3_0.Features
>;
def : ProcessorModel<"gfx1032", GFX10SpeedModel,
FeatureISAVersion10_3_0.Features
>;

2
lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
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@ -102,6 +102,7 @@ StringRef AMDGPUTargetStreamer::getArchNameFromElfMach(unsigned ElfMach) {
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012: AK = GK_GFX1012; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030: AK = GK_GFX1030; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031: AK = GK_GFX1031; break;
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032: AK = GK_GFX1032; break;
case ELF::EF_AMDGPU_MACH_NONE: AK = GK_NONE; break;
}
@ -158,6 +159,7 @@ unsigned AMDGPUTargetStreamer::getElfMach(StringRef GPU) {
case GK_GFX1012: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012;
case GK_GFX1030: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030;
case GK_GFX1031: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031;
case GK_GFX1032: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032;
case GK_NONE: return ELF::EF_AMDGPU_MACH_NONE;
}

2
test/CodeGen/AMDGPU/elf-header-flags-mach.ll
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@ -57,6 +57,7 @@
; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1012 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1012 %s
; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1030 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1030 %s
; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1031 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1031 %s
; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1032 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1032 %s
; ARCH-R600: Arch: r600
; ARCH-GCN: Arch: amdgcn
@ -107,6 +108,7 @@
; GFX1012: EF_AMDGPU_MACH_AMDGCN_GFX1012 (0x35)
; GFX1030: EF_AMDGPU_MACH_AMDGCN_GFX1030 (0x36)
; GFX1031: EF_AMDGPU_MACH_AMDGCN_GFX1031 (0x37)
; GFX1032: EF_AMDGPU_MACH_AMDGCN_GFX1032 (0x38)
; ALL: ]
define amdgpu_kernel void @elf_header() {

2
test/CodeGen/AMDGPU/hsa-note-no-func.ll
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@ -30,6 +30,7 @@
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1012 --amdhsa-code-object-version=2 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1012 %s
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1030 --amdhsa-code-object-version=2 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1030 %s
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1031 --amdhsa-code-object-version=2 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1031 %s
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1032 --amdhsa-code-object-version=2 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1032 %s
; HSA: .hsa_code_object_version 2,1
; HSA-SI600: .hsa_code_object_isa 6,0,0,"AMD","AMDGPU"
@ -54,3 +55,4 @@
; HSA-GFX1012: .hsa_code_object_isa 10,1,2,"AMD","AMDGPU"
; HSA-GFX1030: .hsa_code_object_isa 10,3,0,"AMD","AMDGPU"
; HSA-GFX1031: .hsa_code_object_isa 10,3,1,"AMD","AMDGPU"
; HSA-GFX1032: .hsa_code_object_isa 10,3,2,"AMD","AMDGPU"

1
test/MC/AMDGPU/gfx1030_err.s
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@ -1,5 +1,6 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1030 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1031 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1032 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
v_dot8c_i32_i4 v5, v1, v2
// GFX10: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU

1
test/MC/AMDGPU/gfx1030_new.s
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@ -1,5 +1,6 @@
// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1031 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1032 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
global_load_dword_addtid v1, s[2:3] offset:16
// GFX10: encoding: [0x10,0x80,0x58,0xdc,0x00,0x00,0x02,0x01]

1
test/MC/Disassembler/AMDGPU/gfx1030_dasm_new.txt
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@ -1,5 +1,6 @@
# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1031 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1032 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
# GFX10: global_load_dword_addtid v1, s[2:3] offset:16
0x10,0x80,0x58,0xdc,0x00,0x00,0x02,0x01

1
tools/llvm-readobj/ELFDumper.cpp
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@ -1781,6 +1781,7 @@ static const EnumEntry<unsigned> ElfHeaderAMDGPUFlags[] = {
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1030),
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1031),
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1032),
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_XNACK),
LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_SRAM_ECC)
};