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[AMDGPU] gfx1032 target
Differential Revision: https://reviews.llvm.org/D89487
This commit is contained in:
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@ -277,6 +277,15 @@ names from both the *Processor* and *Alternative Processor* can be used.
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.. TODO
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.. TODO
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Add product
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Add product
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names.
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names.
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``gfx1032`` ``amdgcn`` dGPU - xnack *TBA*
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[off]
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- wavefrontsize64
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[off]
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- cumode
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[off]
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.. TODO
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Add product
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names.
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=========== =============== ============ ===== ================= ======= ======================
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=========== =============== ============ ===== ================= ======= ======================
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.. _amdgpu-target-features:
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.. _amdgpu-target-features:
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@ -822,6 +831,7 @@ The AMDGPU backend uses the following ELF header:
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``EF_AMDGPU_MACH_AMDGCN_GFX1012`` 0x035 ``gfx1012``
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``EF_AMDGPU_MACH_AMDGCN_GFX1012`` 0x035 ``gfx1012``
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``EF_AMDGPU_MACH_AMDGCN_GFX1030`` 0x036 ``gfx1030``
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``EF_AMDGPU_MACH_AMDGCN_GFX1030`` 0x036 ``gfx1030``
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``EF_AMDGPU_MACH_AMDGCN_GFX1031`` 0x037 ``gfx1031``
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``EF_AMDGPU_MACH_AMDGCN_GFX1031`` 0x037 ``gfx1031``
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``EF_AMDGPU_MACH_AMDGCN_GFX1032`` 0x038 ``gfx1032``
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*reserved* 0x038 Reserved.
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*reserved* 0x038 Reserved.
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*reserved* 0x039 Reserved.
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*reserved* 0x039 Reserved.
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``EF_AMDGPU_MACH_AMDGCN_GFX602`` 0x03a ``gfx602``
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``EF_AMDGPU_MACH_AMDGCN_GFX602`` 0x03a ``gfx602``
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@ -726,6 +726,7 @@ enum : unsigned {
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EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035,
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EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035,
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EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036,
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EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036,
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EF_AMDGPU_MACH_AMDGCN_GFX1031 = 0x037,
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EF_AMDGPU_MACH_AMDGCN_GFX1031 = 0x037,
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EF_AMDGPU_MACH_AMDGCN_GFX1032 = 0x038,
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// Reserved for AMDGCN-based processors.
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// Reserved for AMDGCN-based processors.
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EF_AMDGPU_MACH_AMDGCN_RESERVED0 = 0x027,
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EF_AMDGPU_MACH_AMDGCN_RESERVED0 = 0x027,
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@ -89,9 +89,10 @@ enum GPUKind : uint32_t {
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GK_GFX1012 = 73,
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GK_GFX1012 = 73,
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GK_GFX1030 = 75,
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GK_GFX1030 = 75,
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GK_GFX1031 = 76,
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GK_GFX1031 = 76,
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GK_GFX1032 = 77,
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GK_AMDGCN_FIRST = GK_GFX600,
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GK_AMDGCN_FIRST = GK_GFX600,
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GK_AMDGCN_LAST = GK_GFX1031,
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GK_AMDGCN_LAST = GK_GFX1032,
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};
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};
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/// Instruction set architecture version.
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/// Instruction set architecture version.
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@ -444,6 +444,7 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1012, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1012, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1030, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1030, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1031, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1031, EF_AMDGPU_MACH);
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BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1032, EF_AMDGPU_MACH);
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BCase(EF_AMDGPU_XNACK);
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BCase(EF_AMDGPU_XNACK);
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BCase(EF_AMDGPU_SRAM_ECC);
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BCase(EF_AMDGPU_SRAM_ECC);
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break;
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break;
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@ -63,7 +63,7 @@ constexpr GPUInfo R600GPUs[26] = {
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// This table should be sorted by the value of GPUKind
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// This table should be sorted by the value of GPUKind
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// Don't bother listing the implicitly true features
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// Don't bother listing the implicitly true features
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constexpr GPUInfo AMDGCNGPUs[43] = {
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constexpr GPUInfo AMDGCNGPUs[44] = {
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// Name Canonical Kind Features
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// Name Canonical Kind Features
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// Name
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// Name
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{{"gfx600"}, {"gfx600"}, GK_GFX600, FEATURE_FAST_FMA_F32},
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{{"gfx600"}, {"gfx600"}, GK_GFX600, FEATURE_FAST_FMA_F32},
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@ -109,6 +109,7 @@ constexpr GPUInfo AMDGCNGPUs[43] = {
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{{"gfx1012"}, {"gfx1012"}, GK_GFX1012, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
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{{"gfx1012"}, {"gfx1012"}, GK_GFX1012, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
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{{"gfx1030"}, {"gfx1030"}, GK_GFX1030, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
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{{"gfx1030"}, {"gfx1030"}, GK_GFX1030, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
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{{"gfx1031"}, {"gfx1031"}, GK_GFX1031, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
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{{"gfx1031"}, {"gfx1031"}, GK_GFX1031, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
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{{"gfx1032"}, {"gfx1032"}, GK_GFX1032, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
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};
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};
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const GPUInfo *getArchEntry(AMDGPU::GPUKind AK, ArrayRef<GPUInfo> Table) {
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const GPUInfo *getArchEntry(AMDGPU::GPUKind AK, ArrayRef<GPUInfo> Table) {
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@ -215,6 +216,7 @@ AMDGPU::IsaVersion AMDGPU::getIsaVersion(StringRef GPU) {
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case GK_GFX1012: return {10, 1, 2};
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case GK_GFX1012: return {10, 1, 2};
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case GK_GFX1030: return {10, 3, 0};
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case GK_GFX1030: return {10, 3, 0};
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case GK_GFX1031: return {10, 3, 1};
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case GK_GFX1031: return {10, 3, 1};
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case GK_GFX1032: return {10, 3, 2};
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default: return {0, 0, 0};
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default: return {0, 0, 0};
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}
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}
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}
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}
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@ -207,3 +207,7 @@ def : ProcessorModel<"gfx1030", GFX10SpeedModel,
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def : ProcessorModel<"gfx1031", GFX10SpeedModel,
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def : ProcessorModel<"gfx1031", GFX10SpeedModel,
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FeatureISAVersion10_3_0.Features
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FeatureISAVersion10_3_0.Features
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>;
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>;
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def : ProcessorModel<"gfx1032", GFX10SpeedModel,
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FeatureISAVersion10_3_0.Features
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>;
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@ -102,6 +102,7 @@ StringRef AMDGPUTargetStreamer::getArchNameFromElfMach(unsigned ElfMach) {
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012: AK = GK_GFX1012; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012: AK = GK_GFX1012; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030: AK = GK_GFX1030; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030: AK = GK_GFX1030; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031: AK = GK_GFX1031; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031: AK = GK_GFX1031; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032: AK = GK_GFX1032; break;
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case ELF::EF_AMDGPU_MACH_NONE: AK = GK_NONE; break;
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case ELF::EF_AMDGPU_MACH_NONE: AK = GK_NONE; break;
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}
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}
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@ -158,6 +159,7 @@ unsigned AMDGPUTargetStreamer::getElfMach(StringRef GPU) {
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case GK_GFX1012: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012;
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case GK_GFX1012: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012;
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case GK_GFX1030: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030;
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case GK_GFX1030: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030;
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case GK_GFX1031: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031;
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case GK_GFX1031: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031;
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case GK_GFX1032: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032;
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case GK_NONE: return ELF::EF_AMDGPU_MACH_NONE;
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case GK_NONE: return ELF::EF_AMDGPU_MACH_NONE;
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}
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}
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@ -57,6 +57,7 @@
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; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1012 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1012 %s
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; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1012 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1012 %s
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; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1030 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1030 %s
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; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1030 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1030 %s
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; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1031 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1031 %s
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; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1031 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1031 %s
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; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx1032 < %s | llvm-readobj -file-headers - | FileCheck --check-prefixes=ALL,ARCH-GCN,GFX1032 %s
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; ARCH-R600: Arch: r600
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; ARCH-R600: Arch: r600
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; ARCH-GCN: Arch: amdgcn
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; ARCH-GCN: Arch: amdgcn
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@ -107,6 +108,7 @@
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; GFX1012: EF_AMDGPU_MACH_AMDGCN_GFX1012 (0x35)
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; GFX1012: EF_AMDGPU_MACH_AMDGCN_GFX1012 (0x35)
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; GFX1030: EF_AMDGPU_MACH_AMDGCN_GFX1030 (0x36)
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; GFX1030: EF_AMDGPU_MACH_AMDGCN_GFX1030 (0x36)
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; GFX1031: EF_AMDGPU_MACH_AMDGCN_GFX1031 (0x37)
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; GFX1031: EF_AMDGPU_MACH_AMDGCN_GFX1031 (0x37)
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; GFX1032: EF_AMDGPU_MACH_AMDGCN_GFX1032 (0x38)
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; ALL: ]
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; ALL: ]
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define amdgpu_kernel void @elf_header() {
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define amdgpu_kernel void @elf_header() {
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@ -30,6 +30,7 @@
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; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1012 --amdhsa-code-object-version=2 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1012 %s
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; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1012 --amdhsa-code-object-version=2 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1012 %s
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; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1030 --amdhsa-code-object-version=2 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1030 %s
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; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1030 --amdhsa-code-object-version=2 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1030 %s
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; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1031 --amdhsa-code-object-version=2 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1031 %s
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; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1031 --amdhsa-code-object-version=2 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1031 %s
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; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=gfx1032 --amdhsa-code-object-version=2 | FileCheck --check-prefix=HSA --check-prefix=HSA-GFX1032 %s
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; HSA: .hsa_code_object_version 2,1
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; HSA: .hsa_code_object_version 2,1
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; HSA-SI600: .hsa_code_object_isa 6,0,0,"AMD","AMDGPU"
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; HSA-SI600: .hsa_code_object_isa 6,0,0,"AMD","AMDGPU"
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@ -54,3 +55,4 @@
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; HSA-GFX1012: .hsa_code_object_isa 10,1,2,"AMD","AMDGPU"
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; HSA-GFX1012: .hsa_code_object_isa 10,1,2,"AMD","AMDGPU"
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; HSA-GFX1030: .hsa_code_object_isa 10,3,0,"AMD","AMDGPU"
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; HSA-GFX1030: .hsa_code_object_isa 10,3,0,"AMD","AMDGPU"
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; HSA-GFX1031: .hsa_code_object_isa 10,3,1,"AMD","AMDGPU"
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; HSA-GFX1031: .hsa_code_object_isa 10,3,1,"AMD","AMDGPU"
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; HSA-GFX1032: .hsa_code_object_isa 10,3,2,"AMD","AMDGPU"
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@ -1,5 +1,6 @@
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// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1030 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
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// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1030 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
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// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1031 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
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// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1031 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
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// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1032 %s 2>&1 | FileCheck --check-prefix=GFX10 --implicit-check-not=error: %s
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v_dot8c_i32_i4 v5, v1, v2
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v_dot8c_i32_i4 v5, v1, v2
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// GFX10: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
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// GFX10: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
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@ -1,5 +1,6 @@
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// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
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// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
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// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1031 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
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// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1031 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
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// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1032 -show-encoding %s | FileCheck --check-prefix=GFX10 %s
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global_load_dword_addtid v1, s[2:3] offset:16
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global_load_dword_addtid v1, s[2:3] offset:16
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// GFX10: encoding: [0x10,0x80,0x58,0xdc,0x00,0x00,0x02,0x01]
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// GFX10: encoding: [0x10,0x80,0x58,0xdc,0x00,0x00,0x02,0x01]
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@ -1,5 +1,6 @@
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# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
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# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1030 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
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# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1031 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
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# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1031 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
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# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1032 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX10 %s
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# GFX10: global_load_dword_addtid v1, s[2:3] offset:16
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# GFX10: global_load_dword_addtid v1, s[2:3] offset:16
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0x10,0x80,0x58,0xdc,0x00,0x00,0x02,0x01
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0x10,0x80,0x58,0xdc,0x00,0x00,0x02,0x01
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@ -1781,6 +1781,7 @@ static const EnumEntry<unsigned> ElfHeaderAMDGPUFlags[] = {
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LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
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LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
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LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1030),
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LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1030),
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LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1031),
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LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1031),
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LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1032),
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LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_XNACK),
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LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_XNACK),
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LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_SRAM_ECC)
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LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_SRAM_ECC)
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};
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};
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