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[ARM/AARCH64] Make test MachineBranchProb.ll more robust and re-enable for ARM/AArch64

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Summary: Make test robust enough to not fail due to CFG changes and re-enable for ARM/AArch64.

Reviewers: rovka, fhahn

Reviewed By: fhahn

Subscribers: fhahn, aemerson, rengolin, mcrosier, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D38590

llvm-svn: 315002
This commit is contained in:
Balaram Makam 2017-10-05 18:33:34 +00:00
parent abb6374299
commit 8affd7c83b
1 changed files with 4 additions and 3 deletions
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7
test/CodeGen/Generic/MachineBranchProb.ll
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@ -1,8 +1,5 @@
; RUN: llc < %s -print-machineinstrs=expand-isel-pseudos -o /dev/null 2>&1 | FileCheck %s ; RUN: llc < %s -print-machineinstrs=expand-isel-pseudos -o /dev/null 2>&1 | FileCheck %s
; ARM & AArch64 run an extra SimplifyCFG which disrupts this test.
; UNSUPPORTED: arm,aarch64
; Hexagon runs passes that renumber the basic blocks, causing this test ; Hexagon runs passes that renumber the basic blocks, causing this test
; to fail. ; to fail.
; XFAIL: hexagon ; XFAIL: hexagon
@ -10,6 +7,8 @@
; Bug: PR31899 ; Bug: PR31899
; XFAIL: avr ; XFAIL: avr
declare void @foo()
; Make sure we have the correct weight attached to each successor. ; Make sure we have the correct weight attached to each successor.
define i32 @test2(i32 %x) nounwind uwtable readnone ssp { define i32 @test2(i32 %x) nounwind uwtable readnone ssp {
; CHECK-LABEL: Machine code for function test2: ; CHECK-LABEL: Machine code for function test2:
@ -29,6 +28,8 @@ entry:
; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}36.36%) BB#3({{[0-9a-fx/= ]+}}63.64%) ; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}36.36%) BB#3({{[0-9a-fx/= ]+}}63.64%)
sw.bb: sw.bb:
; this call will prevent simplifyCFG from optimizing the block away in ARM/AArch64.
tail call void @foo()
br label %return br label %return
sw.bb1: sw.bb1: