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[Hexagon] Use V6_vmpyih for halfword multiplication

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Unlike V6_vmpyhv, it produces the result in the exact form that is
expected without the need for a shuffle.

llvm-svn: 324241
This commit is contained in:
Krzysztof Parzyszek 2018-02-05 15:40:06 +00:00
parent e8a7910a4d
commit 9179adab3b
2 changed files with 8 additions and 9 deletions
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11
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
View File

@ -864,14 +864,10 @@ HexagonTargetLowering::LowerHvxMul(SDValue Op, SelectionDAG &DAG) const {
SDValue Vt = Op.getOperand(1);
switch (ElemTy.SimpleTy) {
case MVT::i8:
case MVT::i16: { // V6_vmpyih
case MVT::i8: {
// For i8 vectors Vs = (a0, a1, ...), Vt = (b0, b1, ...),
// V6_vmpybv Vs, Vt produces a pair of i16 vectors Hi:Lo,
// where Lo = (a0*b0, a2*b2, ...), Hi = (a1*b1, a3*b3, ...).
// For i16, use V6_vmpyhv, which behaves in an analogous way to
// V6_vmpybv: results Lo and Hi are products of even/odd elements
// respectively.
MVT ExtTy = typeExtElem(ResTy, 2);
unsigned MpyOpc = ElemTy == MVT::i8 ? Hexagon::V6_vmpybv
: Hexagon::V6_vmpyhv;
@ -886,6 +882,11 @@ HexagonTargetLowering::LowerHvxMul(SDValue Op, SelectionDAG &DAG) const {
SDValue BS = getByteShuffle(dl, P.first, P.second, ShuffMask, DAG);
return DAG.getBitcast(ResTy, BS);
}
case MVT::i16:
// For i16 there is V6_vmpyih, which acts exactly like the MUL opcode.
// (There is also V6_vmpyhv, which behaves in an analogous way to
// V6_vmpybv.)
return getInstr(Hexagon::V6_vmpyih, dl, ResTy, {Vs, Vt}, DAG);
case MVT::i32: {
// Use the following sequence for signed word multiply:
// T0 = V6_vmpyiowh Vs, Vt

6
test/CodeGen/Hexagon/autohvx/arith.ll
View File

@ -239,16 +239,14 @@ define <128 x i8> @mpyb_128(<128 x i8> %v0, <128 x i8> %v1) #1 {
}
; CHECK-LABEL: mpyh_64:
; CHECK: v[[H01:[0-9]+]]:[[L01:[0-9]+]].w = vmpy(v0.h,v1.h)
; CHECK: vshuffe(v[[H01]].h,v[[L01]].h)
; CHECK: vmpyi(v0.h,v1.h)
define <32 x i16> @mpyh_64(<32 x i16> %v0, <32 x i16> %v1) #0 {
%p = mul <32 x i16> %v0, %v1
ret <32 x i16> %p
}
; CHECK-LABEL: mpyh_128:
; CHECK: v[[H11:[0-9]+]]:[[L11:[0-9]+]].w = vmpy(v0.h,v1.h)
; CHECK: vshuffe(v[[H11]].h,v[[L11]].h)
; CHECK: vmpyi(v0.h,v1.h)
define <64 x i16> @mpyh_128(<64 x i16> %v0, <64 x i16> %v1) #1 {
%p = mul <64 x i16> %v0, %v1
ret <64 x i16> %p