1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00

APInt: update asserts for base-36

Hexatridecimal was added in r139695.

And fix the unittest that now triggers the assert.

llvm-svn: 146754
This commit is contained in:
Dylan Noblesmith 2011-12-16 20:36:31 +00:00
parent d0c1eb9dd2
commit 91b9af8f44
2 changed files with 8 additions and 4 deletions

View File

@ -2189,7 +2189,7 @@ void APInt::toString(SmallVectorImpl<char> &Str, unsigned Radix,
bool Signed, bool formatAsCLiteral) const {
assert((Radix == 10 || Radix == 8 || Radix == 16 || Radix == 2 ||
Radix == 36) &&
"Radix should be 2, 8, 10, or 16!");
"Radix should be 2, 8, 10, 16, or 36!");
const char *Prefix = "";
if (formatAsCLiteral) {
@ -2202,9 +2202,13 @@ void APInt::toString(SmallVectorImpl<char> &Str, unsigned Radix,
case 8:
Prefix = "0";
break;
case 10:
break; // No prefix
case 16:
Prefix = "0x";
break;
default:
llvm_unreachable("Invalid radix!");
}
}

View File

@ -354,7 +354,7 @@ TEST(APIntTest, toString) {
APInt(8, 0).toString(S, 16, true, true);
EXPECT_EQ(S.str().str(), "0x0");
S.clear();
APInt(8, 0).toString(S, 36, true, true);
APInt(8, 0).toString(S, 36, true, false);
EXPECT_EQ(S.str().str(), "0");
S.clear();
@ -371,7 +371,7 @@ TEST(APIntTest, toString) {
APInt(8, 255, isSigned).toString(S, 16, isSigned, true);
EXPECT_EQ(S.str().str(), "0xFF");
S.clear();
APInt(8, 255, isSigned).toString(S, 36, isSigned, true);
APInt(8, 255, isSigned).toString(S, 36, isSigned, false);
EXPECT_EQ(S.str().str(), "73");
S.clear();
@ -388,7 +388,7 @@ TEST(APIntTest, toString) {
APInt(8, 255, isSigned).toString(S, 16, isSigned, true);
EXPECT_EQ(S.str().str(), "-0x1");
S.clear();
APInt(8, 255, isSigned).toString(S, 36, isSigned, true);
APInt(8, 255, isSigned).toString(S, 36, isSigned, false);
EXPECT_EQ(S.str().str(), "-1");
S.clear();
}