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[VE] Optimize address calculation
Optimize address calculations using LEA/LEASL instructions. Update comments in VEISelLowering.cpp also. Update an existing regression test optimized by this modification. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D90878
This commit is contained in:
Kazushi (Jam) Marukawa
parent
9bff67230d
commit
93a65c706c
@ -940,23 +940,19 @@ SDValue VETargetLowering::makeAddress(SDValue Op, SelectionDAG &DAG) const {
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if (isa<ConstantPoolSDNode>(Op) ||
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(GlobalN && GlobalN->getGlobal()->hasLocalLinkage())) {
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// Create following instructions for local linkage PIC code.
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// lea %s35, %gotoff_lo(.LCPI0_0)
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// and %s35, %s35, (32)0
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// lea.sl %s35, %gotoff_hi(.LCPI0_0)(%s35)
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// adds.l %s35, %s15, %s35 ; %s15 is GOT
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// FIXME: use lea.sl %s35, %gotoff_hi(.LCPI0_0)(%s35, %s15)
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// lea %reg, label@gotoff_lo
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// and %reg, %reg, (32)0
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// lea.sl %reg, label@gotoff_hi(%reg, %got)
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SDValue HiLo = makeHiLoPair(Op, VEMCExpr::VK_VE_GOTOFF_HI32,
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VEMCExpr::VK_VE_GOTOFF_LO32, DAG);
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SDValue GlobalBase = DAG.getNode(VEISD::GLOBAL_BASE_REG, DL, PtrVT);
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return DAG.getNode(ISD::ADD, DL, PtrVT, GlobalBase, HiLo);
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}
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// Create following instructions for not local linkage PIC code.
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// lea %s35, %got_lo(.LCPI0_0)
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// and %s35, %s35, (32)0
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// lea.sl %s35, %got_hi(.LCPI0_0)(%s35)
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// adds.l %s35, %s15, %s35 ; %s15 is GOT
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// ld %s35, (,%s35)
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// FIXME: use lea.sl %s35, %gotoff_hi(.LCPI0_0)(%s35, %s15)
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// lea %reg, label@got_lo
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// and %reg, %reg, (32)0
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// lea.sl %reg, label@got_hi(%reg)
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// ld %reg, (%reg, %got)
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SDValue HiLo = makeHiLoPair(Op, VEMCExpr::VK_VE_GOT_HI32,
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VEMCExpr::VK_VE_GOT_LO32, DAG);
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SDValue GlobalBase = DAG.getNode(VEISD::GLOBAL_BASE_REG, DL, PtrVT);
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@ -944,23 +944,13 @@ let isReMaterializable = 1, isAsCheapAsAMove = 1,
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let cx = 1 in defm LEASL : RMm<"lea.sl", 0x06, I64>;
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}
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// LEA basic patterns.
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// Need to be defined here to prioritize LEA over ADX.
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def : Pat<(iPTR ADDRrri:$addr), (LEArri MEMrri:$addr)>;
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def : Pat<(iPTR ADDRrii:$addr), (LEArii MEMrii:$addr)>;
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def : Pat<(add I64:$base, simm32:$disp), (LEArii $base, 0, (LO32 $disp))>;
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def : Pat<(add I64:$base, lozero:$disp), (LEASLrii $base, 0, (HI32 $disp))>;
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def lea_add : PatFrags<(ops node:$base, node:$idx, node:$disp),
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[(add (add node:$base, node:$idx), node:$disp),
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(add (add node:$base, node:$disp), node:$idx)]>;
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def : Pat<(lea_add I64:$base, simm7:$idx, simm32:$disp),
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(LEArii $base, (LO7 $idx), (LO32 $disp))>;
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def : Pat<(lea_add I64:$base, I64:$idx, simm32:$disp),
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(LEArri $base, $idx, (LO32 $disp))>;
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def : Pat<(lea_add I64:$base, simm7:$idx, lozero:$disp),
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(LEASLrii $base, (LO7 $idx), (HI32 $disp))>;
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def : Pat<(lea_add I64:$base, I64:$idx, lozero:$disp),
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(LEASLrri $base, $idx, (HI32 $disp))>;
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// Multiclass for load instructions.
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let mayLoad = 1, hasSideEffects = 0 in
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multiclass LOADm<string opcStr, bits<8> opc, RegisterClass RC, ValueType Ty,
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@ -1566,6 +1556,50 @@ def : Pat<(i64 imm:$val),
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(LEASLrii (ANDrm (LEAzii 0, 0, (LO32 imm:$val)), !add(32, 64)), 0,
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(HI32 imm:$val))>;
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// LEA patterns
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def lea_add : PatFrags<(ops node:$base, node:$idx, node:$disp),
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[(add (add node:$base, node:$idx), node:$disp),
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(add (add node:$base, node:$disp), node:$idx),
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(add node:$base, (add $idx, $disp))]>;
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def : Pat<(lea_add I64:$base, simm7:$idx, simm32:$disp),
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(LEArii $base, (LO7 $idx), (LO32 $disp))>;
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def : Pat<(lea_add I64:$base, I64:$idx, simm32:$disp),
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(LEArri $base, $idx, (LO32 $disp))>;
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def : Pat<(lea_add I64:$base, simm7:$idx, lozero:$disp),
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(LEASLrii $base, (LO7 $idx), (HI32 $disp))>;
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def : Pat<(lea_add I64:$base, I64:$idx, lozero:$disp),
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(LEASLrri $base, $idx, (HI32 $disp))>;
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// Address calculation patterns and optimizations
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//
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// Generate following instructions:
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// 1. LEA %reg, label@LO32
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// AND %reg, %reg, (32)0
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// 2. LEASL %reg, label@HI32
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// 3. (LEA %reg, label@LO32)
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// (AND %reg, %reg, (32)0)
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// LEASL %reg, label@HI32(, %reg)
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// 4. (LEA %reg, label@LO32)
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// (AND %reg, %reg, (32)0)
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// LEASL %reg, label@HI32(%reg, %got)
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//
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def velo_only : OutPatFrag<(ops node:$lo),
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(ANDrm (LEAzii 0, 0, $lo), !add(32, 64))>;
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def vehi_only : OutPatFrag<(ops node:$hi),
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(LEASLzii 0, 0, $hi)>;
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def vehi_lo : OutPatFrag<(ops node:$hi, node:$lo),
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(LEASLrii $lo, 0, $hi)>;
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def vehi_baselo : OutPatFrag<(ops node:$base, node:$hi, node:$lo),
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(LEASLrri $base, $lo, $hi)>;
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foreach type = [ "tblockaddress", "tconstpool", "texternalsym", "tglobaladdr",
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"tglobaltlsaddr" ] in {
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def : Pat<(VElo !cast<SDNode>(type):$lo), (velo_only $lo)>;
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def : Pat<(VEhi !cast<SDNode>(type):$hi), (vehi_only $hi)>;
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def : Pat<(add (VEhi !cast<SDNode>(type):$hi), I64:$lo), (vehi_lo $hi, $lo)>;
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def : Pat<(add I64:$base, (add (VEhi !cast<SDNode>(type):$hi), I64:$lo)),
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(vehi_baselo $base, $hi, $lo)>;
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}
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// floating point
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def : Pat<(f32 fpimm:$val),
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(EXTRACT_SUBREG (LEASLzii 0, 0, (HIFP32 $val)), sub_f32)>;
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@ -1813,46 +1847,6 @@ defm : TRATMSTm<atomic_store_8, i32, ST1Brri, ST1Brii, ST1Bzri, ST1Bzii>;
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defm : TRATMSTm<atomic_store_16, i32, ST2Brri, ST2Brii, ST2Bzri, ST2Bzii>;
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defm : TRATMSTm<atomic_store_32, i32, STLrri, STLrii, STLzri, STLzii>;
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// Address calculation and its optimization
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def : Pat<(VEhi tconstpool:$in), (LEASLzii 0, 0, tconstpool:$in)>;
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def : Pat<(VElo tconstpool:$in),
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(ANDrm (LEAzii 0, 0, tconstpool:$in), !add(32, 64))>;
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def : Pat<(add (VEhi tconstpool:$in1), (VElo tconstpool:$in2)),
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(LEASLrii (ANDrm (LEAzii 0, 0, tconstpool:$in2), !add(32, 64)), 0,
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(tconstpool:$in1))>;
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// Address calculation and its optimization
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def : Pat<(VEhi tglobaladdr:$in), (LEASLzii 0, 0, tglobaladdr:$in)>;
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def : Pat<(VElo tglobaladdr:$in),
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(ANDrm (LEAzii 0, 0, tglobaladdr:$in), !add(32, 64))>;
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def : Pat<(add (VEhi tglobaladdr:$in1), (VElo tglobaladdr:$in2)),
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(LEASLrii (ANDrm (LEAzii 0, 0, tglobaladdr:$in2), !add(32, 64)), 0,
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(tglobaladdr:$in1))>;
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// Address calculation and its optimization
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def : Pat<(VEhi tblockaddress:$in), (LEASLzii 0, 0, tblockaddress:$in)>;
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def : Pat<(VElo tblockaddress:$in),
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(ANDrm (LEAzii 0, 0, tblockaddress:$in), !add(32, 64))>;
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def : Pat<(add (VEhi tblockaddress:$in1), (VElo tblockaddress:$in2)),
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(LEASLrii (ANDrm (LEAzii 0, 0, tblockaddress:$in2), !add(32, 64)), 0,
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(tblockaddress:$in1))>;
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// GlobalTLS address calculation and its optimization
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def : Pat<(VEhi tglobaltlsaddr:$in), (LEASLzii 0, 0, tglobaltlsaddr:$in)>;
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def : Pat<(VElo tglobaltlsaddr:$in),
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(ANDrm (LEAzii 0, 0, tglobaltlsaddr:$in), !add(32, 64))>;
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def : Pat<(add (VEhi tglobaltlsaddr:$in1), (VElo tglobaltlsaddr:$in2)),
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(LEASLrii (ANDrm (LEAzii 0, 0, tglobaltlsaddr:$in2), !add(32, 64)), 0,
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(tglobaltlsaddr:$in1))>;
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// Address calculation and its optimization
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def : Pat<(VEhi texternalsym:$in), (LEASLzii 0, 0, texternalsym:$in)>;
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def : Pat<(VElo texternalsym:$in),
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(ANDrm (LEAzii 0, 0, texternalsym:$in), !add(32, 64))>;
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def : Pat<(add (VEhi texternalsym:$in1), (VElo texternalsym:$in2)),
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(LEASLrii (ANDrm (LEAzii 0, 0, texternalsym:$in2), !add(32, 64)), 0,
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(texternalsym:$in1))>;
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// Branches
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def : Pat<(br bb:$addr), (BRCFLa bb:$addr)>;
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@ -54,8 +54,7 @@ define i32 @main() {
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; CHECK-NEXT: st %s1, 184(, %s11)
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; CHECK-NEXT: lea %s0, .L.str@gotoff_lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, .L.str@gotoff_hi(, %s0)
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; CHECK-NEXT: adds.l %s0, %s15, %s0
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; CHECK-NEXT: lea.sl %s0, .L.str@gotoff_hi(%s0, %s15)
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; CHECK-NEXT: lea %s12, printf@plt_lo(-24)
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; CHECK-NEXT: and %s12, %s12, (32)0
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; CHECK-NEXT: sic %s16
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