RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
Code Issues Projects Releases Wiki Activity

[ARM] Change std::sort to llvm::sort in response to r327219

Browse Source 
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: t.p.northover, RKSimon, MatzeB, bkramer

Reviewed By: bkramer

Subscribers: javed.absar, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D44855

llvm-svn: 329329
This commit is contained in:
Mandeep Singh Grang 2018-04-05 18:31:50 +00:00
parent dbad6a134b
commit 9f83f948f8
4 changed files with 18 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/Target/ARM/ARMBaseInstrInfo.cpp
View File

@ -1407,12 +1407,12 @@ void ARMBaseInstrInfo::expandMEMCPY(MachineBasicBlock::iterator MI) const {
SmallVector<unsigned, 6> ScratchRegs;
for(unsigned I = 5; I < MI->getNumOperands(); ++I)
ScratchRegs.push_back(MI->getOperand(I).getReg());
std::sort(ScratchRegs.begin(), ScratchRegs.end(),
[&TRI](const unsigned &Reg1,
const unsigned &Reg2) -> bool {
return TRI.getEncodingValue(Reg1) <
TRI.getEncodingValue(Reg2);
});
llvm::sort(ScratchRegs.begin(), ScratchRegs.end(),
[&TRI](const unsigned &Reg1,
const unsigned &Reg2) -> bool {
return TRI.getEncodingValue(Reg1) <
TRI.getEncodingValue(Reg2);
});
for (const auto &Reg : ScratchRegs) {
LDM.addReg(Reg, RegState::Define);

6
lib/Target/ARM/ARMFrameLowering.cpp
View File

@ -1005,8 +1005,8 @@ void ARMFrameLowering::emitPushInst(MachineBasicBlock &MBB,
if (Regs.empty())
continue;
std::sort(Regs.begin(), Regs.end(), [&](const RegAndKill &LHS,
const RegAndKill &RHS) {
llvm::sort(Regs.begin(), Regs.end(), [&](const RegAndKill &LHS,
const RegAndKill &RHS) {
return TRI.getEncodingValue(LHS.first) < TRI.getEncodingValue(RHS.first);
});
@ -1102,7 +1102,7 @@ void ARMFrameLowering::emitPopInst(MachineBasicBlock &MBB,
if (Regs.empty())
continue;
std::sort(Regs.begin(), Regs.end(), [&](unsigned LHS, unsigned RHS) {
llvm::sort(Regs.begin(), Regs.end(), [&](unsigned LHS, unsigned RHS) {
return TRI.getEncodingValue(LHS) < TRI.getEncodingValue(RHS);
});

16
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
View File

@ -1834,7 +1834,7 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
auto LessThan = [](const MergeCandidate* M0, const MergeCandidate *M1) {
return M0->InsertPos < M1->InsertPos;
};
std::sort(Candidates.begin(), Candidates.end(), LessThan);
llvm::sort(Candidates.begin(), Candidates.end(), LessThan);
// Go through list of candidates and merge.
bool Changed = false;
@ -2172,13 +2172,13 @@ bool ARMPreAllocLoadStoreOpt::RescheduleOps(MachineBasicBlock *MBB,
bool RetVal = false;
// Sort by offset (in reverse order).
std::sort(Ops.begin(), Ops.end(),
[](const MachineInstr *LHS, const MachineInstr *RHS) {
int LOffset = getMemoryOpOffset(*LHS);
int ROffset = getMemoryOpOffset(*RHS);
assert(LHS == RHS || LOffset != ROffset);
return LOffset > ROffset;
});
llvm::sort(Ops.begin(), Ops.end(),
[](const MachineInstr *LHS, const MachineInstr *RHS) {
int LOffset = getMemoryOpOffset(*LHS);
int ROffset = getMemoryOpOffset(*RHS);
assert(LHS == RHS || LOffset != ROffset);
return LOffset > ROffset;
});
// The loads / stores of the same base are in order. Scan them from first to
// last and check for the following:

2
lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
View File

@ -1068,7 +1068,7 @@ void ARMTargetELFStreamer::finishAttributeSection() {
if (Contents.empty())
return;
std::sort(Contents.begin(), Contents.end(), AttributeItem::LessTag);
llvm::sort(Contents.begin(), Contents.end(), AttributeItem::LessTag);
ARMELFStreamer &Streamer = getStreamer();