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Reverse subregister saved loops in register usage info collector; NFC
On AMDGPU we have 70 register classes, so iterating over all 70 each time and exiting is costly on the CPU, this flips the loop around so that it loops over the 70 register classes first, and exits without doing the inner loop if needed. On my test just starting radv this takes RegUsageInfoCollector::runOnMachineFunction from 6.0% of total time to 2.7% of total time, and reduces the startup from 2.24s to 2.19s Patch by David Airlie! Differential Revision: https://reviews.llvm.org/D48582 llvm-svn: 340993
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@ -166,28 +166,27 @@ computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF) {
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}
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// Insert any register fully saved via subregisters.
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for (unsigned PReg = 1, PRegE = TRI.getNumRegs(); PReg < PRegE; ++PReg) {
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if (SavedRegs.test(PReg))
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continue;
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for (const TargetRegisterClass *RC : TRI.regclasses()) {
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if (!RC->CoveredBySubRegs)
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continue;
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// Check if PReg is fully covered by its subregs.
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bool CoveredBySubRegs = false;
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for (const TargetRegisterClass *RC : TRI.regclasses())
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if (RC->CoveredBySubRegs && RC->contains(PReg)) {
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CoveredBySubRegs = true;
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break;
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}
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if (!CoveredBySubRegs)
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continue;
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for (unsigned PReg = 1, PRegE = TRI.getNumRegs(); PReg < PRegE; ++PReg) {
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if (SavedRegs.test(PReg))
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continue;
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// Add PReg to SavedRegs if all subregs are saved.
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bool AllSubRegsSaved = true;
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for (MCSubRegIterator SR(PReg, &TRI, false); SR.isValid(); ++SR)
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if (!SavedRegs.test(*SR)) {
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AllSubRegsSaved = false;
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break;
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}
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if (AllSubRegsSaved)
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SavedRegs.set(PReg);
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// Check if PReg is fully covered by its subregs.
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if (!RC->contains(PReg))
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continue;
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// Add PReg to SavedRegs if all subregs are saved.
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bool AllSubRegsSaved = true;
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for (MCSubRegIterator SR(PReg, &TRI, false); SR.isValid(); ++SR)
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if (!SavedRegs.test(*SR)) {
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AllSubRegsSaved = false;
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break;
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}
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if (AllSubRegsSaved)
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SavedRegs.set(PReg);
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}
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}
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}
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