Use the range variant of find_if instead of unpacking begin/end

No functionality change is intended.

llvm-svn: 278443

include/llvm/Target/CostTable.h

@@ -30,9 +30,9 @@ struct CostTblEntry {
 /// Find in cost table, TypeTy must be comparable to CompareTy by ==
 inline const CostTblEntry *CostTableLookup(ArrayRef<CostTblEntry> Tbl,
                                            int ISD, MVT Ty) {
-  auto I = std::find_if(Tbl.begin(), Tbl.end(),
+  auto I = find_if(Tbl, [=](const CostTblEntry &Entry) {
-                        [=](const CostTblEntry &Entry) {
+    return ISD == Entry.ISD && Ty == Entry.Type;
-                          return ISD == Entry.ISD && Ty == Entry.Type; });
+  });
   if (I != Tbl.end())
     return I;
 
@@ -53,11 +53,9 @@ struct TypeConversionCostTblEntry {
 inline const TypeConversionCostTblEntry *
 ConvertCostTableLookup(ArrayRef<TypeConversionCostTblEntry> Tbl,
                        int ISD, MVT Dst, MVT Src) {
-  auto I = std::find_if(Tbl.begin(), Tbl.end(),
+  auto I = find_if(Tbl, [=](const TypeConversionCostTblEntry &Entry) {
-                        [=](const TypeConversionCostTblEntry &Entry) {
+    return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
-                          return ISD == Entry.ISD && Src == Entry.Src &&
+  });
-                                 Dst == Entry.Dst;
-                        });
   if (I != Tbl.end())
     return I;
 

lib/CodeGen/RegisterPressure.cpp

@@ -328,10 +328,9 @@ void RegPressureTracker::initLiveThru(const RegPressureTracker &RPTracker) {
 
 static LaneBitmask getRegLanes(ArrayRef<RegisterMaskPair> RegUnits,
                                unsigned RegUnit) {
-  auto I = std::find_if(RegUnits.begin(), RegUnits.end(),
+  auto I = find_if(RegUnits, [RegUnit](const RegisterMaskPair Other) {
-                        [RegUnit](const RegisterMaskPair Other) {
+    return Other.RegUnit == RegUnit;
-                        return Other.RegUnit == RegUnit;
+  });
-                        });
   if (I == RegUnits.end())
     return 0;
   return I->LaneMask;
@@ -341,10 +340,9 @@ static void addRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits,
                         RegisterMaskPair Pair) {
   unsigned RegUnit = Pair.RegUnit;
   assert(Pair.LaneMask != 0);
-  auto I = std::find_if(RegUnits.begin(), RegUnits.end(),
+  auto I = find_if(RegUnits, [RegUnit](const RegisterMaskPair Other) {
-                        [RegUnit](const RegisterMaskPair Other) {
+    return Other.RegUnit == RegUnit;
-                          return Other.RegUnit == RegUnit;
+  });
-                        });
   if (I == RegUnits.end()) {
     RegUnits.push_back(Pair);
   } else {
@@ -354,10 +352,9 @@ static void addRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits,
 
 static void setRegZero(SmallVectorImpl<RegisterMaskPair> &RegUnits,
                        unsigned RegUnit) {
-  auto I = std::find_if(RegUnits.begin(), RegUnits.end(),
+  auto I = find_if(RegUnits, [RegUnit](const RegisterMaskPair Other) {
-                        [RegUnit](const RegisterMaskPair Other) {
+    return Other.RegUnit == RegUnit;
-                          return Other.RegUnit == RegUnit;
+  });
-                        });
   if (I == RegUnits.end()) {
     RegUnits.push_back(RegisterMaskPair(RegUnit, 0));
   } else {
@@ -369,10 +366,9 @@ static void removeRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits,
                            RegisterMaskPair Pair) {
   unsigned RegUnit = Pair.RegUnit;
   assert(Pair.LaneMask != 0);
-  auto I = std::find_if(RegUnits.begin(), RegUnits.end(),
+  auto I = find_if(RegUnits, [RegUnit](const RegisterMaskPair Other) {
-                        [RegUnit](const RegisterMaskPair Other) {
+    return Other.RegUnit == RegUnit;
-                          return Other.RegUnit == RegUnit;
+  });
-                        });
   if (I != RegUnits.end()) {
     I->LaneMask &= ~Pair.LaneMask;
     if (I->LaneMask == 0)
@@ -676,10 +672,9 @@ void RegPressureTracker::discoverLiveInOrOut(RegisterMaskPair Pair,
   assert(Pair.LaneMask != 0);
 
   unsigned RegUnit = Pair.RegUnit;
-  auto I = std::find_if(LiveInOrOut.begin(), LiveInOrOut.end(),
+  auto I = find_if(LiveInOrOut, [RegUnit](const RegisterMaskPair &Other) {
-                        [RegUnit](const RegisterMaskPair &Other) {
+    return Other.RegUnit == RegUnit;
-                          return Other.RegUnit == RegUnit;
+  });
-                        });
   LaneBitmask PrevMask;
   LaneBitmask NewMask;
   if (I == LiveInOrOut.end()) {

lib/Support/SourceMgr.cpp

@@ -14,6 +14,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Support/SourceMgr.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/Support/Locale.h"
 #include "llvm/Support/MemoryBuffer.h"
@@ -395,8 +396,7 @@ void SMDiagnostic::print(const char *ProgName, raw_ostream &S, bool ShowColors,
   // map like Clang's TextDiagnostic. For now, we'll just handle tabs by
   // expanding them later, and bail out rather than show incorrect ranges and
   // misaligned fixits for any other odd characters.
-  if (std::find_if(LineContents.begin(), LineContents.end(), isNonASCII) !=
+  if (find_if(LineContents, isNonASCII) != LineContents.end()) {
-      LineContents.end()) {
     printSourceLine(S, LineContents);
     return;
   }

lib/Support/TargetRegistry.cpp

@@ -30,8 +30,7 @@ const Target *TargetRegistry::lookupTarget(const std::string &ArchName,
   // name, because it might be a backend that has no mapping to a target triple.
   const Target *TheTarget = nullptr;
   if (!ArchName.empty()) {
-    auto I =
+    auto I = find_if(targets(),
-        std::find_if(targets().begin(), targets().end(),
                      [&](const Target &T) { return ArchName == T.getName(); });
 
     if (I == targets().end()) {
@@ -70,7 +69,7 @@ const Target *TargetRegistry::lookupTarget(const std::string &TT,
   }
   Triple::ArchType Arch = Triple(TT).getArch();
   auto ArchMatch = [&](const Target &T) { return T.ArchMatchFn(Arch); };
-  auto I = std::find_if(targets().begin(), targets().end(), ArchMatch);
+  auto I = find_if(targets(), ArchMatch);
 
   if (I == targets().end()) {
     Error = "No available targets are compatible with this triple.";

lib/Target/AArch64/AArch64ISelLowering.cpp

@@ -5162,8 +5162,7 @@ static bool isSingletonEXTMask(ArrayRef<int> M, EVT VT, unsigned &Imm) {
 static bool isEXTMask(ArrayRef<int> M, EVT VT, bool &ReverseEXT,
                       unsigned &Imm) {
   // Look for the first non-undef element.
-  const int *FirstRealElt = std::find_if(M.begin(), M.end(),
+  const int *FirstRealElt = find_if(M, [](int Elt) { return Elt >= 0; });
-      [](int Elt) {return Elt >= 0;});
 
   // Benefit form APInt to handle overflow when calculating expected element.
   unsigned NumElts = VT.getVectorNumElements();

lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp

@@ -354,10 +354,10 @@ private:
       if (Src.first->getReg() != AMDGPU::ALU_LITERAL_X)
         continue;
       int64_t Imm = Src.second;
-      std::vector<MachineOperand*>::iterator It =
+      std::vector<MachineOperand *>::iterator It =
-          std::find_if(Lits.begin(), Lits.end(),
+          find_if(Lits, [&](MachineOperand *val) {
-                    [&](MachineOperand* val)
+            return val->isImm() && (val->getImm() == Imm);
-                        { return val->isImm() && (val->getImm() == Imm);});
+          });
 
       // Get corresponding Operand
       MachineOperand &Operand = MI.getOperand(

lib/Target/ARM/ARMConstantIslandPass.cpp

@@ -2056,9 +2056,8 @@ bool ARMConstantIslands::optimizeThumb2JumpTables() {
         // record the TBB or TBH use.
         int CPEntryIdx = JumpTableEntryIndices[JTI];
         auto &CPEs = CPEntries[CPEntryIdx];
-        auto Entry = std::find_if(CPEs.begin(), CPEs.end(), [&](CPEntry &E) {
+        auto Entry =
-          return E.CPEMI == User.CPEMI;
+            find_if(CPEs, [&](CPEntry &E) { return E.CPEMI == User.CPEMI; });
-        });
         ++Entry->RefCount;
         CPUsers.emplace_back(CPUser(NewJTMI, User.CPEMI, 4, false, false));
       }

lib/Target/ARM/ARMFrameLowering.cpp

@@ -196,8 +196,7 @@ struct StackAdjustingInsts {
   }
 
   void addExtraBytes(const MachineBasicBlock::iterator I, unsigned ExtraBytes) {
-    auto Info = std::find_if(Insts.begin(), Insts.end(),
+    auto Info = find_if(Insts, [&](InstInfo &Info) { return Info.I == I; });
-                             [&](InstInfo &Info) { return Info.I == I; });
     assert(Info != Insts.end() && "invalid sp adjusting instruction");
     Info->SPAdjust += ExtraBytes;
   }

lib/Target/Hexagon/HexagonBitSimplify.cpp

@@ -2731,7 +2731,7 @@ bool HexagonLoopRescheduling::processLoop(LoopCand &C) {
     auto LoopInpEq = [G] (const PhiInfo &P) -> bool {
       return G.Out.Reg == P.LR.Reg;
     };
-    if (std::find_if(Phis.begin(), Phis.end(), LoopInpEq) == Phis.end())
+    if (find_if(Phis, LoopInpEq) == Phis.end())
       continue;
 
     G.Inp.Reg = Inputs.find_first();
@@ -2756,7 +2756,7 @@ bool HexagonLoopRescheduling::processLoop(LoopCand &C) {
     auto LoopInpEq = [G] (const PhiInfo &P) -> bool {
       return G.Out.Reg == P.LR.Reg;
     };
-    auto F = std::find_if(Phis.begin(), Phis.end(), LoopInpEq);
+    auto F = find_if(Phis, LoopInpEq);
     if (F == Phis.end())
       continue;
     unsigned PrehR = 0;

lib/Target/Hexagon/HexagonFrameLowering.cpp

@@ -838,7 +838,7 @@ void HexagonFrameLowering::insertCFIInstructionsAt(MachineBasicBlock &MBB,
     auto IfR = [Reg] (const CalleeSavedInfo &C) -> bool {
       return C.getReg() == Reg;
     };
-    auto F = std::find_if(CSI.begin(), CSI.end(), IfR);
+    auto F = find_if(CSI, IfR);
     if (F == CSI.end())
       continue;
 

lib/Target/X86/X86ISelLowering.cpp

@@ -8406,9 +8406,9 @@ static SDValue lowerVectorShuffleAsElementInsertion(
   MVT ExtVT = VT;
   MVT EltVT = VT.getVectorElementType();
 
-  int V2Index = std::find_if(Mask.begin(), Mask.end(),
+  int V2Index =
-                             [&Mask](int M) { return M >= (int)Mask.size(); }) -
+      find_if(Mask, [&Mask](int M) { return M >= (int)Mask.size(); }) -
-                Mask.begin();
+      Mask.begin();
   bool IsV1Zeroable = true;
   for (int i = 0, Size = Mask.size(); i < Size; ++i)
     if (i != V2Index && !Zeroable[i]) {
@@ -9141,9 +9141,7 @@ static SDValue lowerVectorShuffleWithSHUFPS(const SDLoc &DL, MVT VT,
   int NumV2Elements = count_if(Mask, [](int M) { return M >= 4; });
 
   if (NumV2Elements == 1) {
-    int V2Index =
+    int V2Index = find_if(Mask, [](int M) { return M >= 4; }) - Mask.begin();
-        std::find_if(Mask.begin(), Mask.end(), [](int M) { return M >= 4; }) -
-        Mask.begin();
 
     // Compute the index adjacent to V2Index and in the same half by toggling
     // the low bit.

tools/llvm-ar/llvm-ar.cpp

@@ -498,10 +498,9 @@ static InsertAction computeInsertAction(ArchiveOperation Operation,
   if (Operation == QuickAppend || Members.empty())
     return IA_AddOldMember;
 
-  auto MI =
+  auto MI = find_if(Members, [Name](StringRef Path) {
-      std::find_if(Members.begin(), Members.end(), [Name](StringRef Path) {
+    return Name == sys::path::filename(Path);
-        return Name == sys::path::filename(Path);
+  });
-      });
 
   if (MI == Members.end())
     return IA_AddOldMember;

tools/llvm-objdump/MachODump.cpp

@@ -880,11 +880,9 @@ static void DumpLiteralPointerSection(MachOObjectFile *O,
     }
 
     // For local references see what the section the literal pointer points to.
-    auto Sect = std::find_if(LiteralSections.begin(), LiteralSections.end(),
+    auto Sect = find_if(LiteralSections, [&](const SectionRef &R) {
-                             [&](const SectionRef &R) {
+      return lp >= R.getAddress() && lp < R.getAddress() + R.getSize();
-                               return lp >= R.getAddress() &&
+    });
-                                      lp < R.getAddress() + R.getSize();
-                             });
     if (Sect == LiteralSections.end()) {
       outs() << format("0x%" PRIx64, lp) << " (not in a literal section)\n";
       continue;
@@ -2040,11 +2038,10 @@ static int SymbolizerGetOpInfo(void *DisInfo, uint64_t Pc, uint64_t Offset,
     bool r_scattered = false;
     uint32_t r_value, pair_r_value, r_type, r_length, other_half;
     auto Reloc =
-        std::find_if(info->S.relocations().begin(), info->S.relocations().end(),
+        find_if(info->S.relocations(), [&](const RelocationRef &Reloc) {
-                     [&](const RelocationRef &Reloc) {
+          uint64_t RelocOffset = Reloc.getOffset();
-                       uint64_t RelocOffset = Reloc.getOffset();
+          return RelocOffset == sect_offset;
-                       return RelocOffset == sect_offset;
+        });
-                     });
 
     if (Reloc == info->S.relocations().end())
       return 0;
@@ -2179,11 +2176,10 @@ static int SymbolizerGetOpInfo(void *DisInfo, uint64_t Pc, uint64_t Offset,
     uint64_t sect_addr = info->S.getAddress();
     uint64_t sect_offset = (Pc + Offset) - sect_addr;
     auto Reloc =
-        std::find_if(info->S.relocations().begin(), info->S.relocations().end(),
+        find_if(info->S.relocations(), [&](const RelocationRef &Reloc) {
-                     [&](const RelocationRef &Reloc) {
+          uint64_t RelocOffset = Reloc.getOffset();
-                       uint64_t RelocOffset = Reloc.getOffset();
+          return RelocOffset == sect_offset;
-                       return RelocOffset == sect_offset;
+        });
-                     });
 
     if (Reloc == info->S.relocations().end())
       return 0;

unittests/ProfileData/InstrProfTest.cpp

@@ -167,15 +167,13 @@ TEST_F(InstrProfTest, get_profile_summary) {
     auto Predicate = [&Cutoff](const ProfileSummaryEntry &PE) {
       return PE.Cutoff == Cutoff;
     };
-    auto EightyPerc = std::find_if(Details.begin(), Details.end(), Predicate);
+    auto EightyPerc = find_if(Details, Predicate);
     Cutoff = 900000;
-    auto NinetyPerc = std::find_if(Details.begin(), Details.end(), Predicate);
+    auto NinetyPerc = find_if(Details, Predicate);
     Cutoff = 950000;
-    auto NinetyFivePerc =
+    auto NinetyFivePerc = find_if(Details, Predicate);
-        std::find_if(Details.begin(), Details.end(), Predicate);
     Cutoff = 990000;
-    auto NinetyNinePerc =
+    auto NinetyNinePerc = find_if(Details, Predicate);
-        std::find_if(Details.begin(), Details.end(), Predicate);
     ASSERT_EQ(576460752303423488U, EightyPerc->MinCount);
     ASSERT_EQ(288230376151711744U, NinetyPerc->MinCount);
     ASSERT_EQ(288230376151711744U, NinetyFivePerc->MinCount);

unittests/ProfileData/SampleProfTest.cpp

@@ -124,15 +124,13 @@ struct SampleProfTest : ::testing::Test {
         return PE.Cutoff == Cutoff;
       };
       std::vector<ProfileSummaryEntry> &Details = Summary.getDetailedSummary();
-      auto EightyPerc = std::find_if(Details.begin(), Details.end(), Predicate);
+      auto EightyPerc = find_if(Details, Predicate);
       Cutoff = 900000;
-      auto NinetyPerc = std::find_if(Details.begin(), Details.end(), Predicate);
+      auto NinetyPerc = find_if(Details, Predicate);
       Cutoff = 950000;
-      auto NinetyFivePerc =
+      auto NinetyFivePerc = find_if(Details, Predicate);
-          std::find_if(Details.begin(), Details.end(), Predicate);
       Cutoff = 990000;
-      auto NinetyNinePerc =
+      auto NinetyNinePerc = find_if(Details, Predicate);
-          std::find_if(Details.begin(), Details.end(), Predicate);
       ASSERT_EQ(60000u, EightyPerc->MinCount);
       ASSERT_EQ(60000u, NinetyPerc->MinCount);
       ASSERT_EQ(60000u, NinetyFivePerc->MinCount);

utils/TableGen/AsmMatcherEmitter.cpp

@@ -556,20 +556,17 @@ struct MatchableInfo {
   /// findAsmOperand - Find the AsmOperand with the specified name and
   /// suboperand index.
   int findAsmOperand(StringRef N, int SubOpIdx) const {
-    auto I = std::find_if(AsmOperands.begin(), AsmOperands.end(),
+    auto I = find_if(AsmOperands, [&](const AsmOperand &Op) {
-                          [&](const AsmOperand &Op) {
+      return Op.SrcOpName == N && Op.SubOpIdx == SubOpIdx;
-                            return Op.SrcOpName == N && Op.SubOpIdx == SubOpIdx;
+    });
-                          });
     return (I != AsmOperands.end()) ? I - AsmOperands.begin() : -1;
   }
 
   /// findAsmOperandNamed - Find the first AsmOperand with the specified name.
   /// This does not check the suboperand index.
   int findAsmOperandNamed(StringRef N) const {
-    auto I = std::find_if(AsmOperands.begin(), AsmOperands.end(),
+    auto I = find_if(AsmOperands,
-                          [&](const AsmOperand &Op) {
+                     [&](const AsmOperand &Op) { return Op.SrcOpName == N; });
-                            return Op.SrcOpName == N;
-                          });
     return (I != AsmOperands.end()) ? I - AsmOperands.begin() : -1;
   }
 
@@ -774,9 +771,9 @@ public:
   }
 
   bool hasOptionalOperands() const {
-    return std::find_if(Classes.begin(), Classes.end(),
+    return find_if(Classes, [](const ClassInfo &Class) {
-                        [](const ClassInfo& Class){ return Class.IsOptional; })
+             return Class.IsOptional;
-              != Classes.end();
+           }) != Classes.end();
   }
 };
 

utils/TableGen/CodeGenSchedule.cpp

@@ -1570,11 +1570,9 @@ void CodeGenSchedModels::checkCompleteness() {
         continue;
 
       const RecVec &InstRWs = SC.InstRWs;
-      auto I = std::find_if(InstRWs.begin(), InstRWs.end(),
+      auto I = find_if(InstRWs, [&ProcModel](const Record *R) {
-                            [&ProcModel] (const Record *R) {
+        return R->getValueAsDef("SchedModel") == ProcModel.ModelDef;
-                              return R->getValueAsDef("SchedModel") ==
+      });
-                                     ProcModel.ModelDef;
-                            });
       if (I == InstRWs.end()) {
         PrintError("'" + ProcModel.ModelName + "' lacks information for '" +
                    Inst->TheDef->getName() + "'");