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[llvm] Use llvm::drop_begin (NFC)
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@ -866,7 +866,7 @@ LazyCallGraph::RefSCC::switchInternalEdgeToRef(Node &SourceN, Node &TargetN) {
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PendingSCCStack.clear();
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while (!DFSStack.empty())
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OldSCC.Nodes.push_back(DFSStack.pop_back_val().first);
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for (Node &N : make_range(OldSCC.begin() + OldSize, OldSCC.end())) {
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for (Node &N : drop_begin(OldSCC, OldSize)) {
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N.DFSNumber = N.LowLink = -1;
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G->SCCMap[&N] = &OldSCC;
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}
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@ -145,7 +145,7 @@ static void addVCallToSet(DevirtCallSite Call, GlobalValue::GUID Guid,
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SetVector<FunctionSummary::ConstVCall> &ConstVCalls) {
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std::vector<uint64_t> Args;
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// Start from the second argument to skip the "this" pointer.
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for (auto &Arg : make_range(Call.CB.arg_begin() + 1, Call.CB.arg_end())) {
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for (auto &Arg : drop_begin(Call.CB.args(), 1)) {
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auto *CI = dyn_cast<ConstantInt>(Arg);
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if (!CI || CI->getBitWidth() > 64) {
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VCalls.insert({Guid, Call.Offset});
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@ -290,9 +290,9 @@ bool verifyAllVectorsHaveSameWidth(FunctionType *Signature) {
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assert(VecTys.size() > 1 && "Invalid number of elements.");
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const ElementCount EC = VecTys[0]->getElementCount();
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return llvm::all_of(
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llvm::make_range(VecTys.begin() + 1, VecTys.end()),
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[&EC](VectorType *VTy) { return (EC == VTy->getElementCount()); });
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return llvm::all_of(llvm::drop_begin(VecTys, 1), [&EC](VectorType *VTy) {
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return (EC == VTy->getElementCount());
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});
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}
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#endif // NDEBUG
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@ -661,7 +661,7 @@ bool CodeGenPrepare::eliminateFallThrough(Function &F) {
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// Use a temporary array to avoid iterator being invalidated when
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// deleting blocks.
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SmallVector<WeakTrackingVH, 16> Blocks;
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for (auto &Block : llvm::make_range(std::next(F.begin()), F.end()))
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for (auto &Block : llvm::drop_begin(F, 1))
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Blocks.push_back(&Block);
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SmallSet<WeakTrackingVH, 16> Preds;
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@ -747,7 +747,7 @@ bool CodeGenPrepare::eliminateMostlyEmptyBlocks(Function &F) {
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// as we remove them.
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// Note that this intentionally skips the entry block.
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SmallVector<WeakTrackingVH, 16> Blocks;
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for (auto &Block : llvm::make_range(std::next(F.begin()), F.end()))
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for (auto &Block : llvm::drop_begin(F, 1))
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Blocks.push_back(&Block);
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for (auto &Block : Blocks) {
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@ -110,7 +110,7 @@ HexagonMCInstrInfo::bundleInstructions(MCInstrInfo const &MCII,
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iterator_range<MCInst::const_iterator>
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HexagonMCInstrInfo::bundleInstructions(MCInst const &MCI) {
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assert(isBundle(MCI));
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return make_range(MCI.begin() + bundleInstructionsOffset, MCI.end());
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return drop_begin(MCI, bundleInstructionsOffset);
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}
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size_t HexagonMCInstrInfo::bundleSize(MCInst const &MCI) {
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@ -977,8 +977,7 @@ WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI,
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/*isSS=*/false);
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unsigned ValNo = 0;
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SmallVector<SDValue, 8> Chains;
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for (SDValue Arg :
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make_range(OutVals.begin() + NumFixedArgs, OutVals.end())) {
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for (SDValue Arg : drop_begin(OutVals, NumFixedArgs)) {
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assert(ArgLocs[ValNo].getValNo() == ValNo &&
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"ArgLocs should remain in order and only hold varargs args");
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unsigned Offset = ArgLocs[ValNo++].getLocMemOffset();
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@ -1334,7 +1334,7 @@ void X86AsmPrinter::LowerPATCHABLE_OP(const MachineInstr &MI,
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MCInst MCI;
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MCI.setOpcode(Opcode);
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for (auto &MO : make_range(MI.operands_begin() + 2, MI.operands_end()))
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for (auto &MO : drop_begin(MI.operands(), 2))
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if (auto MaybeOperand = MCIL.LowerMachineOperand(&MI, MO))
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MCI.addOperand(MaybeOperand.getValue());
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@ -1710,7 +1710,7 @@ void X86AsmPrinter::LowerPATCHABLE_RET(const MachineInstr &MI,
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unsigned OpCode = MI.getOperand(0).getImm();
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MCInst Ret;
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Ret.setOpcode(OpCode);
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for (auto &MO : make_range(MI.operands_begin() + 1, MI.operands_end()))
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for (auto &MO : drop_begin(MI.operands(), 1))
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if (auto MaybeOperand = MCIL.LowerMachineOperand(&MI, MO))
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Ret.addOperand(MaybeOperand.getValue());
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OutStreamer->emitInstruction(Ret, getSubtargetInfo());
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@ -1749,7 +1749,7 @@ void X86AsmPrinter::LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI,
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// Before emitting the instruction, add a comment to indicate that this is
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// indeed a tail call.
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OutStreamer->AddComment("TAILCALL");
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for (auto &MO : make_range(MI.operands_begin() + 1, MI.operands_end()))
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for (auto &MO : drop_begin(MI.operands(), 1))
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if (auto MaybeOperand = MCIL.LowerMachineOperand(&MI, MO))
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TC.addOperand(MaybeOperand.getValue());
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OutStreamer->emitInstruction(TC, getSubtargetInfo());
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@ -739,8 +739,7 @@ private:
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<< ore::NV("OpenMPParallelMergeFront",
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MergableCIs.front()->getDebugLoc())
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<< " merged with parallel regions at ";
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for (auto *CI :
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llvm::make_range(MergableCIs.begin() + 1, MergableCIs.end())) {
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for (auto *CI : llvm::drop_begin(MergableCIs, 1)) {
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OR << ore::NV("OpenMPParallelMerge", CI->getDebugLoc());
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if (CI != MergableCIs.back())
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OR << ", ";
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@ -261,7 +261,7 @@ void splitAndWriteThinLTOBitcode(
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if (!RT || RT->getBitWidth() > 64 || F->arg_empty() ||
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!F->arg_begin()->use_empty())
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return;
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for (auto &Arg : make_range(std::next(F->arg_begin()), F->arg_end())) {
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for (auto &Arg : drop_begin(F->args(), 1)) {
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auto *ArgT = dyn_cast<IntegerType>(Arg.getType());
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if (!ArgT || ArgT->getBitWidth() > 64)
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return;
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@ -470,7 +470,7 @@ CallSiteInfo &VTableSlotInfo::findCallSiteInfo(CallBase &CB) {
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auto *CBType = dyn_cast<IntegerType>(CB.getType());
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if (!CBType || CBType->getBitWidth() > 64 || CB.arg_empty())
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return CSInfo;
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for (auto &&Arg : make_range(CB.arg_begin() + 1, CB.arg_end())) {
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for (auto &&Arg : drop_begin(CB.args(), 1)) {
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auto *CI = dyn_cast<ConstantInt>(Arg);
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if (!CI || CI->getBitWidth() > 64)
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return CSInfo;
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@ -456,8 +456,7 @@ public:
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int Level = 0;
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OS << formatv("{0,-5} {1,-60} {2,+12} {3,+16}\n", "lvl", "function",
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"count", "sum");
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for (auto *F :
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reverse(make_range(CurrentStack.begin() + 1, CurrentStack.end()))) {
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for (auto *F : reverse(drop_begin(CurrentStack, 1))) {
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auto Sum = std::accumulate(F->ExtraData.IntermediateDurations.begin(),
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F->ExtraData.IntermediateDurations.end(), 0LL);
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auto FuncId = FN.SymbolOrNumber(F->FuncId);
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