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https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 19:52:54 +01:00
fixed printing messages
llvm-svn: 590
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parent
6807a780c5
commit
c1514789f3
@ -120,8 +120,10 @@ void LiveRangeInfo::constructLiveRanges()
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OpI.getMachineOperand().getVRegValue(), isCC );
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if(isCC )
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cout << "\a" << "**created a LR for a CC reg**" << cout;
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if(isCC ) {
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cout << "\a**created a LR for a CC reg:";
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printValue( OpI.getMachineOperand().getVRegValue() );
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}
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DefRange->setRegClass( RegClassList[ rcid ] );
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@ -28,7 +28,7 @@ PhyRegAlloc::PhyRegAlloc(const Method *const M,
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void PhyRegAlloc::createIGNodeListsAndIGs()
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{
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cout << "Creating LR lists ..." << endl;
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if(DEBUG_RA ) cout << "Creating LR lists ..." << endl;
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// hash map iterator
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LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin();
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@ -113,7 +113,7 @@ void PhyRegAlloc::addInterference(const Value *const Def,
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LROfVar->addCallInterference( (const Instruction *const) Def );
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}
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else if(DEBUG_RA) {
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else if(DEBUG_RA > 1) {
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// we will not have LRs for values not explicitly allocated in the
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// instruction stream (e.g., constants)
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cout << " warning: no live range for " ;
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@ -221,7 +221,73 @@ void PhyRegAlloc::updateMachineCode()
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for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
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cout << endl << "BB "; printValue( *BBI); cout << ": ";
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// get the iterator for machine instructions
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MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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MachineCodeForBasicBlock::iterator MInstIterator = MIVec.begin();
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// iterate over all the machine instructions in BB
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for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
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MachineInstr *const MInst = *MInstIterator;
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//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
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for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) {
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MachineOperand& Op = MInst->getOperand(OpNum);
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if( Op.getOperandType() == MachineOperand::MO_VirtualRegister ||
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Op.getOperandType() == MachineOperand::MO_CCRegister) {
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const Value *const Val = Op.getVRegValue();
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// delete this condition checking later (must assert if Val is null)
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if( !Val ) {
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cout << "Error: NULL Value found in instr." << endl;
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continue;
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}
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assert( Val && "Value is NULL");
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const LiveRange *const LR = LRI.getLiveRangeForValue(Val);
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if ( !LR ) {
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if( ! ( (Val->getType())->isLabelType() ||
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(Val->getValueType() == Value::ConstantVal) ) ) {
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cout << "Warning: No LiveRange for: ";
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printValue( Val); cout << endl;
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}
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//assert( LR && "No LR found for Value");
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continue;
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}
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unsigned RCID = (LR->getRegClass())->getID();
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Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) );
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int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor());
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}
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}
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}
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}
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}
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void PhyRegAlloc::printMachineCode()
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{
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cout << endl << ";************** Method ";
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cout << Meth->getName() << " *****************" << endl;
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Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
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for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
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cout << endl ; printLabel( *BBI); cout << ": ";
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// get the iterator for machine instructions
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MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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@ -232,8 +298,10 @@ void PhyRegAlloc::updateMachineCode()
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MachineInstr *const MInst = *MInstIterator;
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cout << endl << "\t";
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cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
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//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
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@ -247,7 +315,7 @@ void PhyRegAlloc::updateMachineCode()
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const Value *const Val = Op.getVRegValue();
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if( !Val ) {
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cout << "\t<** Value is NULL!!!**>";
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cout << "\t<*NULL Value*>";
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continue;
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}
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assert( Val && "Value is NULL");
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@ -255,6 +323,8 @@ void PhyRegAlloc::updateMachineCode()
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const LiveRange *const LR = LRI.getLiveRangeForValue(Val);
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if ( !LR ) {
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if( ! ( (Val->getType())->isLabelType() ||
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(Val->getValueType() == Value::ConstantVal) ) ) {
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cout << "\t" << "<*No LiveRange for: ";
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@ -271,22 +341,50 @@ void PhyRegAlloc::updateMachineCode()
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//cout << "Setting reg for value: "; printValue( Val );
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//cout << endl;
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//Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) );
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Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) );
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int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor());
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cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
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}
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}
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else if( Op.getOperandType() == MachineOperand:: MO_MachineRegister) {
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cout << "\t" << "%"<< MRI.getUnifiedRegName( Op.getMachineRegNum() );
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}
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else if( Op.getOperandType() == MachineOperand::MO_PCRelativeDisp ) {
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const Value *const Val = Op.getVRegValue () ;
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if( !Val ) {
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cout << "\t<*NULL Value*>";
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continue;
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}
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if( (Val->getValueType() == Value::BasicBlockVal))
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{ cout << "\t"; printLabel( Op.getVRegValue () ); }
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else { cout << "\t"; printValue( Val ); }
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}
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else
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cout << "\t" << Op; // use dump field
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}
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}
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cout << endl;
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}
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cout << endl;
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}
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void PhyRegAlloc::printLabel(const Value *const Val)
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{
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if( Val->hasName() )
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cout << Val->getName();
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else
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cout << "Label" << Val;
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}
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@ -328,14 +426,16 @@ void PhyRegAlloc::allocateRegisters()
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}
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MRI.colorArgs(Meth, LRI); // color method args
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MRI.colorCallArgs(CallInstrList, LRI, AddedInstrMap); // color call args of call instrns
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// color call args of call instrns
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MRI.colorCallArgs(CallInstrList, LRI, AddedInstrMap);
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// color all register classes
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for( unsigned int rc=0; rc < NumOfRegClasses ; rc++)
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RegClassList[ rc ]->colorAllRegs();
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updateMachineCode();
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//PrintMachineInstructions(Meth);
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//updateMachineCode();
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PrintMachineInstructions(Meth);
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printMachineCode(); // only for DEBUGGING
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}
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@ -169,34 +169,21 @@ void RegClass::colorIGNode(IGNode *const Node)
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MRC->colorIGNode(Node, IsColorUsedArr);
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}
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else {
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cout << " Node " << Node->getIndex();
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cout << " already colored with color " << Node->getColor() << endl;
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if( DEBUG_RA ) {
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cout << " Node " << Node->getIndex();
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cout << " already colored with color " << Node->getColor() << endl;
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}
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}
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if( !Node->hasColor() ) {
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cout << " Node " << Node->getIndex();
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cout << " - could not find a color (needs spilling)" << endl;
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if( DEBUG_RA ) {
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cout << " Node " << Node->getIndex();
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cout << " - could not find a color (needs spilling)" << endl;
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}
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}
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}
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#if 0
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if( DEBUG_RA) { // printing code
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/* cout << " Node " << Node->getIndex();
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if( Node->hasColor() ) {
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cout << " colored with color " << Node->getColor() << " [" ;
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cout << SparcFloatRegOrder::getRegName(Node->getColor());
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if( Node->getTypeID() == Type::DoubleTyID )
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cout << "+" << SparcFloatRegOrder::getRegName(Node->getColor()+1);
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cout << "]" << endl;
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}
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*/
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// MRC->printReg( Node->getParentLR());
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cout << " Node " << Node->getIndex();
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if( Node->hasColor() )
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cout << " colored with color " << Node->getColor() << endl;
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#endif
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