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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00

[NFC] test case clean up

1. remove redundant tests
2. update XForm_tests to generated expected code gen

llvm-svn: 330290
This commit is contained in:
Lei Huang 2018-04-18 20:22:26 +00:00
parent 8a1d9129ff
commit c24375e244

View File

@ -106,39 +106,37 @@ entry:
}
; Function Attrs: norecurse nounwind
define void @sdwConv2qp_testXForm(fp128* nocapture %sink,
i8* nocapture readonly %a) {
define fp128* @sdwConv2qp_testXForm(fp128* returned %sink,
i8* nocapture readonly %a) {
entry:
%add.ptr = getelementptr inbounds i8, i8* %a, i64 3
%add.ptr = getelementptr inbounds i8, i8* %a, i64 73333
%0 = bitcast i8* %add.ptr to i64*
%1 = load i64, i64* %0, align 8
%conv = sitofp i64 %1 to fp128
store fp128 %conv, fp128* %sink, align 16
ret void
ret fp128* %sink
; CHECK-LABEL: sdwConv2qp_testXForm
; CHECK: addi [[REG:[0-9]+]], 4, 3
; CHECK-NEXT: lxsd [[REG1:[0-9]+]], 0([[REG]])
; CHECK-NEXT: xscvsdqp [[CONV:[0-9]+]], [[REG1]]
; CHECK: lxsdx [[REG:[0-9]+]],
; CHECK-NEXT: xscvsdqp [[CONV:[0-9]+]], [[REG]]
; CHECK-NEXT: stxv [[CONV]], 0(3)
; CHECK-NEXT: blr
}
; Function Attrs: norecurse nounwind
define void @udwConv2qp_testXForm(fp128* nocapture %sink,
i8* nocapture readonly %a) {
define fp128* @udwConv2qp_testXForm(fp128* returned %sink,
i8* nocapture readonly %a) {
entry:
%add.ptr = getelementptr inbounds i8, i8* %a, i64 3
%add.ptr = getelementptr inbounds i8, i8* %a, i64 73333
%0 = bitcast i8* %add.ptr to i64*
%1 = load i64, i64* %0, align 8
%conv = uitofp i64 %1 to fp128
store fp128 %conv, fp128* %sink, align 16
ret void
ret fp128* %sink
; CHECK-LABEL: udwConv2qp_testXForm
; CHECK: addi [[REG:[0-9]+]], 4, 3
; CHECK-NEXT: lxsd [[REG1:[0-9]+]], 0([[REG]])
; CHECK-NEXT: xscvudqp [[CONV:[0-9]+]], [[REG1]]
; CHECK: lxsdx [[REG:[0-9]+]],
; CHECK-NEXT: xscvudqp [[CONV:[0-9]+]], [[REG]]
; CHECK-NEXT: stxv [[CONV]], 0(3)
; CHECK-NEXT: blr
}
@ -152,8 +150,8 @@ entry:
; CHECK-LABEL: swConv2qp
; CHECK-NOT: lwz
; CHECK: mtvsrwa [[REG0:[0-9]+]], 4
; CHECK-NEXT: xscvsdqp [[CONV:[0-9]+]], [[REG1]]
; CHECK: mtvsrwa [[REG:[0-9]+]], 4
; CHECK-NEXT: xscvsdqp [[CONV:[0-9]+]], [[REG]]
; CHECK-NEXT: stxv [[CONV]], 0(3)
; CHECK-NEXT: blr
}
@ -262,44 +260,6 @@ entry:
; CHECK-NEXT: blr
}
; Function Attrs: norecurse nounwind
define void @swConv2qp_testXForm(fp128* nocapture %sink,
i8* nocapture readonly %a) {
entry:
%add.ptr = getelementptr inbounds i8, i8* %a, i64 3
%0 = bitcast i8* %add.ptr to i32*
%1 = load i32, i32* %0, align 4
%conv = sitofp i32 %1 to fp128
store fp128 %conv, fp128* %sink, align 16
ret void
; CHECK-LABEL: swConv2qp_testXForm
; CHECK: addi [[REG:[0-9]+]], 4, 3
; CHECK-NEXT: lxsiwax [[REG1:[0-9]+]], 0, [[REG]]
; CHECK-NEXT: xscvsdqp [[CONV:[0-9]+]], [[REG1]]
; CHECK-NEXT: stxv [[CONV]], 0(3)
; CHECK-NEXT: blr
}
; Function Attrs: norecurse nounwind
define void @uwConv2qp_testXForm(fp128* nocapture %sink,
i8* nocapture readonly %a) {
entry:
%add.ptr = getelementptr inbounds i8, i8* %a, i64 3
%0 = bitcast i8* %add.ptr to i32*
%1 = load i32, i32* %0, align 4
%conv = uitofp i32 %1 to fp128
store fp128 %conv, fp128* %sink, align 16
ret void
; CHECK-LABEL: uwConv2qp_testXForm
; CHECK: addi [[REG:[0-9]+]], 4, 3
; CHECK-NEXT: lxsiwzx [[REG1:[0-9]+]], 0, [[REG]]
; CHECK-NEXT: xscvudqp [[CONV:[0-9]+]], [[REG1]]
; CHECK-NEXT: stxv [[CONV]], 0(3)
; CHECK-NEXT: blr
}
; Function Attrs: norecurse nounwind
define void @uhwConv2qp(fp128* nocapture %a, i16 zeroext %b) {
entry: