1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00

AArch64: support SwiftCC properly on AAPCS64

The previous SwiftCC support for AAPCS64 was partially correct.  It
setup swiftself parameters in the proper register but failed to setup
swifterror in the correct register.  This would break compilation of
swift code for non-Darwin AAPCS64 conforming environments.

llvm-svn: 313956
This commit is contained in:
Saleem Abdulrasool 2017-09-22 04:31:44 +00:00
parent e733e91370
commit d1a0918ad2
2 changed files with 21 additions and 0 deletions

View File

@ -49,6 +49,9 @@ def CC_AArch64_AAPCS : CallingConv<[
// Pass SwiftSelf in a callee saved register.
CCIfSwiftSelf<CCIfType<[i64], CCAssignToRegWithShadow<[X20], [W20]>>>,
// A SwiftError is passed in X21.
CCIfSwiftError<CCIfType<[i64], CCAssignToRegWithShadow<[X21], [W21]>>>,
CCIfConsecutiveRegs<CCCustom<"CC_AArch64_Custom_Block">>,
// Handle i1, i8, i16, i32, i64, f32, f64 and v2f64 by passing in registers,

View File

@ -0,0 +1,18 @@
; RUN: llc -mtriple aarch64-unknown-linux-gnu -filetype asm -o - %s | FileCheck %s
%swift.error = type opaque
declare swiftcc void @f(%swift.error** swifterror)
define swiftcc void @g(i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %swift.error** swifterror %error) {
entry:
call swiftcc void @f(%swift.error** nonnull nocapture swifterror %error)
ret void
}
; CHEECK-LABEL: g
; CHECK: str x30, [sp, #-16]!
; CHECK: bl f
; CHECK: ldr x30, [sp], #16
; CHECK: ret