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AArch64: support SwiftCC properly on AAPCS64
The previous SwiftCC support for AAPCS64 was partially correct. It setup swiftself parameters in the proper register but failed to setup swifterror in the correct register. This would break compilation of swift code for non-Darwin AAPCS64 conforming environments. llvm-svn: 313956
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@ -49,6 +49,9 @@ def CC_AArch64_AAPCS : CallingConv<[
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// Pass SwiftSelf in a callee saved register.
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CCIfSwiftSelf<CCIfType<[i64], CCAssignToRegWithShadow<[X20], [W20]>>>,
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// A SwiftError is passed in X21.
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CCIfSwiftError<CCIfType<[i64], CCAssignToRegWithShadow<[X21], [W21]>>>,
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CCIfConsecutiveRegs<CCCustom<"CC_AArch64_Custom_Block">>,
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// Handle i1, i8, i16, i32, i64, f32, f64 and v2f64 by passing in registers,
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18
test/CodeGen/AArch64/swift-error.ll
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18
test/CodeGen/AArch64/swift-error.ll
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@ -0,0 +1,18 @@
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; RUN: llc -mtriple aarch64-unknown-linux-gnu -filetype asm -o - %s | FileCheck %s
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%swift.error = type opaque
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declare swiftcc void @f(%swift.error** swifterror)
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define swiftcc void @g(i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %swift.error** swifterror %error) {
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entry:
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call swiftcc void @f(%swift.error** nonnull nocapture swifterror %error)
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ret void
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}
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; CHEECK-LABEL: g
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; CHECK: str x30, [sp, #-16]!
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; CHECK: bl f
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; CHECK: ldr x30, [sp], #16
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; CHECK: ret
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