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[X86][SSE] Added tests for pre-truncating arithmetic operations that have already been extended
As discussed on D28219 - it is profitable to combine trunc(binop (s/zext(x), s/zext(y)) to binop(trunc(s/zext(x)), trunc(s/zext(y))) assuming the trunc(ext()) will simplify further llvm-svn: 292487
This commit is contained in:
Simon Pilgrim
parent
ba88ebaa68
commit
d64c8178c6
@ -412,6 +412,65 @@ define <16 x i8> @trunc_add_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwin
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ret <16 x i8> %2
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}
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define <8 x i16> @trunc_add_v8i32_v8i16_sext_8i8(<16 x i8> %a0, <8 x i32> %a1) {
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; SSE-LABEL: trunc_add_v8i32_v8i16_sext_8i8:
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; SSE: # BB#0:
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; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
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; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3]
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; SSE-NEXT: psrad $24, %xmm3
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
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; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
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; SSE-NEXT: psrad $24, %xmm0
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; SSE-NEXT: paddd %xmm2, %xmm0
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; SSE-NEXT: paddd %xmm1, %xmm3
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; SSE-NEXT: pslld $16, %xmm3
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; SSE-NEXT: psrad $16, %xmm3
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; SSE-NEXT: pslld $16, %xmm0
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; SSE-NEXT: psrad $16, %xmm0
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; SSE-NEXT: packssdw %xmm0, %xmm3
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; SSE-NEXT: movdqa %xmm3, %xmm0
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: trunc_add_v8i32_v8i16_sext_8i8:
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; AVX1: # BB#0:
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; AVX1-NEXT: vpmovsxbd %xmm0, %xmm2
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; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
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; AVX1-NEXT: vpaddd %xmm3, %xmm0, %xmm0
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; AVX1-NEXT: vpaddd %xmm1, %xmm2, %xmm1
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; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: trunc_add_v8i32_v8i16_sext_8i8:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0
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; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero
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; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
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; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: trunc_add_v8i32_v8i16_sext_8i8:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpmovsxbd %xmm0, %ymm0
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; AVX512-NEXT: vpaddd %ymm1, %ymm0, %ymm0
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; AVX512-NEXT: vpmovdw %zmm0, %ymm0
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; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
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; AVX512-NEXT: retq
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%1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%2 = sext <8 x i8> %1 to <8 x i32>
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%3 = add <8 x i32> %2, %a1
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%4 = trunc <8 x i32> %3 to <8 x i16>
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ret <8 x i16> %4
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}
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;
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; add to constant
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;
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@ -2244,6 +2303,74 @@ define <16 x i8> @trunc_mul_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwin
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ret <16 x i8> %2
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}
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define <8 x i16> @trunc_mul_v8i32_v8i16_zext_8i8(<16 x i8> %a0, <8 x i32> %a1) {
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; SSE-LABEL: trunc_mul_v8i32_v8i16_zext_8i8:
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; SSE: # BB#0:
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; SSE-NEXT: pxor %xmm3, %xmm3
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; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]
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; SSE-NEXT: movdqa %xmm0, %xmm4
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; SSE-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
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; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
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; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
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; SSE-NEXT: pmuludq %xmm1, %xmm0
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
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; SSE-NEXT: pmuludq %xmm3, %xmm1
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; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
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; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm4[1,1,3,3]
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; SSE-NEXT: pmuludq %xmm2, %xmm4
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; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm4[0,2,2,3]
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; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
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; SSE-NEXT: pmuludq %xmm1, %xmm2
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; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
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; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
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; SSE-NEXT: pslld $16, %xmm3
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; SSE-NEXT: psrad $16, %xmm3
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; SSE-NEXT: pslld $16, %xmm0
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; SSE-NEXT: psrad $16, %xmm0
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; SSE-NEXT: packssdw %xmm3, %xmm0
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: trunc_mul_v8i32_v8i16_zext_8i8:
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; AVX1: # BB#0:
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; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
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; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
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; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
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; AVX1-NEXT: vpmulld %xmm3, %xmm0, %xmm0
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; AVX1-NEXT: vpmulld %xmm1, %xmm2, %xmm1
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; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: trunc_mul_v8i32_v8i16_zext_8i8:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
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; AVX2-NEXT: vpmulld %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero
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; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
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; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: trunc_mul_v8i32_v8i16_zext_8i8:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
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; AVX512-NEXT: vpmulld %ymm1, %ymm0, %ymm0
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; AVX512-NEXT: vpmovdw %zmm0, %ymm0
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; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
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; AVX512-NEXT: retq
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%1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%2 = zext <8 x i8> %1 to <8 x i32>
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%3 = mul <8 x i32> %2, %a1
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%4 = trunc <8 x i32> %3 to <8 x i16>
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ret <8 x i16> %4
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}
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;
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; mul to constant
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;
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