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X86: avoid vector-scalar shifts if splat amount is directly a vector ADD/SUB/AND op.

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Prefer vector-vector shifts if available (AVX2+).
Improves code generated for rotate and funnel shifts.
Otherwise it would generate a shuffle + slower vector-scalar shift.
This commit is contained in:
Nekotekina 2019-04-21 12:32:17 +03:00
parent 9c0f762155
commit ec657b923d
1 changed files with 10 additions and 0 deletions
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10
lib/Target/X86/X86ISelLowering.cpp
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@ -27131,6 +27131,16 @@ static SDValue LowerScalarVariableShift(SDValue Op, SelectionDAG &DAG,
if (SDValue BaseShAmt = DAG.getSplatValue(Amt)) { if (SDValue BaseShAmt = DAG.getSplatValue(Amt)) {
if (SupportedVectorShiftWithBaseAmnt(VT, Subtarget, Opcode)) { if (SupportedVectorShiftWithBaseAmnt(VT, Subtarget, Opcode)) {
if (SupportedVectorVarShift(VT, Subtarget, Opcode)) {
// Avoid vector-scalar shift in some cases (TODO).
unsigned AmtOp = Amt.getOpcode();
switch (AmtOp) {
case ISD::ADD:
case ISD::SUB:
case ISD::AND:
return SDValue();
}
}
MVT EltVT = VT.getVectorElementType(); MVT EltVT = VT.getVectorElementType();
assert(EltVT.bitsLE(MVT::i64) && "Unexpected element type!"); assert(EltVT.bitsLE(MVT::i64) && "Unexpected element type!");
if (EltVT != MVT::i64 && EltVT.bitsGT(MVT::i32)) if (EltVT != MVT::i64 && EltVT.bitsGT(MVT::i32))