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[RegAlloc] Check that subreg liveness tracking applies to given virtual reg
Subregister liveness applies selectively to register classes with certain properties. Make sure that when it's enabled, it applies to a given virtual register (in virtual register rewriter). llvm-svn: 339784
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@ -525,7 +525,7 @@ void VirtRegRewriter::rewrite() {
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// Preserve semantics of sub-register operands.
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unsigned SubReg = MO.getSubReg();
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if (SubReg != 0) {
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if (NoSubRegLiveness) {
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if (NoSubRegLiveness || !MRI->shouldTrackSubRegLiveness(VirtReg)) {
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// A virtual register kill refers to the whole register, so we may
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// have to add implicit killed operands for the super-register. A
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// partial redef always kills and redefines the super-register.
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22
test/CodeGen/SystemZ/subregliveness-02.ll
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22
test/CodeGen/SystemZ/subregliveness-02.ll
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@ -0,0 +1,22 @@
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; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -systemz-subreg-liveness < %s | FileCheck %s
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; Check for successful compilation.
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; CHECK: meeb %f0, 0(%r1)
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target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
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target triple = "s390x-ibm-linux"
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; Function Attrs: nounwind
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define void @spec_random_load() #0 {
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bb:
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%tmp = sitofp i64 undef to float
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%tmp1 = fmul float %tmp, 0x3E00000000000000
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%tmp2 = fpext float %tmp1 to double
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%tmp3 = fmul double %tmp2, 2.560000e+02
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%tmp4 = fptosi double %tmp3 to i32
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%tmp5 = trunc i32 %tmp4 to i8
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store i8 %tmp5, i8* undef, align 1
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unreachable
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}
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attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="z13" "target-features"="+transactional-execution,+vector" "unsafe-fp-math"="false" "use-soft-float"="false" }
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