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Commit Graph

179 Commits

Author SHA1 Message Date
Evan Cheng
00a5cbf9e7 Mark re-materializable instructions.
llvm-svn: 35230
2007-03-21 00:16:56 +00:00
Chris Lattner
6d7701714e add missing braces
llvm-svn: 34905
2007-03-04 06:13:52 +00:00
Evan Cheng
a6399ed8d6 How the heck did I forget patterns for llvm.x86.sse2.cmp.sd?
llvm-svn: 34434
2007-02-20 00:39:09 +00:00
Evan Cheng
df277336b8 - FCOPYSIGN custom lowering bug. Clear the sign bit of operand 0 first before
or'ing in the sign bit of operand 1.
- Tweaking: rather than left shift the sign bit, fp_extend operand 1 first
  before taking its sign bit if its type is smaller than that of operand 0.

llvm-svn: 32932
2007-01-05 21:37:56 +00:00
Evan Cheng
bcf3d2bd15 With SSE2, expand FCOPYSIGN to a series of SSE bitwise operations.
llvm-svn: 32900
2007-01-05 07:55:56 +00:00
Evan Cheng
4dc2f8e9bb - Rename MOVDSS2DIrr to MOVSS2DIrr for consistency sake.
- Add MOVDI2SSrm and MOVSS2DImr to fold load / store for i32 <-> f32 bit_convert
  patterns.

llvm-svn: 32582
2006-12-14 19:43:11 +00:00
Chris Lattner
6a9de21df5 If we have ScalarSSE, we can select bitconvert into single instructions.
This compiles bitcast.ll:test3/test4 into:

_test3:
        movd %xmm0, %eax
        ret
_test4:
        movd %edi, %xmm0
        ret

llvm-svn: 32230
2006-12-05 18:45:06 +00:00
Evan Cheng
fc1b3d8bc8 Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64.
llvm-svn: 31795
2006-11-16 23:33:25 +00:00
Evan Cheng
ae1f3758bd Don't dag combine floating point select to max and min intrinsics. Those
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.

This fixes PR996.

llvm-svn: 31645
2006-11-10 21:43:37 +00:00
Evan Cheng
7ca1f47a96 Fixed a bug which causes x86 be to incorrectly match
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.

Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>

llvm-svn: 31519
2006-11-07 22:14:24 +00:00
Chris Lattner
7c265ad682 remove dead/redundant vars
llvm-svn: 31435
2006-11-03 23:48:56 +00:00
Evan Cheng
790d5c7697 Fix ldmxcsr JIT encoding.
llvm-svn: 31343
2006-11-01 06:53:52 +00:00
Evan Cheng
090e9abaee Fixed a significant bug where unpcklpd is incorrectly used to extract element 1 from a v2f64 value.
llvm-svn: 31228
2006-10-27 21:08:32 +00:00
Evan Cheng
034305a2e8 X86ISD::PEXTRW 3rd operand type is always target pointer type.
llvm-svn: 31185
2006-10-25 21:35:05 +00:00
Evan Cheng
95140c9c64 ComplexPatterns sse_load_f32 and sse_load_f64 returns in / out chain operands.
llvm-svn: 30892
2006-10-11 21:06:01 +00:00
Evan Cheng
d1a37cb9dc Don't go too crazy with these AddComplexity. Try matching shufps with load
folding first.

llvm-svn: 30848
2006-10-09 21:42:15 +00:00
Evan Cheng
d22f3dd3ed Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
llvm-svn: 30844
2006-10-09 20:57:25 +00:00
Chris Lattner
3cd1d08ac6 completely disable folding of loads into scalar sse instructions and provide
a framework for doing it right.  This fixes
CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll.

Once X86DAGToDAGISel::SelectScalarSSELoad is implemented right, this task
will be done.

llvm-svn: 30817
2006-10-07 21:55:32 +00:00
Chris Lattner
a51aea84b8 convert packed FP add/sub/mul/div to use a multiclass.
llvm-svn: 30815
2006-10-07 21:17:13 +00:00
Chris Lattner
da75127cea one multiclass now defines all 8 variants of binary-scalar-sse-fp operations.
llvm-svn: 30814
2006-10-07 20:55:57 +00:00
Chris Lattner
8ce6993f53 Switch ADD/MUL/DIV/SUB scalarsse fp ops to a multiclass
llvm-svn: 30813
2006-10-07 20:35:44 +00:00
Chris Lattner
ec39f5bcd5 Random acts of shrinkage
llvm-svn: 30812
2006-10-07 19:49:05 +00:00
Chris Lattner
8e3aa16298 Convert pand/por/pxor to use multiclass
llvm-svn: 30811
2006-10-07 19:37:30 +00:00
Chris Lattner
33aecdebfc Convert some more instructions over to use a new multiclass.
Fix a bug where the asmstring for PSUBQrm was wrong.

llvm-svn: 30810
2006-10-07 19:34:33 +00:00
Chris Lattner
260659336a Fix a bug where PADDQrm printed paddd instead of paddq.
llvm-svn: 30809
2006-10-07 19:15:46 +00:00
Chris Lattner
0122bfac98 Add multiclass for SSE2 instructions that correspond to simple binops.
llvm-svn: 30808
2006-10-07 19:14:49 +00:00
Chris Lattner
db12d69657 rename:
PDI_binop_rm -> PDI_binop_rm_int
  PDI_binop_rmi -> PDI_binop_rmi_int

to make it clear that these are for use with intrinsics.

llvm-svn: 30807
2006-10-07 19:02:31 +00:00
Chris Lattner
36709eed45 Convert saturating PADD/PSUB's to use a multiclass
llvm-svn: 30806
2006-10-07 18:48:46 +00:00
Chris Lattner
d5d4378010 Convert PAVG*, PMADDWD, and PMUL* to use multiclasses.
llvm-svn: 30805
2006-10-07 18:39:00 +00:00
Chris Lattner
753ec9950a Fix typo in packsswb instr definition, where the load had the wrong type.
This allows us to use the multiclass for other packs.

llvm-svn: 30804
2006-10-07 18:23:58 +00:00
Chris Lattner
59bf33e5e4 handle pmin/pmax with multiclasses
llvm-svn: 30800
2006-10-07 07:49:33 +00:00
Chris Lattner
2177d324c5 simplify pack and shift intrinsics with multiclasses
llvm-svn: 30797
2006-10-07 07:06:17 +00:00
Chris Lattner
31eb3af1a8 Use a multiclass to simplify 'SSE2 Integer comparison'
llvm-svn: 30796
2006-10-07 06:47:08 +00:00
Chris Lattner
7cde5d8820 move class defns close to uses to make it easier to read
llvm-svn: 30795
2006-10-07 06:33:36 +00:00
Chris Lattner
2842be4e37 simplify horizontal op definitions
llvm-svn: 30794
2006-10-07 06:31:41 +00:00
Chris Lattner
b3b659492b remove more unneeded type info
llvm-svn: 30793
2006-10-07 06:27:03 +00:00
Chris Lattner
8a2d78d3cf remove unneeded definitions and type info
llvm-svn: 30792
2006-10-07 06:19:41 +00:00
Chris Lattner
a75da38d99 remove some unneeded type info
llvm-svn: 30791
2006-10-07 06:17:43 +00:00
Chris Lattner
d704b454b9 simplify patterns by merging in operand info
llvm-svn: 30790
2006-10-07 05:50:25 +00:00
Chris Lattner
bf6419cef6 Factor operands into packed unary classes
llvm-svn: 30789
2006-10-07 05:47:20 +00:00
Chris Lattner
06c9aa41f1 remove dead/duplicate instructions
llvm-svn: 30788
2006-10-07 05:41:52 +00:00
Chris Lattner
72b130720d Pull operand info up into parent class for scalar sse intrinsics.
llvm-svn: 30787
2006-10-07 05:26:13 +00:00
Chris Lattner
cf13d058a3 convert the sole sd unary intrinsic to a multiclass for consistency
llvm-svn: 30786
2006-10-07 05:19:31 +00:00
Chris Lattner
67ea3292d2 pull operand string into the multiclass
llvm-svn: 30785
2006-10-07 05:13:26 +00:00
Chris Lattner
e234302d01 Remove RSQRTSS[rm] RCPSS[rm], which are dead.
Introduce SS_IntUnary, a multiclass to replace SS_Int[rm].

llvm-svn: 30784
2006-10-07 05:09:48 +00:00
Chris Lattner
22137d1891 eliminate redundancy
llvm-svn: 30783
2006-10-07 04:52:09 +00:00
Evan Cheng
79d9bdd28b These don't have immediate operands.
llvm-svn: 30694
2006-10-03 06:55:11 +00:00
Evan Cheng
cfd7b147cf X86ISD::CMP now produces a chain as well as a flag. Make that the chain
operand of a conditional branch to allow load folding into CMP / TEST
instructions.

llvm-svn: 30241
2006-09-11 02:19:56 +00:00
Evan Cheng
8ffe1aa35a JIT encoding bug.
llvm-svn: 30112
2006-09-05 05:59:25 +00:00
Evan Cheng
692215be9c Can't commute shufps. The high / low parts elements come from different vectors.
llvm-svn: 29275
2006-07-25 20:25:40 +00:00