Anton Korobeynikov
83fa257f55
Get rid of duplicate char*/Section* TextSection
...
llvm-svn: 56574
2008-09-24 22:15:21 +00:00
Anton Korobeynikov
c7ac49c632
Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.
...
llvm-svn: 56573
2008-09-24 22:14:23 +00:00
Anton Korobeynikov
9e5d24042c
Drop obsolete hook and change all usage to new interface
...
llvm-svn: 56572
2008-09-24 22:13:07 +00:00
Anton Korobeynikov
ff79214785
Provide direct function to switch to Section
...
llvm-svn: 56571
2008-09-24 22:12:10 +00:00
Owen Anderson
2cfce89777
Fix off-by-one error when updating live intervals.
...
llvm-svn: 56567
2008-09-24 21:30:38 +00:00
Bill Wendling
7c60c6e7bf
Reapplying r56550
...
llvm-svn: 56553
2008-09-24 10:25:02 +00:00
Bill Wendling
236c4d0204
Forgot this part with my last patch. Sorry about the breakage.
...
llvm-svn: 56552
2008-09-24 10:16:24 +00:00
Eric Christopher
8ffa64fdb5
Temporarily revert r56550 until missing commit can be added.
...
llvm-svn: 56551
2008-09-24 08:30:44 +00:00
Bill Wendling
456b33b615
Refactor the constant folding code into it's own function. And call it from both
...
the SelectionDAG and DAGCombiner code. The only functionality change is that now
the DAG combiner is performing the constant folding for these operations instead
of being a no-op.
This is *not* in response to a bug, so there isn't a testcase.
llvm-svn: 56550
2008-09-24 07:11:26 +00:00
Dale Johannesen
bc29bec7f8
Next round of earlyclobber handling. Approach the
...
RA problem by expanding the live interval of an
earlyclobber def back one slot. Remove
overlap-earlyclobber throughout. Remove
earlyclobber bits and their handling from
live internals.
llvm-svn: 56539
2008-09-24 01:07:17 +00:00
Dan Gohman
a7a04d8ae6
Refactor the logic for testing if an instruction is dead into a
...
separate method.
llvm-svn: 56531
2008-09-24 00:27:38 +00:00
Dan Gohman
49becd6c31
Set SetStore to false, to allow this pass to delete
...
dead loads.
llvm-svn: 56529
2008-09-24 00:07:08 +00:00
Dan Gohman
0cf7b31c69
Add a method to MachineInstr for testing whether it makes
...
any volatile memory references.
llvm-svn: 56528
2008-09-24 00:06:15 +00:00
Evan Cheng
f942615847
Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.
...
llvm-svn: 56526
2008-09-24 00:05:32 +00:00
Devang Patel
a3e9bf1bca
s/ParameterAttributes/Attributes/g
...
llvm-svn: 56513
2008-09-23 23:03:40 +00:00
Dan Gohman
583938816c
Now that DeadMachineInstructionElim is basically working
...
correctly, it's not necessary to explicitly remove registers
from their use-def lists.
llvm-svn: 56509
2008-09-23 22:04:18 +00:00
Dan Gohman
01a070f9c7
Arrange for FastISel code to have access to the MachineModuleInfo
...
object. This will be needed to support debug info.
llvm-svn: 56508
2008-09-23 21:53:34 +00:00
Dan Gohman
3242b7c44c
Track local physical register liveness. This is not the most
...
efficient implementation possible, but it's pretty simple and
good enough for the time being.
llvm-svn: 56504
2008-09-23 21:40:44 +00:00
Dan Gohman
52a9adb3fa
Replace the LiveRegs SmallSet with a simple counter that keeps
...
track of the number of live registers, which is all the set was
being used for.
llvm-svn: 56498
2008-09-23 18:50:48 +00:00
Owen Anderson
5405b59bcd
Add initial support for inserting last minute copies.
...
llvm-svn: 56485
2008-09-23 04:37:10 +00:00
Dan Gohman
28970ed355
Fix the alignment of loads from constant pool entries when the
...
load address has an offset from the base of the constant pool
entry.
llvm-svn: 56479
2008-09-22 22:40:08 +00:00
Evan Cheng
0cfe303607
Livestacks really does preserve everything.
...
llvm-svn: 56476
2008-09-22 22:26:15 +00:00
Evan Cheng
1ded8b6ad6
Instead of setPreservesAll, just mark them preseving machine loop info and machine dominators.
...
llvm-svn: 56475
2008-09-22 22:21:38 +00:00
Owen Anderson
67df9bc5b8
Significant improvements to the logic for merging live intervals. This code can't
...
just use LI::MergeValueAsValue, as its behavior in the presence of overlapping ranges
isn't what StrongPHIElimination wants.
llvm-svn: 56472
2008-09-22 21:58:58 +00:00
Dale Johannesen
3722f4c14c
Make log, log2, log10, exp, exp2 use Expand by
...
default.
llvm-svn: 56471
2008-09-22 21:57:32 +00:00
Evan Cheng
3bcf0cdd72
Mark several codegen passes as preserving all analysis.
...
llvm-svn: 56469
2008-09-22 20:58:04 +00:00
Dale Johannesen
375ba5ee63
More refactoring. Yawn.
...
llvm-svn: 56468
2008-09-22 20:51:30 +00:00
Dale Johannesen
a28dd108a4
Refactor FP intrinisic setup. Per review feedback.
...
llvm-svn: 56456
2008-09-22 19:51:58 +00:00
Evan Cheng
638ae1be58
Per review feedback: Only perform
...
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.
llvm-svn: 56452
2008-09-22 18:19:24 +00:00
Oscar Fuentes
0f25988689
Initial support for the CMake build system.
...
llvm-svn: 56419
2008-09-22 01:08:49 +00:00
Bill Wendling
3ee08ff81e
Add helper function to get a 32-bit floating point constant. No functionality change.
...
llvm-svn: 56418
2008-09-22 00:44:35 +00:00
Dan Gohman
98a22f8a8f
Factor out code into HandleVirtRegDef, for consistency with
...
Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check
for register zero, and redundant checks for isPhysicalRegister.
llvm-svn: 56412
2008-09-21 21:11:41 +00:00
Owen Anderson
981113c401
Fetch the starting index of the block when assigning intervals. This gets live-in indices
...
correct in the presence of things like EH labels.
llvm-svn: 56410
2008-09-21 20:43:24 +00:00
Chris Lattner
01cab96cba
don't print GlobalAddressSDNode's with an offset of zero as "foo0".
...
llvm-svn: 56399
2008-09-21 18:38:31 +00:00
Dale Johannesen
4a0054dc9a
Teach coalescer about earlyclobber bits.
...
Check bits for preferred register.
llvm-svn: 56384
2008-09-20 02:03:04 +00:00
Evan Cheng
270178bdda
Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.
...
llvm-svn: 56381
2008-09-20 01:28:05 +00:00
Evan Cheng
23e36297d6
Continue after removing the current MI.
...
llvm-svn: 56372
2008-09-19 22:49:39 +00:00
Dan Gohman
f66b3277d3
Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
...
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.
llvm-svn: 56371
2008-09-19 22:16:54 +00:00
Dale Johannesen
312df3aa6d
Make earlyclobber stuff work when virtual regs
...
have previously been assigned conflicting physreg.
llvm-svn: 56364
2008-09-19 18:52:31 +00:00
Evan Cheng
14493ffe78
Re-materalized definition instructions may be dead. Whack them.
...
llvm-svn: 56352
2008-09-19 17:38:47 +00:00
Dale Johannesen
214ddc92d0
Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis
...
and redo as linked list walk. Logic moved into RA.
Per review feedback.
llvm-svn: 56326
2008-09-19 01:02:35 +00:00
Evan Cheng
bcd694a1b4
Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo.
...
llvm-svn: 56314
2008-09-18 22:38:47 +00:00
Dan Gohman
9dc56fbe40
Don't consider instructions with implicit physical register
...
defs to be necessarily live.
llvm-svn: 56310
2008-09-18 18:22:32 +00:00
Dan Gohman
b7c5b0f44b
Add a new "fast" scheduler. This is currently basically just a
...
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.
This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.
llvm-svn: 56307
2008-09-18 16:26:26 +00:00
Dale Johannesen
99091ed94f
Add a bit to mark operands of asm's that conflict
...
with an earlyclobber operand elsewhere. Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way
that conflicts with an earlyclobber. See also comments.
llvm-svn: 56290
2008-09-17 21:13:11 +00:00
Evan Cheng
d3225118a6
Unallocatable registers do not have live intervals.
...
llvm-svn: 56287
2008-09-17 18:36:25 +00:00
Dan Gohman
4bef47e8c3
Don't worry about clobbering physical register defs that aren't used.
...
llvm-svn: 56281
2008-09-17 15:25:49 +00:00
Dan Gohman
d0c6cb65e8
Add a new MachineInstr-level DCE pass. It is very simple, and is intended to
...
be used with fast-isel.
llvm-svn: 56268
2008-09-17 00:43:24 +00:00
Evan Cheng
6cfbecd1fa
When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes.
...
llvm-svn: 56258
2008-09-16 23:12:11 +00:00
Dan Gohman
9cbb3f591a
Change SelectionDAG::getConstantPool to always set the alignment of the
...
ConstantPoolSDNode, using the target's preferred alignment for the
constant type.
In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.
This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)
Patch by Paul Redmond!
llvm-svn: 56253
2008-09-16 22:05:41 +00:00
Bill Wendling
932818c75a
Reverting r56249. On further investigation, this functionality isn't needed.
...
Apologies for the thrashing.
llvm-svn: 56251
2008-09-16 21:48:12 +00:00
Dan Gohman
6da3227304
Include the alignment value when displaying ConstantPoolSDNodes.
...
llvm-svn: 56250
2008-09-16 21:18:22 +00:00
Bill Wendling
1a240c8033
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
...
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
llvm-svn: 56249
2008-09-16 21:12:30 +00:00
Dan Gohman
f89b35c261
Fix these comments to reflect current reality. Surprisingly,
...
MachineConstantPool::getConstantPoolIndex actually expects
a log2-encoded alignment.
llvm-svn: 56248
2008-09-16 20:45:53 +00:00
Dan Gohman
37457ca74b
Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls
...
are not enabled. Instead just omit the tail call flag when calls are
created.
llvm-svn: 56235
2008-09-16 01:42:28 +00:00
Owen Anderson
553caa6ed4
Live intervals for live-in registers should begin at the beginning of a basic block, not at the first
...
instruction. Also, their valno's should have an unknown def. This has no effect currently, but was
causing issues when StrongPHIElimination was enabled.
llvm-svn: 56231
2008-09-15 22:00:38 +00:00
Dan Gohman
f38d63884f
Re-enable SelectionDAG CSE for calls. It matters in the case of
...
libcalls, as in this testcase on ARM.
llvm-svn: 56226
2008-09-15 19:46:03 +00:00
Evan Cheng
db1693cb14
Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#.
...
llvm-svn: 56199
2008-09-15 06:28:41 +00:00
Dale Johannesen
57fc1bdfdc
adjust last patch per review feedback
...
llvm-svn: 56194
2008-09-14 01:44:36 +00:00
Dan Gohman
fa32c7c6d9
Remove isImm(), isReg(), and friends, in favor of
...
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
llvm-svn: 56189
2008-09-13 17:58:21 +00:00
Dan Gohman
3450a8252f
Define CallSDNode, an SDNode subclass for use with ISD::CALL.
...
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.
And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.
CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.
llvm-svn: 56183
2008-09-13 01:54:27 +00:00
Evan Cheng
07046dae41
On some targets, non-move instructions can become move instructions because of coalescing. e.g.
...
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1 // after coalescing vr0 with vr1
Update the value# of the destination register with the copy instruction if that happens.
llvm-svn: 56165
2008-09-12 18:13:14 +00:00
Dan Gohman
082879cfde
Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and
...
ConstantFP* instead of APInt and APFloat directly.
This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.
It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.
It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.
llvm-svn: 56162
2008-09-12 18:08:03 +00:00
Dale Johannesen
6395da3510
Pass "earlyclobber" bit through to machine
...
representation; coalescer and RA need to know
about it. No functional change.
llvm-svn: 56161
2008-09-12 17:49:03 +00:00
Dan Gohman
89660301e3
Rename ConstantSDNode::getValue to getZExtValue, for consistency
...
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
llvm-svn: 56159
2008-09-12 16:56:44 +00:00
Dale Johannesen
fbc17046ff
The sequence for ppcf128 compares was not IEEE
...
safe in the presence of NaNs.
llvm-svn: 56136
2008-09-12 00:30:56 +00:00
Evan Cheng
5c7e3783ef
Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g.
...
vr1024 = extract_subreg vr1025, 1
...
vr1024 = mov8rr AH
If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH.
llvm-svn: 56118
2008-09-11 20:07:10 +00:00
Evan Cheng
99be914c9a
Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check.
...
llvm-svn: 56112
2008-09-11 18:40:32 +00:00
Evan Cheng
9de997d5de
Fix a 80 column violation.
...
llvm-svn: 56097
2008-09-11 05:58:06 +00:00
Evan Cheng
b879f93ba5
Propagate subreg index when promoting a load to a copy.
...
llvm-svn: 56085
2008-09-11 01:02:12 +00:00
Dan Gohman
ad5824104b
FastISel support for i1 PHI nodes.
...
llvm-svn: 56069
2008-09-10 21:01:31 +00:00
Dan Gohman
5a6134a875
FastISel support for i1 constants.
...
llvm-svn: 56068
2008-09-10 21:01:08 +00:00
Owen Anderson
6bcc01b3eb
Fix a bug in the coalescer where it didn't check if a live interval existed before trying to manipulate it. This
...
was exposed by fast isel's handling of shifts on X86-64. With this, FreeBench/pcompress2 passes on X86-64 in fast isel.
llvm-svn: 56067
2008-09-10 20:41:13 +00:00
Dan Gohman
3ccdde5eef
Add X86FastISel support for static allocas, and refences
...
to static allocas. As part of this change, refactor the
address mode code for laods and stores.
llvm-svn: 56066
2008-09-10 20:11:02 +00:00
Evan Cheng
474ba35954
Fix PR2664 - spiller GetRegForReload wasn't respecting sub-register indices on machine operands.
...
llvm-svn: 56065
2008-09-10 20:08:45 +00:00
Dan Gohman
5211f1f5fc
Add a break statement that I accidentally deleted when
...
I shuffled the fast-isel command-line options around. This fixes
a bunch of fast-isel failures.
llvm-svn: 56057
2008-09-10 15:52:34 +00:00
Bill Wendling
c7c5d73866
Remove unnecessary bit-wise AND from the limited precision work.
...
llvm-svn: 56049
2008-09-10 06:26:10 +00:00
Daniel Dunbar
df44fb835c
Fix 80 col violation.
...
llvm-svn: 56048
2008-09-10 04:16:29 +00:00
Evan Cheng
1ac90281be
Fix typo.
...
llvm-svn: 56037
2008-09-10 00:30:50 +00:00
Bill Wendling
4dc9d148b5
Check that both operands are f32 before attempting to lower.
...
llvm-svn: 56036
2008-09-10 00:24:59 +00:00
Bill Wendling
aa39e64468
Implement "visitPow". This is mainly used to see if we have a pow() call of this
...
form:
powf(10.0f, x);
If this is the case, and also we want limited precision floating-point
calculations, then lower to do the limited-precision stuff.
llvm-svn: 56035
2008-09-10 00:20:20 +00:00
Evan Cheng
150ee094e2
A few more places where FPOW is being ignored.
...
llvm-svn: 56032
2008-09-09 23:35:53 +00:00
Dan Gohman
5b55c46044
Change -fast-isel-no-abort to -fast-isel-abort, which now defaults
...
to being off by default. Also, add assertion checks to check that
the various fast-isel-related command-line options are only used
when -fast-isel itself is enabled.
llvm-svn: 56029
2008-09-09 23:05:00 +00:00
Evan Cheng
ba11945234
Legalizer was missing code that expand fpow to a libcall.
...
llvm-svn: 56028
2008-09-09 23:02:14 +00:00
Bill Wendling
5d6d774240
Adding 6-, 12-, and 18-bit limited-precision floating-point support for exp2
...
function.
llvm-svn: 56025
2008-09-09 22:39:21 +00:00
Dale Johannesen
ba2bbe0c55
Move the uglier parts of deciding not to emit a
...
UsedDirective for some symbols in llvm.used into
Darwin-specific code. I've decided LessPrivateGlobal
is potentially a useful abstraction and left it in
the target-independent area, with improved comment.
llvm-svn: 56024
2008-09-09 22:29:13 +00:00
Bill Wendling
103d08d4ce
Add support for 6-, 12-, and 18-bit limited precision calculations of exp for
...
floating-point numbers.
llvm-svn: 56023
2008-09-09 22:13:54 +00:00
Dan Gohman
2799e1dc63
Add a new option, -fast-isel-verbose, that can be used with
...
-fast-isel-no-abort to get a dump of all unhandled instructions,
without an abort.
llvm-svn: 56021
2008-09-09 22:06:46 +00:00
Evan Cheng
f3a3ee6d01
Clear preference when it no longer makes sense.
...
llvm-svn: 56019
2008-09-09 21:44:23 +00:00
Owen Anderson
0bdc9407ca
Clean this up, based on Evan's suggestions.
...
llvm-svn: 56009
2008-09-09 20:47:17 +00:00
Bill Wendling
929486349f
- Add support for 6-, 12-, and 18-bit limited precision floating-point "log"
...
values.
- Refactored some of the code.
llvm-svn: 56008
2008-09-09 20:39:27 +00:00
Evan Cheng
304fba81c9
Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing.
...
llvm-svn: 56006
2008-09-09 20:22:01 +00:00
Anton Korobeynikov
6ad8b060d0
Make safer variant of alias resolution routine to be default
...
llvm-svn: 56005
2008-09-09 20:05:04 +00:00
Bill Wendling
727b25981a
Add limited precision floating-point conversions of log10 for 6- and 18-bit
...
precisions.
llvm-svn: 56000
2008-09-09 18:42:23 +00:00
Owen Anderson
22debc8bec
Check for type legality before materializing integer constants in fast isel. With this change,
...
all of MultiSource/Applications passes on Darwin/X86 under FastISel.
llvm-svn: 55982
2008-09-09 06:32:02 +00:00
Dan Gohman
4b334f02b1
Remove the code that protected FastISel from aborting in
...
the case of loads, stores, and conditional branches. It can
handle those now, so any that aren't handled should trigger
the abort.
llvm-svn: 55977
2008-09-09 02:40:04 +00:00
Evan Cheng
dc011a1b10
Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand.
...
llvm-svn: 55975
2008-09-09 01:26:59 +00:00
Dale Johannesen
1ed08a58d1
Fix logic for not emitting no-dead-strip for some
...
objects in llvm.used (thanks Anton). Makes visible
the magic 'l' prefix for symbols on Darwin which are
to be passed through the assembler, then removed at
linktime (previously all references to this had been
hidden in the ObjC FE code, oh well).
llvm-svn: 55973
2008-09-09 01:21:22 +00:00
Bill Wendling
701da64da7
Add support for floating-point calculations of log2 with limited precisions of 6
...
and 18.
llvm-svn: 55968
2008-09-09 00:28:24 +00:00
Dale Johannesen
372133f1c8
Don't suppress no-dead-strip for used static functions.
...
llvm-svn: 55962
2008-09-08 21:21:49 +00:00