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Author SHA1 Message Date
Bill Wendling
932818c75a Reverting r56249. On further investigation, this functionality isn't needed. 
Apologies for the thrashing.

llvm-svn: 56251
 2008-09-16 21:48:12 +00:00
Dan Gohman
6da3227304 Include the alignment value when displaying ConstantPoolSDNodes. 
llvm-svn: 56250
 2008-09-16 21:18:22 +00:00
Bill Wendling
1a240c8033 - Change "ExternalSymbolSDNode" to "SymbolSDNode". 
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.

llvm-svn: 56249
 2008-09-16 21:12:30 +00:00
Dan Gohman
f89b35c261 Fix these comments to reflect current reality. Surprisingly, 
MachineConstantPool::getConstantPoolIndex actually expects
a log2-encoded alignment.

llvm-svn: 56248
 2008-09-16 20:45:53 +00:00
Dan Gohman
37457ca74b Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls 
are not enabled. Instead just omit the tail call flag when calls are
created.

llvm-svn: 56235
 2008-09-16 01:42:28 +00:00
Owen Anderson
553caa6ed4 Live intervals for live-in registers should begin at the beginning of a basic block, not at the first 
instruction.  Also, their valno's should have an unknown def.  This has no effect currently, but was
causing issues when StrongPHIElimination was enabled.

llvm-svn: 56231
 2008-09-15 22:00:38 +00:00
Dan Gohman
f38d63884f Re-enable SelectionDAG CSE for calls. It matters in the case of 
libcalls, as in this testcase on ARM.

llvm-svn: 56226
 2008-09-15 19:46:03 +00:00
Evan Cheng
db1693cb14 Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#. 
llvm-svn: 56199
 2008-09-15 06:28:41 +00:00
Dale Johannesen
57fc1bdfdc adjust last patch per review feedback 
llvm-svn: 56194
 2008-09-14 01:44:36 +00:00
Dan Gohman
fa32c7c6d9 Remove isImm(), isReg(), and friends, in favor of 
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189
 2008-09-13 17:58:21 +00:00
Dan Gohman
3450a8252f Define CallSDNode, an SDNode subclass for use with ISD::CALL. 
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.

llvm-svn: 56183
 2008-09-13 01:54:27 +00:00
Evan Cheng
07046dae41 On some targets, non-move instructions can become move instructions because of coalescing. e.g. 
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1   // after coalescing vr0 with vr1

Update the value# of the destination register with the copy instruction if that happens.

llvm-svn: 56165
 2008-09-12 18:13:14 +00:00
Dan Gohman
082879cfde Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and 
ConstantFP* instead of APInt and APFloat directly.

This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.

It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.

It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.

llvm-svn: 56162
 2008-09-12 18:08:03 +00:00
Dale Johannesen
6395da3510 Pass "earlyclobber" bit through to machine 
representation; coalescer and RA need to know
about it.  No functional change.

llvm-svn: 56161
 2008-09-12 17:49:03 +00:00
Dan Gohman
89660301e3 Rename ConstantSDNode::getValue to getZExtValue, for consistency 
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.

llvm-svn: 56159
 2008-09-12 16:56:44 +00:00
Dale Johannesen
fbc17046ff The sequence for ppcf128 compares was not IEEE 
safe in the presence of NaNs.

llvm-svn: 56136
 2008-09-12 00:30:56 +00:00
Evan Cheng
5c7e3783ef Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g. 
vr1024 = extract_subreg vr1025, 1
...
vr1024 = mov8rr AH
If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH.

llvm-svn: 56118
 2008-09-11 20:07:10 +00:00
Evan Cheng
99be914c9a Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check. 
llvm-svn: 56112
 2008-09-11 18:40:32 +00:00
Evan Cheng
9de997d5de Fix a 80 column violation. 
llvm-svn: 56097
 2008-09-11 05:58:06 +00:00
Evan Cheng
b879f93ba5 Propagate subreg index when promoting a load to a copy. 
llvm-svn: 56085
 2008-09-11 01:02:12 +00:00
Dan Gohman
ad5824104b FastISel support for i1 PHI nodes. 
llvm-svn: 56069
 2008-09-10 21:01:31 +00:00
Dan Gohman
5a6134a875 FastISel support for i1 constants. 
llvm-svn: 56068
 2008-09-10 21:01:08 +00:00
Owen Anderson
6bcc01b3eb Fix a bug in the coalescer where it didn't check if a live interval existed before trying to manipulate it. This 
was exposed by fast isel's handling of shifts on X86-64.  With this, FreeBench/pcompress2 passes on X86-64 in fast isel.

llvm-svn: 56067
 2008-09-10 20:41:13 +00:00
Dan Gohman
3ccdde5eef Add X86FastISel support for static allocas, and refences 
to static allocas. As part of this change, refactor the
address mode code for laods and stores.

llvm-svn: 56066
 2008-09-10 20:11:02 +00:00
Evan Cheng
474ba35954 Fix PR2664 - spiller GetRegForReload wasn't respecting sub-register indices on machine operands. 
llvm-svn: 56065
 2008-09-10 20:08:45 +00:00
Dan Gohman
5211f1f5fc Add a break statement that I accidentally deleted when 
I shuffled the fast-isel command-line options around. This fixes
a bunch of fast-isel failures.

llvm-svn: 56057
 2008-09-10 15:52:34 +00:00
Bill Wendling
c7c5d73866 Remove unnecessary bit-wise AND from the limited precision work. 
llvm-svn: 56049
 2008-09-10 06:26:10 +00:00
Daniel Dunbar
df44fb835c Fix 80 col violation. 
llvm-svn: 56048
 2008-09-10 04:16:29 +00:00
Evan Cheng
1ac90281be Fix typo. 
llvm-svn: 56037
 2008-09-10 00:30:50 +00:00
Bill Wendling
4dc9d148b5 Check that both operands are f32 before attempting to lower. 
llvm-svn: 56036
 2008-09-10 00:24:59 +00:00
Bill Wendling
aa39e64468 Implement "visitPow". This is mainly used to see if we have a pow() call of this 
form:

          powf(10.0f, x);

If this is the case, and also we want limited precision floating-point
calculations, then lower to do the limited-precision stuff.

llvm-svn: 56035
 2008-09-10 00:20:20 +00:00
Evan Cheng
150ee094e2 A few more places where FPOW is being ignored. 
llvm-svn: 56032
 2008-09-09 23:35:53 +00:00
Dan Gohman
5b55c46044 Change -fast-isel-no-abort to -fast-isel-abort, which now defaults 
to being off by default. Also, add assertion checks to check that
the various fast-isel-related command-line options are only used
when -fast-isel itself is enabled.

llvm-svn: 56029
 2008-09-09 23:05:00 +00:00
Evan Cheng
ba11945234 Legalizer was missing code that expand fpow to a libcall. 
llvm-svn: 56028
 2008-09-09 23:02:14 +00:00
Bill Wendling
5d6d774240 Adding 6-, 12-, and 18-bit limited-precision floating-point support for exp2 
function.

llvm-svn: 56025
 2008-09-09 22:39:21 +00:00
Dale Johannesen
ba2bbe0c55 Move the uglier parts of deciding not to emit a 
UsedDirective for some symbols in llvm.used into
Darwin-specific code.  I've decided LessPrivateGlobal
is potentially a useful abstraction and left it in
the target-independent area, with improved comment.

llvm-svn: 56024
 2008-09-09 22:29:13 +00:00
Bill Wendling
103d08d4ce Add support for 6-, 12-, and 18-bit limited precision calculations of exp for 
floating-point numbers.

llvm-svn: 56023
 2008-09-09 22:13:54 +00:00
Dan Gohman
2799e1dc63 Add a new option, -fast-isel-verbose, that can be used with 
-fast-isel-no-abort to get a dump of all unhandled instructions,
without an abort.

llvm-svn: 56021
 2008-09-09 22:06:46 +00:00
Evan Cheng
f3a3ee6d01 Clear preference when it no longer makes sense. 
llvm-svn: 56019
 2008-09-09 21:44:23 +00:00
Owen Anderson
0bdc9407ca Clean this up, based on Evan's suggestions. 
llvm-svn: 56009
 2008-09-09 20:47:17 +00:00
Bill Wendling
929486349f - Add support for 6-, 12-, and 18-bit limited precision floating-point "log" 
values.
- Refactored some of the code.

llvm-svn: 56008
 2008-09-09 20:39:27 +00:00
Evan Cheng
304fba81c9 Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing. 
llvm-svn: 56006
 2008-09-09 20:22:01 +00:00
Anton Korobeynikov
6ad8b060d0 Make safer variant of alias resolution routine to be default 
llvm-svn: 56005
 2008-09-09 20:05:04 +00:00
Bill Wendling
727b25981a Add limited precision floating-point conversions of log10 for 6- and 18-bit 
precisions.

llvm-svn: 56000
 2008-09-09 18:42:23 +00:00
Owen Anderson
22debc8bec Check for type legality before materializing integer constants in fast isel. With this change, 
all of MultiSource/Applications passes on Darwin/X86 under FastISel.

llvm-svn: 55982
 2008-09-09 06:32:02 +00:00
Dan Gohman
4b334f02b1 Remove the code that protected FastISel from aborting in 
the case of loads, stores, and conditional branches. It can
handle those now, so any that aren't handled should trigger
the abort.

llvm-svn: 55977
 2008-09-09 02:40:04 +00:00
Evan Cheng
dc011a1b10 Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand. 
llvm-svn: 55975
 2008-09-09 01:26:59 +00:00
Dale Johannesen
1ed08a58d1 Fix logic for not emitting no-dead-strip for some 
objects in llvm.used (thanks Anton).  Makes visible
the magic 'l' prefix for symbols on Darwin which are
to be passed through the assembler, then removed at
linktime (previously all references to this had been
hidden in the ObjC FE code, oh well).

llvm-svn: 55973
 2008-09-09 01:21:22 +00:00
Bill Wendling
701da64da7 Add support for floating-point calculations of log2 with limited precisions of 6 
and 18.

llvm-svn: 55968
 2008-09-09 00:28:24 +00:00
Dale Johannesen
372133f1c8 Don't suppress no-dead-strip for used static functions. 
llvm-svn: 55962
 2008-09-08 21:21:49 +00:00
Anton Korobeynikov
d82cd01929 Reapply 55904: Unbreak and fix indentation 
llvm-svn: 55958
 2008-09-08 21:13:56 +00:00
Dan Gohman
121cc3c111 Fix a few I's that were meant to be renamed to BI's. 
llvm-svn: 55942
 2008-09-08 20:37:59 +00:00
Dale Johannesen
78617b727e Redo the 3 existing low-precision expansions to 
use float constants.  An oversight by the numerics
people who supplied this.

llvm-svn: 55930
 2008-09-08 18:00:26 +00:00
Bill Wendling
4cc4caab72 Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8

llvm-svn: 55928
 2008-09-08 17:59:12 +00:00
Dan Gohman
c9fdcfb189 In visitUREM, arrange for the temporary UDIV node to be 
revisited, consistent with the code in visitSREM.

llvm-svn: 55923
 2008-09-08 16:59:01 +00:00
Daniel Dunbar
ddd9b2aeb0 Add VISIBILITY_HIDDEN on SDISelAsmOperandInfo 
llvm-svn: 55922
 2008-09-08 16:56:08 +00:00
Dan Gohman
f2a912c2a7 Add AsmPrinter support for i128 and larger static initializer data. 
llvm-svn: 55919
 2008-09-08 16:40:13 +00:00
Dan Gohman
afe7e3f3b1 Fix the string for ISD::UDIVREM. 
llvm-svn: 55917
 2008-09-08 16:30:29 +00:00
Evan Cheng
432600a47a Avoid redefinition and nnbreak windows build. 
llvm-svn: 55911
 2008-09-08 16:01:27 +00:00
Anton Korobeynikov
5ea45bb9eb Unbreak and fix indentation 
llvm-svn: 55904
 2008-09-08 14:23:34 +00:00
Evan Cheng
8cb490d2f3 Add fast isel physical register definition support. 
llvm-svn: 55892
 2008-09-08 08:38:20 +00:00
Bill Wendling
2239de4290 Revert my previous change -- the subtraction of two constants was a no-op 
before. This is taken care of in the selection DAG pass. In my opinion, this
should be in one place or the other. I.e., it should probably be removed from
the DAG combiner (along with the other arithmetic transformations on constants
that are essentially no-ops).

llvm-svn: 55889
 2008-09-08 01:56:32 +00:00
Bill Wendling
91e9abe370 Convert 
// fold (sub c1, c2) -> c1-c2

from a no-op into an actual transformation.

llvm-svn: 55886
 2008-09-07 11:34:47 +00:00
Evan Cheng
396c744dfa Indentation. 
llvm-svn: 55880
 2008-09-07 09:04:52 +00:00
Evan Cheng
285350703c - Doh. Pass vector by value is bad. 
- Add a AnalyzeCallResult specialized for calls which produce a single value. This is used by fastisel.

llvm-svn: 55879
 2008-09-07 09:02:18 +00:00
Dale Johannesen
3be45974bb Next limited float precision expansion (log2 12 bits) 
llvm-svn: 55866
 2008-09-05 23:49:37 +00:00
Owen Anderson
453bcfcf8d Revert r55859. This is breaking the build in the abscence of its companion commit. 
llvm-svn: 55865
 2008-09-05 23:36:01 +00:00
Dan Gohman
85d35b92df Move the code that inserts copies for function livein registers 
out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This
allows it to be run exactly once per function, even if multiple
SelectionDAG iterations happen in the entry block, as may happen
with FastISel.

llvm-svn: 55863
 2008-09-05 22:59:21 +00:00
Dale Johannesen
6b48790d88 Add the next limited-precision expansion. 
llvm-svn: 55856
 2008-09-05 21:27:19 +00:00
Dan Gohman
b22e9b050f FastISel support for AND and OR with type i1. 
llvm-svn: 55846
 2008-09-05 18:44:22 +00:00
Dale Johannesen
116163ab21 Add hooks for other intrinsics to get low-precision expansions. 
llvm-svn: 55845
 2008-09-05 18:38:42 +00:00
Dan Gohman
525caf83e5 FastISel support for ConstantExprs. 
llvm-svn: 55843
 2008-09-05 18:18:20 +00:00
Dan Gohman
13d7484b4a Revert r55817. It broke PIC. FastISel will need to find a different 
approach here.

llvm-svn: 55842
 2008-09-05 18:13:01 +00:00
Evan Cheng
339a06f29e Add a variant of AnalyzeCallOperands that can be used by fast isel. 
llvm-svn: 55838
 2008-09-05 16:59:26 +00:00
Duncan Sands
566e0f1053 "Fix" PR2762. The testcase now crashes codegen 
elsewhere due to a missing pattern for
v2f64 = sint_to_fp v2i32.  That is PR2687.

llvm-svn: 55828
 2008-09-05 08:13:35 +00:00
Dan Gohman
a3987ed4e2 Fix a search+replace-o. 
llvm-svn: 55824
 2008-09-05 01:58:21 +00:00
Dale Johannesen
ce63ed5b47 Add -flimit-float-precision to enable some faster, 
but less accurate (non-IEEE) code sequences for
certain math library functions.  Add the first of
several such expansions.  Don't worry, if you don't
turn it on it won't affect you.

llvm-svn: 55823
 2008-09-05 01:48:15 +00:00
Dan Gohman
e64326ff34 FastISel support for unreachable. 
llvm-svn: 55818
 2008-09-05 01:08:41 +00:00
Dan Gohman
fcd2cbd985 In FastISel mode, the scheduler may be invoked multiple times 
in the same block. Fix the entry-block handling to only run at
at the beginning of the entry block, and not any other times.

llvm-svn: 55817
 2008-09-05 01:07:48 +00:00
Owen Anderson
6d5b72d45a Add initial support for selecting constant materializations that require constant 
pool loads on X86 in fast isel.  This isn't actually used yet.

llvm-svn: 55814
 2008-09-05 00:06:23 +00:00
Dan Gohman
1ffb4ad3a8 Add an include of SmallSet.h. 
llvm-svn: 55793
 2008-09-04 20:49:27 +00:00
Dan Gohman
e1f9be27bc Tidy up several unbeseeming casts from pointer to intptr_t. 
llvm-svn: 55779
 2008-09-04 17:05:41 +00:00
Dan Gohman
7ee14837e6 Clean up uses of TargetLowering::getTargetMachine. 
llvm-svn: 55769
 2008-09-04 15:39:15 +00:00
Evan Cheng
dcce925eb1 Fix an overly strict assertion. Source register of a copy may not be killed, it may be killed by an implicit super-register use. 
llvm-svn: 55762
 2008-09-04 05:43:55 +00:00
Dale Johannesen
9e4d101fab Add intrinsics for log, log2, log10, exp, exp2. 
No functional change (and no FE change to generate them).

llvm-svn: 55753
 2008-09-04 00:47:13 +00:00
Dan Gohman
18f659d804 Do trivial local CSE for constants and other non-Instruction values 
in FastISel.

llvm-svn: 55748
 2008-09-03 23:32:19 +00:00
Dan Gohman
f86538dd3c Put RegsForValue in the llvm namespace to avoid warnings about 
classes in the llvm namespace having members with types from
anonymous namespaces.

llvm-svn: 55747
 2008-09-03 23:18:39 +00:00
Dan Gohman
18cc2a26df Create HandlePHINodesInSuccessorBlocksFast, a version of 
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.

llvm-svn: 55746
 2008-09-03 23:12:08 +00:00
Dale Johannesen
ca782fcba1 Do not emit a UsedDirective for things in the llvm.used 
list that have internal linkage; the linker doesn't need
or want this.  (These objects must still be preserved
at compile time, so just removing them from the llvm.used
list doesn't work.)  Should affect only Darwin.

llvm-svn: 55722
 2008-09-03 20:34:58 +00:00
Owen Anderson
d08396955c Oops, I accidentally broke the fallback case with my last commit. 
llvm-svn: 55704
 2008-09-03 17:51:57 +00:00
Owen Anderson
906c590bb8 Fix an issue where we were reusing materializations of constants in blocks not dominated by the materialization. This is 
the simple fix, materializing the constant before every use.  It might be better to either track domination of uses or
to materialize all constants and the beginning of the function and let remat sort when to do materialization at uses.

llvm-svn: 55703
 2008-09-03 17:37:03 +00:00
Dan Gohman
3ee4edfe9c Split the SelectionDAG-building code, including the FunctionLoweringInfo 
and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put
it in a separate file, SelectionDAGBuild.cpp.

llvm-svn: 55701
 2008-09-03 16:12:24 +00:00
Dan Gohman
c58897359b Separate MachineInstr-emitting routines from actual scheduling 
routines and move them into a separate file, ScheduleDAGEmit.cpp.

llvm-svn: 55699
 2008-09-03 16:01:59 +00:00
Dan Gohman
ec225915fa Fix addRegisterDead and addRegisterKilled to be more thorough 
when searching for redundant subregister dead/kill bits.

Previously it was common to see instructions marked like this:
  "RET %EAX<imp-use,kill>, %AX<imp-use,kill>"

With this change, addRegisterKilled continues scanning after
finding the %EAX operand, so it proceeds to discover the
redundant %AX kill and eliminates it, producing this:
  "RET %EAX<imp-use,kill>"

This currently has no effect on the generated code.

llvm-svn: 55698
 2008-09-03 15:56:16 +00:00
Evan Cheng
f993be4cc8 If TargetSelectInstruction returns true, move to next instruction. 
llvm-svn: 55692
 2008-09-03 06:43:41 +00:00
Evan Cheng
5e0e6dfc7f 80 col violations. 
llvm-svn: 55668
 2008-09-02 21:59:13 +00:00
Dan Gohman
9969b223c7 Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks, 
even in FastISel mode in the case where FastISel successfully 
selects all the instructions. 

llvm-svn: 55641
 2008-09-02 20:17:56 +00:00
Gabor Greif
632fa3a318 Provide two overloads of AnalyzeNewNode. 
The first can update the SDNode in an SDValue
while the second is called with SDNode* and
returns a possibly updated SDNode*.

This patch has no intended functional impact,
but helps eliminating ugly temporary SDValues.

llvm-svn: 55608
 2008-09-01 15:10:19 +00:00
Duncan Sands
efc82024e0 Even though no caller actually uses the new value 
(what matters is that it is added to the worklist),
it seems more logical to return it.

llvm-svn: 55606
 2008-09-01 13:11:13 +00:00
Bill Wendling
4a9ded80e2 Cosmetic changes to Machine LICM. No functionality change. 
llvm-svn: 55578
 2008-08-31 02:30:23 +00:00
Bill Wendling
3f918b3603 Another situation where ROTR is cheaper than ROTL. 
llvm-svn: 55577
 2008-08-31 01:13:31 +00:00
Bill Wendling
ef64d4333e For this pattern, ROTR is the cheaper option. 
llvm-svn: 55576
 2008-08-31 01:04:56 +00:00
Bill Wendling
08690f06b2 - Fix comment so that it describes how the code really works: 
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
   //   (rotl x, y)
   // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
   //   (rotr x, (sub 32, y))

Example: (x == 0xDEADBEEF and y == 4)

    (x << 4) | (x >> 28)
 => 0xEADBEEF0 | 0x0000000D
 => 0xEADBEEFD

    (rotl x, 4)
 => 0xEADBEEFD

    (rotr x, 28)
 => 0xEADBEEFD

- Fix comment and code for second version. It wasn't using the rot* propertly.

   // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> 
   //   (rotr x, y)
   // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
   //   (rotl x, (sub 32, y))

    (x << 28) | (x >> 4)
 => 0xD0000000 | 0x0DEADBEE
 => 0xDDEADBEE

    (rotl x, 4)
 => 0xEADBEEFD

    (rotr x, 28)
 => (0xEADBEEFD)

llvm-svn: 55575
 2008-08-31 00:37:27 +00:00
Gabor Greif
fa6e220233 typo 
llvm-svn: 55574
 2008-08-30 22:16:05 +00:00
Gabor Greif
2aef1d5e4c fix some 80-col violations 
llvm-svn: 55571
 2008-08-30 19:29:20 +00:00
Evan Cheng
b40b710766 Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction. 
llvm-svn: 55564
 2008-08-30 09:09:33 +00:00
Evan Cheng
4cfcf9ca51 Fold isRematerializable checks into isSafeToReMat. 
llvm-svn: 55563
 2008-08-30 09:07:18 +00:00
Evan Cheng
4bc8c9652e Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case). 
llvm-svn: 55558
 2008-08-30 02:03:58 +00:00
Owen Anderson
6c8f04643e Fix an issue where a use might be selected before a def, and then we didn't respect the pre-chosen vreg 
assignment when selecting the def.  This is the naive solution to the problem: insert a copy to the pre-chosen
vreg.  Other solutions might be preferable, such as:
  1) Passing the dest reg into FastEmit_.  However, this would require the higher level code to know about reg classes, which they don't currently.
  2) Selecting blocks in reverse postorder.  This has some compile time cost for computing the order, and we'd need to measure its impact.

llvm-svn: 55555
 2008-08-30 00:38:46 +00:00
Evan Cheng
9ee227f1df Fix 80 col. violations. 
llvm-svn: 55551
 2008-08-29 23:20:46 +00:00
Evan Cheng
2a3e05b519 Back out 55498. It broken Apple style bootstrapping. 
llvm-svn: 55549
 2008-08-29 22:21:44 +00:00
Dan Gohman
c7b8401b77 Add a target callback for FastISel. 
llvm-svn: 55512
 2008-08-28 23:21:34 +00:00
Gabor Greif
86c795a8ca erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics 
llvm-svn: 55504
 2008-08-28 21:40:38 +00:00
Dan Gohman
481731693d Implement null and undef values for FastISel. 
llvm-svn: 55500
 2008-08-28 21:19:07 +00:00
Dan Gohman
35a69c106a Optimize DAGCombiner's worklist processing. Previously it started 
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.

This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.

llvm-svn: 55498
 2008-08-28 21:01:56 +00:00
Dan Gohman
9a6f5b0bdd Move CaseBlock, JumpTable, and BitTestBlock to be members of 
SelectionDAGLowering instead of being in an anonymous namespace.
This fixes warnings about SelectionDAGLowering having fields
using anonymous namespaces.

llvm-svn: 55497
 2008-08-28 20:38:18 +00:00
Dan Gohman
f8e43fa400 Fix a FastISel bug where the instructions from lowering the arguments 
were being emitted after the first instructions of the entry block.

llvm-svn: 55496
 2008-08-28 20:28:56 +00:00
Rafael Espindola
31c516aabe Reduce the size of the Parts vector. 
llvm-svn: 55483
 2008-08-28 18:29:58 +00:00
Owen Anderson
675ace60a1 Hook up support for fast-isel of trunc instructions, using the newly working support for EXTRACT_SUBREG. 
llvm-svn: 55482
 2008-08-28 18:26:01 +00:00
Owen Anderson
8c991b6f8a FastEmitInst_extractsubreg doesn't need to be passed the register class. It can get it from MachineRegisterInfo instead. 
llvm-svn: 55476
 2008-08-28 17:47:37 +00:00
Dan Gohman
8f4d612996 Revert r55467; it causes regressions in UnitTests/Vector/divides, 
Benchmarks/sim/sim, and others on x86-64.

llvm-svn: 55475
 2008-08-28 17:22:54 +00:00
Rafael Espindola
17b967216a Correctly resize the Parts array. 
llvm-svn: 55471
 2008-08-28 14:24:45 +00:00
Evan Cheng
28b0b18082 If a copy isn't coalesced, but its src is defined by trivial computation. Re-materialize the src to replace the copy. 
llvm-svn: 55467
 2008-08-28 07:53:51 +00:00
Dale Johannesen
490c016734 Split the ATOMIC NodeType's to include the size, e.g. 
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.

This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad.  This is the alternative.

llvm-svn: 55457
 2008-08-28 02:44:49 +00:00
Dan Gohman
3a89011a01 Reorganize the lifetimes of the major objects SelectionDAGISel 
works with.

SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering
objects now get created once per SelectionDAGISel instance, and
can be reused across blocks and across functions. Previously,
they were created and destroyed each time they were needed.

This reorganization simplifies the handling of PHI nodes, and
also SwitchCases, JumpTables, and BitTestBlocks. This
simplification has the side effect of fixing a bug in FastISel
where successor PHI nodes weren't being updated correctly.

This is also a step towards making the transition from FastISel
into and out of SelectionDAG faster, and also making
plain SelectionDAG faster on code with lots of little blocks.

llvm-svn: 55450
 2008-08-27 23:52:12 +00:00
Owen Anderson
bb32ae5803 Add a helper method that will be used to support EXTRACT_SUBREG for selecting trunc's in fast-isel. 
llvm-svn: 55439
 2008-08-27 22:30:02 +00:00
Evan Cheng
cf2cb4da82 Move the check whether it's worth remating to caller. 
llvm-svn: 55434
 2008-08-27 20:58:54 +00:00
Dan Gohman
9e928e0b1f Fix FastISel's bitcast code for the case where getRegForValue fails. 
llvm-svn: 55431
 2008-08-27 20:41:38 +00:00
Evan Cheng
dc202f4bba Refactor isSafeToReMat out of 2addr pass. 
llvm-svn: 55430
 2008-08-27 20:33:50 +00:00
Owen Anderson
0b1a8af290 Use TargetLowering to get the types in fast isel, which handles pointer types correctly for our purposes. 
llvm-svn: 55428
 2008-08-27 18:58:30 +00:00
Dan Gohman
b76e1ca974 Don't check TLI.getOperationAction. The FastISel way is to 
just try to do the action and let the tablegen-generated code
determine if there is target-support for an operation.

llvm-svn: 55427
 2008-08-27 18:15:05 +00:00
Dan Gohman
d5e34d9dce Add a new FastISel method, getRegForValue, which takes care of 
the details of materializing constants and other values into
registers, and make use of it in several places.

llvm-svn: 55426
 2008-08-27 18:10:19 +00:00
Dan Gohman
6174651396 Add a comment about the current floating-point constant code in FastISel. 
llvm-svn: 55425
 2008-08-27 18:01:42 +00:00
Dan Gohman
d9e0302919 Optimize ScheduleDAGRRList's topological sort to use one pass instead 
of two, and to not need a scratch std::vector. Also, compute the ordering
immediately in the result array, instead of in another scratch std::vector
that is copied to the result array.

llvm-svn: 55421
 2008-08-27 16:29:48 +00:00
Dan Gohman
db4286e6f7 Optimize ScheduleDAG's ComputeDepths and ComputeHeights to not need 
a scratch std::vector.

llvm-svn: 55420
 2008-08-27 16:27:25 +00:00
Dan Gohman
5189ab26fb Remove the std::ostream form of PseudoSourceValue's print, 
which isn't needed anymore.

llvm-svn: 55419
 2008-08-27 16:19:44 +00:00
Dan Gohman
5e5f1c9e8f Basic FastISel support for floating-point constants. 
llvm-svn: 55401
 2008-08-27 01:09:54 +00:00
Owen Anderson
a0b7e0ab93 Fix handling of inttoptr and ptrtoint when unhandled operands are present. 
llvm-svn: 55400
 2008-08-27 00:35:37 +00:00
Owen Anderson
c5d2fe6354 Add support for fast isel of inttoptr and ptrtoint in the cases where truncation is not needed. 
llvm-svn: 55399
 2008-08-27 00:31:01 +00:00
Owen Anderson
a8911f33f8 Factor out a large amoutn of the cast handling code in fast isel into helper methods. 
This simultaneously makes the code simpler and adds support for sext as well.

llvm-svn: 55398
 2008-08-26 23:46:32 +00:00
Owen Anderson
0cee245fdc Add support for fast isel of zext. 
llvm-svn: 55396
 2008-08-26 23:14:49 +00:00
Gabor Greif
4b86114f92 disallow direct access to SDValue::ResNo, provide a getter instead 
llvm-svn: 55394
 2008-08-26 22:36:50 +00:00
Owen Anderson
d33f25d615 Add support for fptosi of constants in fast isel. 
llvm-svn: 55393
 2008-08-26 22:34:28 +00:00
Dan Gohman
3e50c6348a Optimize SelectionDAG's topological sort to use one pass instead 
of two, and to not need a scratch std::vector. Also, use the
SelectionDAG's topological sort in LegalizeDAG instead of having
a separate implementation.

llvm-svn: 55389
 2008-08-26 21:42:18 +00:00
Dan Gohman
57b5f9b931 Refactor the bitcast code into its own function. 
llvm-svn: 55387
 2008-08-26 21:28:54 +00:00
Dan Gohman
58882d14c4 Make FastISel use the correct argument type when casting GEP indices. 
llvm-svn: 55384
 2008-08-26 20:57:08 +00:00
Dan Gohman
722e912650 Don't select binary instructions with illegal types. 
llvm-svn: 55383
 2008-08-26 20:52:40 +00:00
Owen Anderson
b15e88b671 Add support for fast isel of sitofp, and remove some unnecessary and imprecise legality checks. 
llvm-svn: 55381
 2008-08-26 20:37:00 +00:00
Owen Anderson
821ddf6726 Use a combination of copyRegToReg and ISD::BIT_CONVERT when doing fast isel of bitcasts, 
allowing it to support the full range of conversions people might ask for in a correct manner.

llvm-svn: 55378
 2008-08-26 18:51:24 +00:00
Owen Anderson
5fef19facf Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested 
was inserted or not.  This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.

llvm-svn: 55375
 2008-08-26 18:03:31 +00:00