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Commit Graph

107899 Commits

Author SHA1 Message Date
Evgeniy Stepanov
6602036ef9 Add CMake check for libatomic.
llvm-svn: 217666
2014-09-12 11:08:59 +00:00
Benjamin Kramer
ad466ef0b8 Fix an ODR violation consisting of two 'struct Query' in the global namespace.
Put them in their own anonymous namespaces. Found by GCC's new -Wodr (PR20915).

llvm-svn: 217662
2014-09-12 08:56:53 +00:00
Joerg Sonnenberger
2789757d73 Add Tom Stellard's role as 3.5 release manager.
llvm-svn: 217659
2014-09-12 08:07:31 +00:00
Justin Bogner
50f453be5f llvm-cov: Move FunctionCoverageMapping into CoverageMapping.h (NFC)
llvm-svn: 217657
2014-09-12 06:52:44 +00:00
Craig Topper
a3f3248d92 Remove a temporary variable and just construct a unique_ptr directly using make_unique.
llvm-svn: 217655
2014-09-12 05:17:20 +00:00
David Majnemer
71a0c0a959 Object: Small cleanup in COFFObjectFile::getSymbol
NFC.

llvm-svn: 217648
2014-09-11 23:42:10 +00:00
Justin Bogner
d27a521c07 Revert "llvm-cov: Remove an overly system specific test"
This fixes a call to sys::fs::equivalent that should've been to
CodeCoverageTool::equivalentFiles, which lets us restore the test of
r217476 that was removed in r217478.

This reverts r217478, but the test works this time.

llvm-svn: 217646
2014-09-11 23:20:48 +00:00
Lang Hames
2c31a6645d [MCJIT] Improve the "stub not found" diagnostic in RuntimeDyldChecker.
A "stub found found" diagnostic is emitted when RuntimeDyldChecker's stub lookup
logic fails to find the requested stub. The obvious reason for the failure is
that no such stub has been created, but it can also fail for internal symbols if
the symbol offset is not computed correctly (E.g. due to a mangled relocation
addend). This patch adds a comment about the latter case so that it's not
overlooked.

Inspired by confusion experienced during test case construction for r217635.

llvm-svn: 217643
2014-09-11 23:09:22 +00:00
Rui Ueyama
d4017b0682 [Support][Endian] Overload += and -=
This patch is to overload operator+= and operator-= for
{u}{little}{big}{16,32,64}_t.

llvm-svn: 217637
2014-09-11 22:55:25 +00:00
Matt Arsenault
0d246062cd R600/SI: Fix off by 1 error in used register count
The register numbers start at 0, so if only 1 register
was used, this was reported as 0.

llvm-svn: 217636
2014-09-11 22:51:37 +00:00
Lang Hames
5eb80e92d1 [MCJIT] Make sure we test ARM BR24 relocations with both internal and external
symbols.

Previously we have only been testing these relocations with external symbols.

<rdar://problem/18308413>

llvm-svn: 217635
2014-09-11 22:43:36 +00:00
Rui Ueyama
3a28731f9f Support: Use llvm::COFF::BigObjMagic
Use llvm::COFF::BigObjMagic insetad of the string literal.
Also checks the version number.

llvm-svn: 217633
2014-09-11 22:34:32 +00:00
Rui Ueyama
19cceece7b Support: Delete {aligned_,}{u,}{little,big}8_t
The byte has no endianness, so these types don't make sense.
uint8_t should be used instead.

llvm-svn: 217631
2014-09-11 21:46:33 +00:00
Juergen Ributzka
b772cdd01b [C API] Make the 'lower switch' pass available via the C API.
llvm-svn: 217630
2014-09-11 21:32:32 +00:00
Quentin Colombet
74d3a27ed8 [CodeGenPrepare] Teach the addressing mode matcher how to promote zext.
I.e., teach it about 'sext (zext a to ty) to ty2' => zext a to ty2.

llvm-svn: 217629
2014-09-11 21:22:14 +00:00
David Blaikie
e260499363 Remove the unused string section symbol parameter from DwarfFile::emitStrings
And since it /looked/ like the DwarfStrSectionSym was unused, I tried
removing it - but then it turned out that DwarfStringPool was
reconstructing the same label (and expecting it to have already been
emitted) and uses that.

So I kept it around, but wanted to pass it in to users - since it seemed
a bit silly for DwarfStringPool to have it passed in and returned but
itself have no use for it. The only two users don't handle strings in
both .dwo and .o files so they only ever need the one symbol - no need
to keep it (and have an unused symbol) in the DwarfStringPool used for
fission/.dwo.

Refactor a bunch of accelerator table usage to remove duplication so I
didn't have to touch 4-5 callers.

llvm-svn: 217628
2014-09-11 21:12:48 +00:00
Rui Ueyama
b2048c498d Support: improve identify_magic to recognize COFF bigobj
identify_magic recognized a COFF bigobj as an import library file.
This patch fixes that.

llvm-svn: 217627
2014-09-11 21:09:57 +00:00
Rafael Espindola
832c8a58f2 Misc cleanups to the FileSytem api.
The main difference is the removal of

std::error_code exists(const Twine &path, bool &result);

It was an horribly redundant interface since a file not existing is also a valid
error_code. Now we have an access function that returns just an error_code. This
is the only function that has to be implemented for Unix and Windows. The
functions can_write, exists and can_execute an now just wrappers.

One still has to be very careful using these function to avoid introducing
race conditions (Time of check to time of use).

llvm-svn: 217625
2014-09-11 20:30:02 +00:00
Bill Schmidt
f543639f31 Add missing colon to RUN line...
llvm-svn: 217623
2014-09-11 20:13:52 +00:00
Bill Schmidt
020f302f01 [PATCH, PowerPC] Accept 'U' and 'X' constraints in inline asm
Inline asm may specify 'U' and 'X' constraints to print a 'u' for an
update-form memory reference, or an 'x' for an indexed-form memory
reference.  However, these are really only useful in GCC internal code
generation.  In inline asm the operand of the memory constraint is
typically just a register containing the address, so 'U' and 'X' make
no sense.

This patch quietly accepts 'U' and 'X' in inline asm patterns, but
otherwise does nothing.  If we ever unexpectedly see a non-register,
we'll assert and sort it out afterwards.

I've added a new test for these constraints; the test case should be
used for other asm-constraints changes down the road.

llvm-svn: 217622
2014-09-11 20:10:03 +00:00
Lang Hames
dcb52703cf [MCJIT] Add support for ARM HALF_DIFF relocations to MCJIT.
Fixes <rdar://problem/18297804>.

llvm-svn: 217620
2014-09-11 19:21:14 +00:00
Rafael Espindola
07aeb38b08 Use simpler version of sys::fs::exists. NFC.
llvm-svn: 217618
2014-09-11 19:11:02 +00:00
Rafael Espindola
5e43285c55 Use the simpler sys::fs:;exists. NFC.
llvm-svn: 217617
2014-09-11 18:44:26 +00:00
Matt Arsenault
fa1f8e81fb Add triple to test to fix bots
llvm-svn: 217612
2014-09-11 17:50:20 +00:00
Brad Smith
9805224039 Provide an implementation of getNoopForMachoTarget for SPARC.
llvm-svn: 217611
2014-09-11 17:40:51 +00:00
Matt Arsenault
dbc82e3483 Add DAG combine for shl + add of constants.
Do
 (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2)

This is already done for multiplies, but since multiplies
by powers of two are turned into shifts, we also need
to handle it here.

This might want checks for isLegalAddImmediate to avoid
transforming an add of a legal immediate with one that isn't.

llvm-svn: 217610
2014-09-11 17:34:19 +00:00
Lang Hames
f8ba571e92 [MCJIT] Take the relocation addend into account when applying ARM MachO VANILLA
and BR24 relocations.

<rdar://problem/18296496>

llvm-svn: 217605
2014-09-11 17:27:01 +00:00
Ismail Pazarbasi
60befa06fc Added missing LLVM_NOEXCEPT to the definition of _obj2yaml_error_category::name
LLVM_NOEXCEPT was added in r210591.

llvm-svn: 217603
2014-09-11 17:19:54 +00:00
Adam Nemet
50897a4c50 [AVX512] Fix miscompile for unpack
r189189 implemented AVX512 unpack by essentially performing a 256-bit unpack
between the low and the high 256 bits of src1 into the low part of the
destination and another unpack of the low and high 256 bits of src2 into the
high part of the destination.

I don't think that's how unpack works.  AVX512 unpack simply has more 128-bit
lanes but other than it works the same way as AVX.  So in each 128-bit lane,
we're always interleaving certain parts of both operands rather different
parts of one of the operands.

E.g. for this:
__v16sf a = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
__v16sf b = { 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 };
__v16sf c = __builtin_shufflevector(a, b, 0, 8, 1, 9, 4, 12, 5, 13, 16,
	    			       	     24, 17, 25, 20, 28, 21, 29);

we generated punpcklps (notice how the elements of a and b are not interleaved
in the shuffle).  In turn, c was set to this:

  0 16 1 17 4 20 5 21 8 24 9 25 12 28 13 29

Obviously this should have just returned the mask vector of the shuffle
vector.

I mostly reverted this change and made sure the original AVX code worked
for 512-bit vectors as well.

Also updated the tests because they matched the logic from the code.

llvm-svn: 217602
2014-09-11 16:51:10 +00:00
Sanjay Patel
92c3cafc18 Add triple and remove hashes to account for buildbot differences in comment strings.
llvm-svn: 217601
2014-09-11 16:08:44 +00:00
Benjamin Kramer
f67cce1ff0 Move constant-sized bitvector to the stack.
llvm-svn: 217600
2014-09-11 15:58:39 +00:00
Sanjay Patel
099c1958cc Combine fmul vector FP constants when unsafe math is allowed.
This is an extension of the change made with r215820:
http://llvm.org/viewvc/llvm-project?view=revision&revision=215820

That patch allowed combining of splatted vector FP constants that are multiplied.

This patch allows combining non-uniform vector FP constants too by relaxing the
check on the type of vector. Also, canonicalize a vector fmul in the
same way that we already do for scalars - if only one operand of the fmul is a
constant, make it operand 1. Otherwise, we miss potential folds.

This fold is also done by -instcombine, but it's possible that extra
fmuls may have been generated during lowering.

Differential Revision: http://reviews.llvm.org/D5254

llvm-svn: 217599
2014-09-11 15:45:27 +00:00
Sanjay Patel
a0d0d4091d typo
llvm-svn: 217597
2014-09-11 15:41:01 +00:00
Aaron Watry
1859a8bc9e R600: Add cmpxchg instruction for evergreen
Refactored the R600_LDS_1A2D class a bit to get it to actually work.

It seemed to be previously unused and broken.

We also have to disable the conversion to the noret variant for now in
R600ISelLowering because the getLDSNoRetOp method only handles 1A1D LDS ops.

Someone can feel free to modify the AMDGPU::getLDSNoRetOp method to
work for more than 1A1D variants of LDS operations. It's being left as a
future TODO for now.

Signed-off-by: Aaron Watry <awatry at gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217596
2014-09-11 15:02:54 +00:00
Aaron Watry
c2b54eada1 R600: Test local atomics for evergreen
Now that the operations are all implemented, we can test this sub-arch here.

Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217595
2014-09-11 15:02:52 +00:00
Aaron Watry
4f82dbe9d0 R600: Add LDS_WRXCHG[_RET] instructions for Evergreen.
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217594
2014-09-11 15:02:49 +00:00
Aaron Watry
377c13a43a R600: Add LDS_MIN_[U]INT[_RET] instructions for Evergreen
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217593
2014-09-11 15:02:47 +00:00
Aaron Watry
b98caacebe R600: Add LDS_XOR[_RET] instructions for Evergreen
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217592
2014-09-11 15:02:46 +00:00
Aaron Watry
257d64f913 R600: Add LDS_OR[_RET] instructions for Evergreen
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217591
2014-09-11 15:02:44 +00:00
Aaron Watry
6114fbaf2e R600: Add LDS_AND[_RET] instructions for Evergreen
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217590
2014-09-11 15:02:43 +00:00
Aaron Watry
71dd40549c R600: Add LDS_MAX_[U]INT[_RET] instructions for Evergreen
This was only present for SI before.

Cayman may still be missing, but I am unable to test that currently.

v2: Don't create atomicrmw max tests in separate file

Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
CC: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 217589
2014-09-11 15:02:41 +00:00
Daniel Sanders
3ba5dbed96 [docs] Mention character array constants in docs/LangRef.rst
Summary:
They were used in the 'Module Structure' example but weren't otherwise
documented.

Credit to Reed Kotler for noticing.

Reviewers: hans

Reviewed By: hans

Subscribers: hans, llvm-commits

Differential Revision: http://reviews.llvm.org/D5191

llvm-svn: 217583
2014-09-11 12:02:59 +00:00
Tilmann Scheller
9817f96600 [ARM] Add Thumb-2 code size optimization regression test for LSR (register).
llvm-svn: 217582
2014-09-11 10:45:50 +00:00
Tilmann Scheller
2b9d5dcb97 [ARM] Add Thumb-2 code size optimization regression test for LSR (immediate).
llvm-svn: 217581
2014-09-11 10:42:17 +00:00
Arnaud A. de Grandmaison
1101db7b14 [AArch64] Reenable the PBQP test now that the leak issue has been fixed.
David Blaikie's commits r217563 & r217564, which added shared_ptr to the
CostPool have fixed some memory leak issues exposed by the PBQP with
coalescing constraints.

The sanitizer bot was failing because of those leaks. Now that the leaks
are gone, we can reenable the aarch64/pbqp test.

llvm-svn: 217580
2014-09-11 10:39:52 +00:00
Tilmann Scheller
9745855d08 [ARM] Add Thumb-2 code size optimization regression test for LSL (register).
llvm-svn: 217579
2014-09-11 10:33:39 +00:00
Tilmann Scheller
c86b96c835 [ARM] Add Thumb2 code size optimization regression test for LSL (immediate).
llvm-svn: 217576
2014-09-11 10:29:42 +00:00
Chandler Carruth
3a087dd25f [x86] Fixup r217565 which baked in an assumption about the function
name that breaks on some platforms. This part of the test just doesn't
matter...

llvm-svn: 217575
2014-09-11 10:21:25 +00:00
Hal Finkel
293bcd13c5 [AlignmentFromAssumptions] Don't crash just because the target is 32-bit
We used to crash processing any relevant @llvm.assume on a 32-bit target
(because we'd ask SE to subtract expressions of differing types). I've copied
our 'simple.ll' test, but with the data layout from arm-linux-gnueabihf to get
some meaningful test coverage here.

llvm-svn: 217574
2014-09-11 08:40:17 +00:00
David Xu
4d7f013423 Build correct vector filled with undef nodes
llvm-svn: 217570
2014-09-11 05:10:28 +00:00