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Commit Graph

152675 Commits

Author SHA1 Message Date
Matt Arsenault
0201202275 IPRA: Don't crash on null getCallPreservedMask
Kernels aren't callable, so they don't have a call preserved mask.

llvm-svn: 310172
2017-08-05 07:50:18 +00:00
Chandler Carruth
c777bdad5b [LCG] Completely remove the parent set and leaf tracking for RefSCCs.
After the previous series of patches, this is now trivial and deletes
a pretty astonishing amount of complexity. This has been a long time
coming, as the move toward a PO sequence of RefSCCs started eroding the
underlying use cases for this half of the data structure.

Among the biggest advantages here is that now there aren't two
independent data structures that need to stay in sync.

Some of my profiling has also indicated that updating the parent sets
was among the most expensive parts of the lazy call graph. Eliminating
it whole sale is likely to be a nice win in terms of compile time.

Last but not least, I had discussed with some folks previously keeping
it around for asserts and other correctness checking, but once the
fundamentals of the parent and child checking were implemented without
the parent sets their value in correctness checking was tiny and no
where near worth the cost of the complexity required to keep everything
up-to-date.

llvm-svn: 310171
2017-08-05 07:37:00 +00:00
Chandler Carruth
50e3192084 [LCG] Re-implement the basic isParentOf, isAncestorOf, isChildOf, and
isDescendantOf methods on RefSCCs in terms of the forward edges rather
than the parent sets.

This is technically slower, but probably not interestingly slower, and
all of these routines were already so expensive that they're guarded
behind both !NDEBUG and EXPENSIVE_CHECKS.

This removes another non-critical usage of parent sets.

I've also added some comments to try and help clarify to any potential
users the costs of these routines. They're mostly useful for debugging,
asserts, or other queries.

llvm-svn: 310170
2017-08-05 06:24:09 +00:00
Chandler Carruth
be2977a4ea [LCG] Add the concept of a "dead" node and use it to avoid a complex
walk over the parent set.

When removing a single function from the call graph, we previously would
walk the entire RefSCC's parent set and then walk every outgoing edge
just to find the ones to remove. In addition to this being quite high
complexity in theory, it is also the last fundamental use of the parent
sets.

With this change, when we remove a function we transform the node
containing it to be recognizably "dead" and then teach the edge
iterators to recognize edges to such nodes and skip them the same way
they skip null edges.

We can't move fully to using "dead" nodes -- when disconnecting two live
nodes we need to null out the edge. But the complexity this adds to the
edge sequence isn't too bad and the simplification of lazily handling
this seems like a significant win.

llvm-svn: 310169
2017-08-05 05:47:37 +00:00
Joel Jones
cee6711d56 [AArch64] LSE Atomics reorg - part 1
Add memory synchronization semantics to LSE Atomics.

The memory semantics feature will be added in a subsequent patch.

In this patch, several corrections were added to the existing LSE Atomics
implementation, based on the ARM Errata D11904 from 05/12/2017.

Patch by: steleman

Differential Revision: https://reviews.llvm.org/D35319

llvm-svn: 310167
2017-08-05 04:30:55 +00:00
Chandler Carruth
cd13c2cca4 [LCG] Replace an implicit bool operator with a named function. (NFC)
The definition of 'false' here was already pretty vague and debatable,
and I'm about to add another potential 'false' that would actually make
much more sense in a bool operator. Especially given how rarely this is
used, a nicely named method seems better.

llvm-svn: 310165
2017-08-05 04:04:06 +00:00
Chandler Carruth
d0492a36c8 [LCG] When removing a dead function and clearing out the data
structures, actually null out the graph pointers as well. We won't ever
update these, and we certainly shouldn't be calling any methods on them,
so it seems good to defensively nuke them.

llvm-svn: 310164
2017-08-05 03:37:39 +00:00
Chandler Carruth
3dc2cc77b2 [LCG] Rather than walking the directed graph structure to update graph
pointers in node objects, just walk the map from function to node.

It doesn't have stable ordering, but works just as well and is much
simpler. We don't need ordering when just updating internal pointers.

llvm-svn: 310163
2017-08-05 03:37:39 +00:00
Chandler Carruth
9533c6982e [LCG] Remove the complex walk of the parent sets to update graph
pointers.

This is completely unnecessary as we have a trivial list of RefSCCs now
that we can walk.

llvm-svn: 310162
2017-08-05 03:37:38 +00:00
Chandler Carruth
ac85f98ac6 [LCG] Remove the use of the parent sets to compute connectivity when
merging RefSCCs.

The logic to directly use the reference edges is simpler and not
substantially slower (despite the comments to the contrary) because this
is not actually an especially hot part of LCG in practice.

llvm-svn: 310161
2017-08-05 03:37:37 +00:00
Craig Topper
0f832f8e82 [InstCombine] In foldSelectICmpAnd, if we need to to truncate from the 'and' type to the 'select' type, do it after shifting right instead of just bailing.
Previously we were always trying to emit the zext or truncate before any shift. This meant if the 'and' mask was larger than the size of the truncate we would skip the transformation.

Now we shift the result of the and right first leaving the bit within the range of the truncate.

This matches what we are doing in foldSelectICmpAndOr for the same problem.

llvm-svn: 310159
2017-08-05 01:45:17 +00:00
Reid Kleckner
6e5c7e2050 Commit the local change I had to make my test pass
llvm-svn: 310153
2017-08-05 00:15:40 +00:00
Reid Kleckner
c1f69e6129 [X86] Teach fastisel to select calls to dllimport functions
Summary:
Direct calls to dllimport functions are very common Windows. We should
add them to the -O0 fast path.

Reviewers: rafael

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D36197

llvm-svn: 310152
2017-08-05 00:10:43 +00:00
Kostya Serebryany
611872e92b [libFuzzer] use the in-binary pc table (instead of PCs captured at run-time) to implement -exit_on_src_pos
llvm-svn: 310151
2017-08-04 23:49:53 +00:00
Craig Topper
3881f2deba [X86] Regenerate the fsin/fcos instruction test using update_llc_test_checks.py. NFC
This looks to have been converted from a grep based test at some point in a really strange way.

llvm-svn: 310150
2017-08-04 23:36:03 +00:00
Petr Hosek
e4c1238469 [llvm][llvm-objcopy] When outputting to binary don't output segments that cover no sections
Sometimes LLD will produce a PT_LOAD segment that only covers the
headers (and covers no sections). GNU objcopy does not output the
segment contents for these sections. In particular this is an issue in
building magenta because the final link step for the kernel would
produce just such a PT_LOAD segment. This change is to support this case
and to match what GNU objcopy does in this case.

Patch by Jake Ehrlich

Differential Revision: https://reviews.llvm.org/D36196

llvm-svn: 310149
2017-08-04 23:18:18 +00:00
Kostya Serebryany
8a7d3f0c48 [libFuzzer] print PCs using the in-binary PC-table instead of relying on PCs captured at run-time
llvm-svn: 310148
2017-08-04 23:13:58 +00:00
Adrian McCarthy
ee6fb7079a Enable llvm-pdbutil to list enumerations using native PDB reader
This extends the native reader to enable llvm-pdbutil to list the enums in a
PDB and it includes a simple test. It does not yet list the values in the
enumerations, which requires an actual implementation of
NativeEnumSymbol::FindChildren.

To exercise this code, use a command like:

    llvm-pdbutil pretty -native -enums foo.pdb

Differential Revision: https://reviews.llvm.org/D35738

llvm-svn: 310144
2017-08-04 22:37:58 +00:00
Sanjay Patel
23bd4a9364 [InstCombine] narrow truncated add/sub/mul with constant
Name: narrow_sub
  %sub = sub i32 C1, %x
  %r = trunc i32 %sub to i8
  =>  
  %xn = trunc i32 %x to i8
  %narrowC = trunc i32 C1 to i8
  %r = sub i8 %narrowC, %xn
 
Name: narrow_add
  %add = add i32 %x, C1
  %r = trunc i32 %add to i8
  =>  
  %xn = trunc i32 %x to i8
  %narrowC = trunc i32 C1 to i8
  %r = add i8 %xn, %narrowC
  
Name: narrow_mul
  %mul = mul i32 %x, C1
  %r = trunc i32 %mul to i8
  =>  
  %xn = trunc i32 %x to i8
  %narrowC = trunc i32 C1 to i8
  %r = mul i8 %xn, %narrowC


http://rise4fun.com/Alive/QpS

This doesn't solve PR34046 (failure to recognize rotate):
https://bugs.llvm.org/show_bug.cgi?id=34046
...but it reduces an extra complication in the description examples 
to a form that we can more easily match.

llvm-svn: 310141
2017-08-04 22:30:34 +00:00
Reid Kleckner
d7f3160f07 [Support] Use FILE_SHARE_DELETE to fix RemoveFileOnSignal on Windows
Summary:
Tools like clang that use RemoveFileOnSignal on their output files
weren't actually able to clean up their outputs before this change.  Now
the call to llvm::sys::fs::remove succeeds and the temporary file is
deleted. This is a stop-gap to fix clang before implementing the
solution outlined in PR34070.

Reviewers: davide

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D36337

llvm-svn: 310137
2017-08-04 21:52:00 +00:00
Zachary Turner
e3fd21569d Fix broken PDB tests.
llvm-svn: 310130
2017-08-04 21:15:12 +00:00
Kyle Butt
c60bfa537d BlockPlacement: add a flag to force cold block outlining w/o a profile.
NFC.

llvm-svn: 310129
2017-08-04 21:13:41 +00:00
Zachary Turner
d63fab4be2 [pdbutil] When dumping section contribs, show the section name.
llvm-svn: 310128
2017-08-04 21:10:04 +00:00
Petr Hosek
f0989c5e0e Reland "[llvm][llvm-objcopy] Added support for outputting to binary in llvm-objcopy"
This change adds the "-O binary" flag which directs llvm-objcopy to
output the object file to the same format as GNU objcopy does when given
the flag "-O binary". This was done by splitting the Object class into
two subclasses ObjectELF and ObjectBianry which each output a different
format but relay on the same code to read in the Object in Object.

Patch by Jake Ehrlich

Differential Revision: https://reviews.llvm.org/D34480

llvm-svn: 310127
2017-08-04 21:09:26 +00:00
Kostya Serebryany
8d2f9dcb82 [libFuzzer] re-enable fuzzer-printcovpcs.test
llvm-svn: 310126
2017-08-04 20:47:22 +00:00
Adrian Prantl
1bed051b67 Remove unused include directive and un-break the module build.
llvm-svn: 310124
2017-08-04 20:41:37 +00:00
Nico Weber
1ee42ff794 Revert r310055, it caused PR34074.
llvm-svn: 310123
2017-08-04 20:40:38 +00:00
Sanjay Patel
9f47ed1fb0 [InstCombine] add vector tests for truncated math; NFC
llvm-svn: 310122
2017-08-04 20:38:33 +00:00
Nico Weber
e2f1c24856 Revert r310058, it caused PR34073.
llvm-svn: 310118
2017-08-04 20:24:13 +00:00
Amara Emerson
141dea8af4 [SCEV] Preserve NSW information for sext(subtract).
Pushes the sext onto the operands of a Sub if NSW is present.
Also adds support for propagating the nowrap flags of the
llvm.ssub.with.overflow intrinsic during analysis.

Differential Revision: https://reviews.llvm.org/D35256

llvm-svn: 310117
2017-08-04 20:19:46 +00:00
Quentin Colombet
0a7c56803e [GlobalISel] Remove the GISelAccessor API.
Its sole purpose was to avoid spreading around ifdefs related to
building global-isel. Since r309990, GlobalISel is not optional anymore,
thus, we can get rid of this mechanism all together.

NFC.

llvm-svn: 310115
2017-08-04 20:15:46 +00:00
Quentin Colombet
74a2e6ec62 [GlobalISel] Remove a stall comment in CMake.
Thanks to Diana Picus <diana.picus@linaro.org> for noticing.

NFC

llvm-svn: 310114
2017-08-04 20:15:41 +00:00
Kostya Serebryany
196da07da0 [libFuzzer] make a test more robust
llvm-svn: 310113
2017-08-04 20:09:15 +00:00
Kostya Serebryany
2159f7f15d [libFuzzer] remove the now redundant 'LLVMFuzzer-' prefix from libFuzzer tests
llvm-svn: 310110
2017-08-04 20:05:25 +00:00
Zachary Turner
83e6215a4e [llvm-pdbutil] Dump image section headers.
Image section headers are stored in the DBI stream, but we
had no way to dump them.  This patch adds dumping support,
along with some tests that LLD actually dumps them correctly.

Differential Revision: https://reviews.llvm.org/D36332

llvm-svn: 310107
2017-08-04 20:02:38 +00:00
Kostya Serebryany
9cb37f0db2 [libFuzzer] split one test into several
llvm-svn: 310106
2017-08-04 20:01:04 +00:00
Sanjay Patel
5db0c30b42 [InstCombine] auto-generate test checks; NFC
llvm-svn: 310101
2017-08-04 19:29:32 +00:00
George Karpenkov
fc2861a8a6 [libFuzzer tests] Only enable libFuzzer tests if
-DLIBFUZZER_ENABLE_TESTS=ON is set.

llvm-svn: 310100
2017-08-04 19:29:16 +00:00
Ulrich Weigand
9ee7a9a74c [SystemZ] Add support for 128-bit atomic load/store/cmpxchg
This adds support for the main 128-bit atomic operations,
using the SystemZ instructions LPQ, STPQ, and CDSG.

Generating these instructions is a bit more complex than usual
since the i128 type is not legal for the back-end.  Therefore,
we have to hook the LowerOperationWrapper and ReplaceNodeResults
TargetLowering callbacks.

llvm-svn: 310094
2017-08-04 18:57:58 +00:00
Ulrich Weigand
69fde521b5 [SystemZ] Eliminate unnecessary serialization operations
We currently emit a serialization operation (bcr 14, 0) before every
atomic load and after every atomic store.  This is overly conservative.
The SystemZ architecture actually does not require any serialization
for atomic loads, and a serialization after an atomic store only if
we need to enforce sequential consistency.  This is what other compilers
for the platform implement as well.

llvm-svn: 310093
2017-08-04 18:53:35 +00:00
Evgeny Stupachenko
2be9c5c55b Fix PR33514
Summary:
The bug was uncovered after fix of  PR23384 (part 3 of 3).
The patch restricts pointer multiplication in SCEV computaion for ICmpZero.

Reviewers: qcolombet

Differential Revision: http://reviews.llvm.org/D36170

From: Evgeny Stupachenko <evstupac@gmail.com>
                         <evgeny.v.stupachenko@intel.com>
llvm-svn: 310092
2017-08-04 18:46:13 +00:00
Kostya Serebryany
6e37795482 [libFuzzer] make trace-pc.test more reliable
llvm-svn: 310091
2017-08-04 18:43:39 +00:00
Connor Abbott
277c5ff889 [AMDGPU] Implement llvm.amdgcn.set.inactive intrinsic
Summary:
This intrinsic lets us set inactive lanes to an identity value when
implementing wavefront reductions. In combination with Whole Wavefront
Mode, it lets inactive lanes be skipped over as required by GLSL/Vulkan.
Lowering the intrinsic needs to happen post-RA so that RA knows that the
destination isn't completely overwritten due to the EXEC shenanigans, so
we need another pseudo-instruction to represent the un-lowered
intrinsic.

Reviewers: tstellar, arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D34719

llvm-svn: 310088
2017-08-04 18:36:54 +00:00
Connor Abbott
c83a4aedcc [AMDGPU] Add support for Whole Wavefront Mode
Summary:
Whole Wavefront Wode (WWM) is similar to WQM, except that all of the
lanes are always enabled, regardless of control flow. This is required
for implementing wavefront reductions in non-uniform control flow, where
we need to use the inactive lanes to propagate intermediate results, so
they need to be enabled. We need to propagate WWM to uses (unless
they're explicitly marked as exact) so that they also propagate
intermediate results correctly. We do the analysis and exec mask munging
during the WQM pass, since there are interactions with WQM for things
that require both WQM and WWM. For simplicity, WWM is entirely
block-local -- blocks are never WWM on entry or exit of a block, and WWM
is not propagated to the block level.  This means that computations
involving WWM cannot involve control flow, but we only ever plan to use
WWM for a few limited purposes (none of which involve control flow)
anyways.

Shaders can ask for WWM using the @llvm.amdgcn.wwm intrinsic. There
isn't yet a way to turn WWM off -- that will be added in a future
change.

Finally, it turns out that turning on inactive lanes causes a number of
problems with register allocation. While the best long-term solution
seems like teaching LLVM's register allocator about predication, for now
we need to add some hacks to prevent ourselves from getting into trouble
due to constraints that aren't currently expressed in LLVM. For the gory
details, see the comments at the top of SIFixWWMLiveness.cpp.

Reviewers: arsenm, nhaehnle, tpr

Subscribers: kzhuravl, wdng, mgorny, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D35524

llvm-svn: 310087
2017-08-04 18:36:52 +00:00
Connor Abbott
26889b3372 [AMDGPU] refactor WQM pass in preparation for WWM (NFCI)
Summary:
Right now, the WQM pass conflates two different things when tracking the
Needs of an instruction:

1. Needs can be StateWQM, which is propagated to other instructions, and
means that this instruction (and everything it depends on) must be
calculated in WQM.
2. Needs can be StateExact, which is not propagated to other
instructions, and means that this instruction must not be calculated in
WQM and WQM-ness must not be propagated past this instruction.

This works now because there are only two different states, but in the
future we want to be able to express things like "calculate this in WQM,
but please disable WWM and don't propagate it" (to implement
@llvm.amdgcn.set.inactive). In order to do this, we need to split the
per-instruction Needs field in two: a new Needs field, which can only
contain StateWQM (and in the future, StateWWM) and is propagated to
sources, and a Disables field, which can also contain just StateWQM or
nothing for now.

We keep the per-block tracking the same for now, by translating
Needs/Disables to the old representation with only StateWQM or
StateExact. The other place that needs special handling is when we
emit the state transitions. We could just translate back to the old
representation there as well, which we almost do, but instead of 0 as a
placeholder value for "any state," we explicitly or together all the
states an instruction is allowed to be in. This lets us refactor the
code in preparation for WWM, where we'll need to be able to handle
things like "this instruction must be in Exact or WQM, but not WWM."

Reviewers: arsenm, nhaehnle, tpr

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D35523

llvm-svn: 310086
2017-08-04 18:36:50 +00:00
Connor Abbott
547b308884 [AMDGPU] Add an llvm.amdgcn.wqm intrinsic for WQM
Summary:
Previously, we assumed that certain types of instructions needed WQM in
pixel shaders, particularly DS instructions and image sampling
instructions. This was ok because with OpenGL, the assumption was
correct. But we want to start using DPP instructions for derivatives as
well as other things, so the assumption that we can infer whether to use
WQM based on the instruction won't continue to hold. This intrinsic lets
frontends like Mesa indicate what things need WQM based on their
knowledge of the API, rather than second-guessing them in the backend.
We need to keep around the old method of enabling WQM, but eventually we
should remove it once Mesa catches up. For now, this will let us use DPP
instructions for computing derivatives correctly.

Reviewers: arsenm, tpr, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D35167

llvm-svn: 310085
2017-08-04 18:36:49 +00:00
Marcello Maggioni
7e0b2ca4fd [MachineOperand] Add ChangeToTargetIndex method. NFC
Differential Revision: https://reviews.llvm.org/D36301

llvm-svn: 310083
2017-08-04 18:24:09 +00:00
Reid Kleckner
c3417d6f71 [Support] Remove getPathFromOpenFD, it was unused
Summary:
It was added to support clang warnings about includes with case
mismatches, but it ended up not being necessary.

Reviewers: twoh, rafael

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D36328

llvm-svn: 310078
2017-08-04 17:43:49 +00:00
George Karpenkov
3c817816f0 Fixing buildbots: do not register check-fuzzer if clang or asan are not
present.

llvm-svn: 310077
2017-08-04 17:43:29 +00:00
George Karpenkov
9f35a83dd0 Drop Windows support from libFuzzer tests.
Differential Revision: https://reviews.llvm.org/D36205

llvm-svn: 310076
2017-08-04 17:43:28 +00:00