1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 23:42:52 +01:00
Commit Graph

94185 Commits

Author SHA1 Message Date
Shuxin Yang
dcc00fd59f remove unnecessary space
llvm-svn: 186931
2013-07-23 06:44:34 +00:00
NAKAMURA Takumi
8a95447142 llvm/test/DebugInfo/X86/dbg-value-range.ll: Add -disable-debug-info-verifier, too, since r186902.
llvm-svn: 186930
2013-07-23 06:41:51 +00:00
Craig Topper
6c816aee2a Remove 'else' after 'return'. No functional change.
llvm-svn: 186929
2013-07-23 06:27:36 +00:00
Craig Topper
e053d0d3ac Remove trailing whitespace.
llvm-svn: 186928
2013-07-23 06:25:00 +00:00
Craig Topper
c7bcbfdf42 Don't let x86 asm printer use the no operand movsd alias. It should use the normal movsl instead.
llvm-svn: 186924
2013-07-23 01:50:47 +00:00
Tom Stellard
e096e3c298 R600: Add support for 24-bit MAD instructions
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186923
2013-07-23 01:48:49 +00:00
Tom Stellard
803a4c6e50 R600: Add support for 24-bit MUL instructions
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186922
2013-07-23 01:48:42 +00:00
Tom Stellard
705721da31 R600: Improve support for < 32-bit loads
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186921
2013-07-23 01:48:35 +00:00
Tom Stellard
fa0b944f18 R600: Rename AMDILISelDAGToDAG.cpp -> AMDGPUISelDAGToDAG.cpp
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186920
2013-07-23 01:48:29 +00:00
Tom Stellard
bc9deba8ad R600: Move CONST_ADDRESS folding into AMDGPUDAGToDAGISel::Select()
This increases the number of opportunites we have for folding.  With the
previous implementation we were unable to fold into any instructions
other than the first when multiple instructions were selected from a
single SDNode.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186919
2013-07-23 01:48:24 +00:00
Tom Stellard
e60bb5f272 R600: Use KCache for kernel arguments
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186918
2013-07-23 01:48:18 +00:00
Tom Stellard
c35ac4a061 R600: Simplify assembly for KCache registers using the TableGen !add operator
Before:

MOV * T0.W, KC0[131-128].Y

After:

MOV * T0.W, KC0[3].Y

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186917
2013-07-23 01:48:08 +00:00
Tom Stellard
6ca248c89f R600: Use the same compute kernel calling convention for all GPUs
A side-effect of this is that now the compiler expects kernel arguments
to be 4-byte aligned.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186916
2013-07-23 01:48:05 +00:00
Tom Stellard
ac10764020 R600: Use correct LoadExtType when lowering kernel arguments
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186915
2013-07-23 01:47:58 +00:00
Tom Stellard
d7dd88a3f7 R600: Clean up extended load patterns
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186914
2013-07-23 01:47:52 +00:00
Tom Stellard
25ce190913 R600: Expand vector FNEG
llvm-svn: 186913
2013-07-23 01:47:46 +00:00
Craig Topper
693606b026 Revert r186907 to fix bots.
llvm-svn: 186910
2013-07-23 01:29:37 +00:00
Craig Topper
5337e87594 Don't let x86 asm printer use the no operand movsd alias. It should use the normal movsl instead.
llvm-svn: 186907
2013-07-23 01:21:36 +00:00
Craig Topper
5399a0520e Add aliases to map 'imm, mem' form of x86 bts/btr/btc without a size suffix to their 32-bit forms.
This makes them consistent with 'bt' which already had this handling. gas has the same behavior. There have been discussions on the mailing list about determining size based on the immediate, but my goal here was just to remove the inconsistency.

llvm-svn: 186904
2013-07-23 00:56:15 +00:00
Manman Ren
3a6f508b6b Debug Info Finder: use processDeclare and processValue to list debug info
MDNodes used by DbgDeclareInst and DbgValueInst.

Another 16 testing cases failed and they are disabled with
-disable-debug-info-verifier.
A total of 34 cases are disabled with -disable-debug-info-verifier and will be
corrected.

llvm-svn: 186902
2013-07-23 00:22:51 +00:00
Craig Topper
f89dce68af Explicitly don't let the asm printer use the clrb/w/l aliases for xor %reg, %reg.
It only didn't use it before because it seems InstAlias handling in the asm printer fails to count tied operands so it tried to find an xor with 2 operands instead of the 3 it wfails to count tied.

llvm-svn: 186900
2013-07-23 00:15:19 +00:00
Craig Topper
22b26f24f4 Suppress argumentless aliases for some x86 FP operations from being used by the asm writer. Prefer to use the explicit %st(1) form.
llvm-svn: 186897
2013-07-23 00:03:33 +00:00
Matt Arsenault
31d9958696 Fix typo (ponted -> pointed)
llvm-svn: 186896
2013-07-22 23:52:23 +00:00
Nick Lewycky
80c6b2a977 Remove extraneous null statement. No functionality change!
llvm-svn: 186893
2013-07-22 23:38:27 +00:00
Jakub Staszak
ad1f6af5a0 Use switch instead of if. No functionality change.
llvm-svn: 186892
2013-07-22 23:38:16 +00:00
Jakub Staszak
cb88203090 Remove trailing spaces.
llvm-svn: 186890
2013-07-22 23:16:36 +00:00
Eli Bendersky
44a6964953 Add a simple unit test for MemoryBuffer::getOpenFile
llvm-svn: 186887
2013-07-22 22:46:21 +00:00
Eric Christopher
b0a060ff50 Typo.
llvm-svn: 186886
2013-07-22 22:25:09 +00:00
Eric Christopher
86c1654e7b 80-column tidying. Formatting choices by clang-format.
llvm-svn: 186885
2013-07-22 22:25:07 +00:00
Nadav Rotem
383f980dca When we vectorize across multiple basic blocks we may vectorize PHINodes that create a cycle. We already break the cycle on phi-nodes, but arithmetic operations are still uplicated. This patch adds code that checks if the operation that we are vectorizing was vectorized during the visit of the operands and uses this value if it can.
llvm-svn: 186883
2013-07-22 22:18:07 +00:00
Jakub Staszak
9e648c8d0e OldPtr is llvm::Instruction. Remove unneeded cast<>.
llvm-svn: 186880
2013-07-22 22:10:43 +00:00
Richard Trieu
d4dca46a3e Silence gcc warning.
llvm-svn: 186879
2013-07-22 21:29:28 +00:00
Kevin Enderby
4f4de8ba04 Fix the move to/from accumulator register instructions that use a full 64-bit
absolute address encoded in the instruction.

rdar://8612627 and rdar://14299221

llvm-svn: 186878
2013-07-22 21:25:31 +00:00
Jakub Staszak
11159a5a91 Change tabs to spaces.
llvm-svn: 186877
2013-07-22 21:11:30 +00:00
Jakub Staszak
ba65057867 Fix typo in test.
llvm-svn: 186876
2013-07-22 21:10:42 +00:00
Michael Gottesman
48939ede3a [stackprotector] Changed isNoopBitcast/sameNoopInput to take TargetLoweringBase instead of TargetLowering.
Both functions only use functionality from TargetLoweringBase.

rdar://13935163

llvm-svn: 186874
2013-07-22 21:05:47 +00:00
Craig Topper
86b83be14d Recommit r186813: More Intel syntax alias fixes. With the addition of suppressing some of the aliases from being emitted by the asm printer.
llvm-svn: 186869
2013-07-22 20:46:37 +00:00
Michael Gottesman
062dd20303 [stackprotector] Refactored ssp prologue creation code into its own helper function.
No functionality change.

rdar://13935163

llvm-svn: 186868
2013-07-22 20:44:11 +00:00
Manman Ren
24b63d9007 Debug Info Finder: add processScope to actually handle the Scope.
Instead of just adding the scope to the list, we actually handle the scope.

llvm-svn: 186867
2013-07-22 20:28:53 +00:00
Bill Wendling
63482ebdd5 Recommit r186217 with testcase fix:
Use the function attributes to pass along the stack protector buffer size.

 Now that we have robust function attributes, don't use a command line option to
 specify the stack protecto buffer size.

llvm-svn: 186863
2013-07-22 20:15:21 +00:00
Akira Hatanaka
39a746e93f [mips] Fix MipsAsmParser::parseCCRRegs.
Enable parsing all 32 floating point control registers $0-31 and stop trying to
parse floating point condition code register $fcc0. Also, return ParseFail if
the operand being parsed is not in the expected format. 

llvm-svn: 186861
2013-07-22 19:30:38 +00:00
Rafael Espindola
b5df8607a3 Mark ELF's first symbol as format specific so that llvm-nm ignores it.
llvm-svn: 186860
2013-07-22 19:24:34 +00:00
Matt Arsenault
f4ec7f5975 Fix spelling and grammar
llvm-svn: 186858
2013-07-22 18:59:58 +00:00
Matt Arsenault
355591860e Fix missing const
llvm-svn: 186857
2013-07-22 18:58:53 +00:00
Akira Hatanaka
9f2c66ce7c [mips] Use ADDu instead of OR to copy general purpose registers. Also, delete
the InstAlias pattern which maps "move" to OR to resolve ambiguity in
MatchTable.

llvm-svn: 186855
2013-07-22 18:52:22 +00:00
Andrew Kaylor
208108a8e0 Adding example source to support MCJIT/Kaleidoscope blog posts.
llvm-svn: 186854
2013-07-22 18:47:24 +00:00
Shuxin Yang
1e13d52088 Initialize/Register LTO passes to enable flags like -print-after=<lto-pass>
There already have two "dead" functions, initialize{IPO|IPA}, defined for 
similar purpose. I decide not to call these two functions for two reasons:
  o. they don't cover all LTO passes (which will soon be separated into IPO 
     and post-IPO passes)
  o. We have not yet figured out the right passes and the ordering for IPO 
     and post-IPO stages, meaning this change is only for the time being.

Since LTO passes are registered, we are now able to print IR before and 
after particular point.

For OSX users:
--------------
  "...-Wl,-mllvm -Wl,-print-after=<pass-name>" will print IR after the
  specified pass.

For Other UNIX with GNU gold linker:
------------------------------------
  "-Wl,-plugin-opt=-print-after=<pass-name>" should work.
  (NOTE: no need for "-Wl,-mllvm")

  Strip "-Wl," if flags are fed directly to linker instead of clang/clang++.

llvm-svn: 186853
2013-07-22 18:40:34 +00:00
Eric Christopher
b823d94169 Fix typo.
llvm-svn: 186852
2013-07-22 18:26:18 +00:00
Eric Christopher
3749516bec Formatting.
llvm-svn: 186851
2013-07-22 18:26:15 +00:00
Jim Grosbach
ea82a920ae MC: mayAffectControlFlow() handling for variadic instructions.
Variadic MC instructions don't note whether the variable operands
are uses or defs, so mayAffectControlFlow() must conservatively
assume they are defs and return true if the PC is in the operand
list.

rdar://14488628

llvm-svn: 186846
2013-07-22 17:45:55 +00:00