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Commit Graph

174539 Commits

Author SHA1 Message Date
Simon Pilgrim
a9632ac602 [TTI] Add generic UADDSAT/USUBSAT costs
Add generic costs calculation for UADDSAT/USUBSAT intrinsics, this fallbacks to using generic costs for uadd_with_overflow/usub_with_overflow + a select.

Differential Revision: https://reviews.llvm.org/D56907

llvm-svn: 352044
2019-01-24 12:27:10 +00:00
Simon Pilgrim
c836f6af6f [TTI] Add generic UADDO/USUBO costs
Added x86 scalar uadd_with_overflow/usub_with_overflow costs.

Differential Revision: https://reviews.llvm.org/D56907

llvm-svn: 352043
2019-01-24 12:10:20 +00:00
Florian Hahn
793b7822af Revert "[HotColdSplitting] Get DT and PDT from the pass manager."
This reverts commit a6982414edf315c39ae93f3c3322476217119e99 (llvm-svn: 352036),
because it causes a memory leak in the pass manager. Failing bot

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/10351/steps/check-llvm%20asan/logs/stdio

llvm-svn: 352041
2019-01-24 11:22:08 +00:00
Petar Avramovic
b169374107 [MIPS GlobalISel] Select zero extending and sign extending load
Select zero extending and sign extending load for MIPS32.
Use size from MachineMemOperand to determine number of bytes to load.

Differential Revision: https://reviews.llvm.org/D57099

llvm-svn: 352038
2019-01-24 10:27:21 +00:00
Petar Avramovic
046aa79f4c [MIPS GlobalISel] Combine extending loads
Use CombinerHelper to combine extending load instructions.
G_LOAD combined with G_ZEXT, G_SEXT or G_ANYEXT gives G_ZEXTLOAD,
G_SEXTLOAD or G_LOAD with same type as def of extending instruction
respectively.
Similarly G_ZEXTLOAD combined with G_ZEXT gives G_ZEXTLOAD and
G_SEXTLOAD combined with G_SEXT gives G_SEXTLOAD with same type
as def of extending instruction.

Differential Revision: https://reviews.llvm.org/D56914

llvm-svn: 352037
2019-01-24 10:09:52 +00:00
Florian Hahn
21857d8d1a [HotColdSplitting] Get DT and PDT from the pass manager.
Instead of manually computing DT and PDT, we can get the from the pass
manager, which ideally has them already cached. With the new pass
manager, we could even preserve DT/PDT on a per function basis in a
module pass.

I think this also addresses the TODO about re-using the computed DTs for
BFI. IIUC, GetBFI will fetch the DT from the pass manager and when we
will fetch the cached version later.

Reviewers: vsk, hiraditya, tejohnson, thegameg, sebpop

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D57092

llvm-svn: 352036
2019-01-24 09:44:52 +00:00
Simon Atanasyan
4cdd4f9d60 Reapply: [mips] Handle MipsMCExpr sub-expression for the MEK_DTPREL tag
This reapplies commit r351987 with a failed test fix. Now the test
accepts both DW_OP_GNU_push_tls_address and DW_OP_form_tls_address
opcode.

Original commit message:
```
  This is a fix for a regression introduced by the rL348194 commit. In
  that change new type (MEK_DTPREL) of MipsMCExpr expression was added,
  but in some places of the code this type of expression considered as
  unexpected.

  This change fixes the bug. The MEK_DTPREL type of expression is used for
  marking TLS DIEExpr only and contains a regular sub-expression. Where we
  need to handle the expression, we retrieve the sub-expression and
  handle it in a common way.
```

llvm-svn: 352034
2019-01-24 09:13:14 +00:00
Jonas Paulsson
7b476ef0ec [SystemZ] Remember to reset the NoPHIs property on MF in createPHIsForSelects()
After creating new PHI instructions during isel pseudo expansion, the NoPHIs
property of MF should be reset in case it was previously set.

Review: Ulrich Weigand
llvm-svn: 352030
2019-01-24 07:54:41 +00:00
Craig Topper
84ecca068e [X86] Update SelectionDAGDumper to print the extension type and expanding flag for masked loads. Add truncating and compressing for masked stores.
llvm-svn: 352029
2019-01-24 07:51:34 +00:00
Craig Topper
1eb392d57a [X86] Add test cases for opportunities to fold a truncate and a masked store into a truncating masked store.
llvm-svn: 352027
2019-01-24 06:15:03 +00:00
Max Kazantsev
eb689e4048 [NFC] Add another failing test on LoopSimplifyCFG
llvm-svn: 352026
2019-01-24 05:43:19 +00:00
Max Kazantsev
3c0acd8ea8 [LoopSimplifyCFG] Fix inconsistency in live blocks markup
When we choose whether or not we should mark block as dead, we have an
inconsistent logic in markup of live blocks.
- We take candidate IF its terminator branches on constant AND it is immediately
  in current loop;
- We mark successor live IF its terminator doesn't branch by constant OR it branches
  by constant and the successor is its always taken block.

What we are missing here is that when the terminator branches on a constant but is
not taken as a candidate because is it not immediately in the current loop, we will
mark only one (always taken) successor as live. Therefore, we do NOT do the actual
folding but may NOT mark one of the successors as live. So the result of markup is
wrong in this case, and we may then hit various asserts.

Thanks Jordan Rupprech for reporting this!

Differential Revision: https://reviews.llvm.org/D57095
Reviewed By: rupprecht

llvm-svn: 352024
2019-01-24 05:20:29 +00:00
Max Kazantsev
a77f00b48a [NFC] Add a failing test on live block markup in term folding
llvm-svn: 352023
2019-01-24 05:05:55 +00:00
David Blaikie
da4d116ccc DebugInfo: Use assembly label arithmetic for address pool size for easier reading/editing
Recommits 350048, 350050 That broke buildbots because of some typos in
the test case.

llvm-svn: 352019
2019-01-24 03:27:57 +00:00
Ana Pazos
99c9f56646 Revert "[RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI"
This reverts commit ccfb060ecb5d7e18ea729455660484d576bde2cc.

Some tests need to to fixed before reapplying this commit.

llvm-svn: 352014
2019-01-24 03:00:26 +00:00
Ana Pazos
391736757f [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI
Summary:
Affected instructions:
PseudoLI simplest form (ADDI with X0)
ALU operations with immediate (they do not set status flag - ADDI, ORI, XORI)

Reviewers: asb

Reviewed By: asb

Subscribers: shiva0217, rkruppe, kito-cheng, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei

Differential Revision: https://reviews.llvm.org/D56526

llvm-svn: 352010
2019-01-24 02:41:40 +00:00
Ana Pazos
5d3c441a26 [RISCV] Set isReMaterializable for ORI, XORI
Reviewers: asb

Reviewed By: asb

Subscribers: asb, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei

Differential Revision: https://reviews.llvm.org/D57069

llvm-svn: 352008
2019-01-24 02:31:23 +00:00
Douglas Yung
2ba526902f [docs] Remove extra character from git URL in Getting Started guide.
llvm-svn: 352005
2019-01-24 01:22:32 +00:00
David Blaikie
e5c30b9eef llvm-symbolizer: Extract individual test cases now that it's easier to use directly (without a piped input file)
Pulling out the split-dwarf tests by way of example of how I think
llvm-symbolizer should be tested going forward. Open to
debate/discussion, though.

llvm-svn: 352004
2019-01-24 01:19:17 +00:00
Julian Lettner
c814a6a425 [Sanitizers] UBSan unreachable incompatible with ASan in the presence of noreturn calls
Summary:
UBSan wants to detect when unreachable code is actually reached, so it
adds instrumentation before every `unreachable` instruction. However,
the optimizer will remove code after calls to functions marked with
`noreturn`. To avoid this UBSan removes `noreturn` from both the call
instruction as well as from the function itself. Unfortunately, ASan
relies on this annotation to unpoison the stack by inserting calls to
`_asan_handle_no_return` before `noreturn` functions. This is important
for functions that do not return but access the the stack memory, e.g.,
unwinder functions *like* `longjmp` (`longjmp` itself is actually
"double-proofed" via its interceptor). The result is that when ASan and
UBSan are combined, the `noreturn` attributes are missing and ASan
cannot unpoison the stack, so it has false positives when stack
unwinding is used.

Changes:
  # UBSan now adds the `expect_noreturn` attribute whenever it removes
    the `noreturn` attribute from a function
  # ASan additionally checks for the presence of this attribute

Generated code:
```
call void @__asan_handle_no_return    // Additionally inserted to avoid false positives
call void @longjmp
call void @__asan_handle_no_return
call void @__ubsan_handle_builtin_unreachable
unreachable
```

The second call to `__asan_handle_no_return` is redundant. This will be
cleaned up in a follow-up patch.

rdar://problem/40723397

Reviewers: delcypher, eugenis

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D56624

llvm-svn: 352003
2019-01-24 01:06:19 +00:00
Nico Weber
a5aba5c47a gn build: Merge r351320 (the 9.0.0 version bump)
llvm-svn: 352002
2019-01-24 01:00:52 +00:00
David Callahan
0d31c41ce9 Update entry count for cold calls
Summary:
Profile sample files include the number of times each entry or inlined
call site is sampled. This is translated into the entry count metadta
on functions.

When sample data is being read, if a call site that was inlined
in the sample program is considered cold and not inlined, then
the entry count of the out-of-line functions does not reflect
the current compilation.

In this patch, we note call sites where the function was not inlined
and as a last action of the sample profile loading, we update the
called function's entry count to reflect the calls from these
call sites which are not included in the profile file.

Reviewers: danielcdh, wmi, Kader, modocache

Reviewed By: wmi

Subscribers: davidxl, eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D52845

llvm-svn: 352001
2019-01-24 00:55:23 +00:00
Douglas Yung
52ae0002e5 [llvm-symbolizer] Add support for -i and -inlines as aliases for -inlining
This change adds two options, -i and -inlines as aliases for the -inlining option to llvm-symbolizer to improve compatibility with the GNU addr2line utility which accepts these options.

It also modifies existing tests that use -inlining to exercise these new aliases as well.

This fixes PR40073.

Reviewed by: jhenderson, Quolyk, ruiu

Differential Revision: https://reviews.llvm.org/D57083

llvm-svn: 351999
2019-01-24 00:34:09 +00:00
Amara Emerson
a57b77e247 Revert "[mips] Handle MipsMCExpr sub-expression for the MEK_DTPREL tag"
This reverts commit r351987 as it broke some bots.

llvm-svn: 351998
2019-01-24 00:24:59 +00:00
Mircea Trofin
5d88f37725 [llvm] Clarify responsiblity of some of DILocation discriminator APIs
Summary:
Renamed setBaseDiscriminator to cloneWithBaseDiscriminator, to match
similar APIs. Also changed its behavior to copy over the other
discriminator components, instead of eliding them.

Renamed cloneWithDuplicationFactor to
cloneByMultiplyingDuplicationFactor, which more closely matches what
this API does.

Reviewers: dblaikie, wmi

Reviewed By: dblaikie

Subscribers: zzheng, llvm-commits

Differential Revision: https://reviews.llvm.org/D56220

llvm-svn: 351996
2019-01-24 00:10:25 +00:00
Reid Kleckner
aec41a7a6c [ADT] Notify ilist traits about in-list transfers
Summary:
Previously no client of ilist traits has needed to know about transfers
of nodes within the same list, so as an optimization, ilist doesn't call
transferNodesFromList in that case. However, now there are clients that
want to use ilist traits to cache instruction ordering information to
optimize dominance queries of instructions in the same basic block.
This change updates the existing ilist traits users to detect in-list
transfers and do nothing in that case.

After this change, we can start caching instruction ordering information
in LLVM IR data structures. There are two main ways to do that:
- by putting an order integer into the Instruction class
- by maintaining order integers in a hash table on BasicBlock

I plan to implement and measure both, but I wanted to commit this change
first to enable other out of tree ilist clients to implement this
optimization as well.

Reviewers: lattner, hfinkel, chandlerc

Subscribers: hiraditya, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D57120

llvm-svn: 351992
2019-01-23 22:59:52 +00:00
Hideki Saito
054ce2fa8a [LV][VPlan] Change to implement VPlan based predication for
VPlan-native path

Context: Patch Series #2 for outer loop vectorization support in LV
using VPlan. (RFC:
http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html).

Patch series #2 checks that inner loops are still trivially lock-step
among all vector elements. Non-loop branches are blindly assumed as
divergent.

Changes here implement VPlan based predication algorithm to compute
predicates for blocks that need predication. Predicates are computed
for the VPLoop region in reverse post order. A block's predicate is
computed as OR of the masks of all incoming edges. The mask for an
incoming edge is computed as AND of predecessor block's predicate and
either predecessor's Condition bit or NOT(Condition bit) depending on
whether the edge from predecessor block to the current block is true
or false edge.

Reviewers: fhahn, rengolin, hsaito, dcaballe

Reviewed By: fhahn

Patch by Satish Guggilla, thanks!

Differential Revision: https://reviews.llvm.org/D53349

llvm-svn: 351990
2019-01-23 22:43:12 +00:00
Peter Collingbourne
061384674e hwasan: Read shadow address from ifunc if we don't need a frame record.
This saves a cbz+cold call in the interceptor ABI, as well as a realign
in both ABIs, trading off a dcache entry against some branch predictor
entries and some code size.

Unfortunately the functionality is hidden behind a flag because ifunc is
known to be broken on static binaries on Android.

Differential Revision: https://reviews.llvm.org/D57084

llvm-svn: 351989
2019-01-23 22:39:11 +00:00
Simon Atanasyan
01e1317138 [mips] Handle MipsMCExpr sub-expression for the MEK_DTPREL tag
This is a fix for a regression introduced by the rL348194 commit. In
that change new type (MEK_DTPREL) of MipsMCExpr expression was added,
but in some places of the code this type of expression considered as
unexpected.

This change fixes the bug. The MEK_DTPREL type of expression is used for
marking TLS DIEExpr only and contains a regular sub-expression. Where we
need to handle the expression, we retrieve the sub-expression and
handle it in a common way.

llvm-svn: 351987
2019-01-23 22:02:53 +00:00
Reid Kleckner
309d17ca33 Revert r351938 "[ARM] Alter the register allocation order for minsize on Thumb2"
This change caused fatal backend errors when compiling a file in libvpx
for Android.

llvm-svn: 351979
2019-01-23 21:10:48 +00:00
Alexey Bataev
cd962467b2 [DEBUGINFO, NVPTX] Enable support for the debug info on NVPTX target.
Enable full support for the debug info.

Differential revision: https://reviews.llvm.org/D46189

llvm-svn: 351974
2019-01-23 18:59:54 +00:00
Alexey Bataev
6b763c18bf Revert "[DEBUGINFO, NVPTX] Enable support for the debug info on NVPTX target."
This reverts commit r351972. Some pieces of the patch was not applied
correctly.

llvm-svn: 351973
2019-01-23 18:48:36 +00:00
Alexey Bataev
a2dcedc345 [DEBUGINFO, NVPTX] Enable support for the debug info on NVPTX target.
Enable full support for the debug info. Recommit to fix the emission of
the not required closing brace.

Differential revision: https://reviews.llvm.org/D46189

llvm-svn: 351972
2019-01-23 18:28:59 +00:00
Craig Topper
b5d57aaae1 [X86] Autogenerate complete checks. NFC
llvm-svn: 351970
2019-01-23 18:25:49 +00:00
James Henderson
4949c8df9b [llvm-symbolizer] Improve compatibility of --functions with GNU addr2line
This fixes https://bugs.llvm.org/show_bug.cgi?id=40072.

GNU addr2line's --functions switch is off by default, has a short alias
of -f, and does not take an argument. This patch changes llvm-symbolizer
to allow the second and third point (changing the default behaviour may
have negative impacts on users). If the option is missing a value, it
now treats it as "linkage".

This change does cause one previously valid command-line to behave
differently. Before --functions <value> was accepted, but now only
--functions=<value> is allowed (as well as --functions). The old
behaviour will result in the value being treated as a positional
argument.

The previous testing for --functions=short has been pulled out into a
new test that also tests the other accepted values and option formats.

Reviewed by: ruiu

Differential Revision: https://reviews.llvm.org/D57049

llvm-svn: 351968
2019-01-23 17:27:48 +00:00
Haojian Wu
88704a4bd3 Revert "[DEBUGINFO, NVPTX] Enable support for the debug info on NVPTX target."
This reverts commit r351846.

This patch may generate illegal assembly code, see

```
$ ./bin/clang -cc1 -triple nvptx64-nvidia-cuda -aux-triple x86_64-grtev4-linux-gnu -S -disable-free -disable-llvm-verifier -discard-value-names -main-file-name new.cc -mrelocation-model pic -pic-level 2 -mthread-model posix -fmerge-all-constants -mdisable-fp-elim -relaxed-aliasing -no-integrated-as -mpie-copy-relocations -munwind-tables -fcuda-is-device -target-feature +ptx60 -target-cpu sm_35 -dwarf-column-info -debug-info-kind=line-directives-only -dwarf-version=2 -debugger-tuning=gdb -o empty.s -x cuda empty.cc
$  cat empty.s
//
// Generated by LLVM NVPTX Back-End
//

.version 6.0
.target sm_35
.address_size 64

	}
```

llvm-svn: 351966
2019-01-23 16:39:57 +00:00
Andrea Di Biagio
5d3783c0d0 [MC][X86] Correctly model additional operand latency caused by transfer delays from the integer to the floating point unit.
This patch adds a new ReadAdvance definition named ReadInt2Fpu.
ReadInt2Fpu allows x86 scheduling models to accurately describe delays caused by
data transfers from the integer unit to the floating point unit.
ReadInt2Fpu currently defaults to a delay of zero cycles (i.e. no delay) for all
x86 models excluding BtVer2. That means, this patch is only a functional change
for the Jaguar cpu model only.

Tablegen definitions for instructions (V)PINSR* have been updated to account for
the new ReadInt2Fpu. That read is mapped to the the GPR input operand.
On Jaguar, int-to-fpu transfers are modeled as a +6cy delay. Before this patch,
that extra delay was added to the opcode latency. In practice, the insert opcode
only executes for 1cy. Most of the actual latency is actually contributed by the
so-called operand-latency. According to the AMD SOG for family 16h, (V)PINSR*
latency is defined by expression f+1, where f is defined as a forwarding delay
from the integer unit to the fpu.

When printing instruction latency from MCA (see InstructionInfoView.cpp) and LLC
(only when flag -print-schedule is speified), we now need to account for any
extra forwarding delays. We do this by checking if scheduling classes declare
any negative ReadAdvance entries. Quoting a code comment in TargetSchedule.td:
"A negative advance effectively increases latency, which may be used for
cross-domain stalls". When computing the instruction latency for the purpose of
our scheduling tests, we now add any extra delay to the formula. This avoids
regressing existing codegen and mca schedule tests. It comes with the cost of an
extra (but very simple) hook in MCSchedModel.

Differential Revision: https://reviews.llvm.org/D57056

llvm-svn: 351965
2019-01-23 16:35:07 +00:00
James Henderson
d701db82cf [llvm-readelf] Don't suppress static symbol table with --dyn-symbols + --symbols
In r287786, a bug was introduced into llvm-readelf where it didn't print
the static symbol table if both --symbols and --dyn-symbols were
specified, even if there was no dynamic symbol table. This is obviously
incorrect.

This patch fixes this issue, by delegating the decision of which symbol
tables should be printed to the final dumper, rather than trying to
decide in the command-line option handling layer. The decision was made
to follow the approach taken in this patch because the LLVM style dumper
uses a different order to the original GNU style behaviour (and GNU
readelf) for ELF output. Other approaches resulted in behaviour changes
for other dumpers which felt wrong. In particular, I wanted to avoid
changing the order of the output for --symbols --dyn-symbols for LLVM
style, keep what is emitted by --symbols unchanged for all dumpers, and
avoid having different orders of .dynsym and .symtab dumping for GNU
"--symbols" and "--symbols --dyn-symbols".

Reviewed by: grimar, rupprecht

Differential Revision: https://reviews.llvm.org/D57016

llvm-svn: 351960
2019-01-23 16:15:39 +00:00
Simon Pilgrim
5b603a4027 Fix indentation. NFCI.
llvm-svn: 351958
2019-01-23 16:01:19 +00:00
Simon Pilgrim
53cb95b13e [IR] Match intrinsic parameter by scalar/vectorwidth
This patch replaces the existing LLVMVectorSameWidth matcher with LLVMScalarOrSameVectorWidth.

The matching args must be either scalars or vectors with the same number of elements, but in either case the scalar/element type can differ, specified by LLVMScalarOrSameVectorWidth.

I've updated the _overflow intrinsics to demonstrate this - allowing it to return a i1 or <N x i1> overflow result, matching the scalar/vectorwidth of the other (add/sub/mul) result type.

The masked load/store/gather/scatter intrinsics have also been updated to use this, although as we specify the reference type to be llvm_anyvector_ty we guarantee the mask will be <N x i1> so no change in behaviour

Differential Revision: https://reviews.llvm.org/D57090

llvm-svn: 351957
2019-01-23 16:00:22 +00:00
Krzysztof Parzyszek
e0e9bde045 [Hexagon] Remove incorrect bit negation
llvm-svn: 351956
2019-01-23 15:36:33 +00:00
Benjamin Kramer
ca8adadeee [AArch64] Fix out of bounds strlen
CFIInst is not zero-terminated. This is one of more annoying functional
differences between StringRef and ArrayRef.

Found by asan.

llvm-svn: 351955
2019-01-23 14:51:21 +00:00
Clement Courbet
6a2ddc7b79 Re-land rL322538 "Add a value_type to ArrayRef."
llvm-svn: 351954
2019-01-23 14:20:59 +00:00
Simon Pilgrim
20dbf82008 Move saturated arithmetic intrinsics to other integer intrinsics. NFCI.
They were in the floating point group.

llvm-svn: 351953
2019-01-23 13:49:10 +00:00
George Rimar
1f9e83d373 [llvm-objdump] - Move common code to a new printRelocation() helper. NFC.
This extracts the common code for printing relocations into a new helper function.

llvm-svn: 351951
2019-01-23 13:39:12 +00:00
Tim Renouf
388d17336e [AMDGPU] With XNACK, cannot clause a load with result coalesced with operand
Summary:
With XNACK, an smem load whose result is coalesced with an operand (thus
it overwrites its own operand) cannot appear in a clause, because some
other instruction might XNACK and restart the whole clause.

The clause breaker already realized that an smem that overwrites an
operand cannot appear in a clause, and broke the clause. The problem
that this commit fixes is that the SIFormMemoryClauses optimization
formed a bundle with early clobber, which caused the earlier code that
set up the coalesced operand to be removed as dead.

Differential Revision: https://reviews.llvm.org/D57008

Change-Id: I703c4d5b0bf7d6060222bec491f45c18bb3c0016
llvm-svn: 351950
2019-01-23 13:38:06 +00:00
Martin Storsjo
da693adf63 [llvm-objcopy] [COFF] Error out on use of unhandled options
Prefer erroring out than silently not doing what was requested.

Differential Revision: https://reviews.llvm.org/D57045

llvm-svn: 351948
2019-01-23 11:54:55 +00:00
Martin Storsjo
9d872b4a9a [llvm-objcopy] [COFF] Fix handling of aux symbols for big objects
The aux symbols were stored in an opaque std::vector<uint8_t>,
with contents interpreted according to the rest of the symbol.

All aux symbol types but one fit in 18 bytes (sizeof(coff_symbol16)),
and if written to a bigobj, two extra padding bytes are written (as
sizeof(coff_symbol32) is 20). In the storage agnostic intermediate
representation, store the aux symbols as a series of coff_symbol16
sized opaque blobs. (In practice, all such aux symbols only consist
of one aux symbol, so this is more flexible than what reality needs.)

The special case is the file aux symbols, which are written in
potentially more than one aux symbol slot, without any padding,
as one single long string. This can't be stored in the same opaque
vector of fixed sized aux symbol entries. The file aux symbols will
occupy a different number of aux symbol slots depending on the type
of output object file. As nothing in the intermediate process needs
to have accurate raw symbol indices, updating that is moved into the
writer class.

Differential Revision: https://reviews.llvm.org/D57009

llvm-svn: 351947
2019-01-23 11:54:51 +00:00
Martin Storsjo
ed23b6aaef [llvm-objcopy] [COFF] Remove testcase debugging lines. NFC.
These are no longer necessary as the testcase now seems to run fine
on the buildbots that previously failed on this case, after SVN r351934.

llvm-svn: 351946
2019-01-23 11:54:36 +00:00
Florian Hahn
311cd51eee [HotColdSplitting] Remove unused SSAUpdater.h include (NFC).
llvm-svn: 351945
2019-01-23 11:51:38 +00:00