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Commit Graph

39 Commits

Author SHA1 Message Date
Tony Tye
c6ca5de42a [AMDGPU] Correct targets that support XNACK
Differential Revision: https://reviews.llvm.org/D39887

llvm-svn: 317955
2017-11-11 00:50:32 +00:00
Tony Tye
8565b815bb [AMDGPU] AMDGPUUsage.rst minor corrections
Differential Revision: https://reviews.llvm.org/D39887

llvm-svn: 317924
2017-11-10 20:51:43 +00:00
Tony Tye
34f9af3e72 [AMDGPU] Update code object description
- Use ELF header flags to identify processor.
 - Remove isa note record.
 - Add target feature section.
 - Make metadata for NumVGPRs, NumSGPRs and MaxFlatWorkGroupSize required.
 - Add FixedWorkGroupSize to CodeProps metadata.
 - Add ReqdWorkGroupSize* to kernel descriptor and move MaxFlatWorkGroupSize to be adjacent.
 - Move IsXNACKEnabled in the kernel descriptor to be at the end of the unused flags.
 - Remove IsDynamicCallStack from the metadata and kernel descriptor.
 - Remove legacy debugger metadata.
 - Remove old XNACK enabled processor names.

Differential Revision: https://reviews.llvm.org/D39828

llvm-svn: 317855
2017-11-10 01:00:54 +00:00
Yaxun Liu
3938c6fc0d [AMDGPU] Emit metadata for hidden arguments for kernel enqueue
Identifies kernels which performs device side kernel enqueues and emit
metadata for the associated hidden kernel arguments. Such kernels are
marked with calls-enqueue-kernel function attribute by
AMDGPUOpenCLEnqueueKernelLowering pass and later on
hidden kernel arguments metadata HiddenDefaultQueue and
HiddenCompletionAction are emitted for them.

Differential Revision: https://reviews.llvm.org/D39255

llvm-svn: 316907
2017-10-30 14:30:28 +00:00
Konstantin Zhuravlyov
7a82a9a25a AMDGPU/Docs: Fix unreadable characters
llvm-svn: 316171
2017-10-19 17:12:55 +00:00
Tony Tye
c945450d2b [AMDGPU] Corrections to memory model description.
- Add description on nontemporal support.
 - Correct OpenCL sequentially consistent and fence code sequences.
 - Minor test cleanup.

Differential Revision: https://reviews.llvm.org/D39073

llvm-svn: 316131
2017-10-18 22:16:55 +00:00
Konstantin Zhuravlyov
b15b2bcacc AMDGPU/Docs: Make target naming consistent
- R600 Arch: Use Radeon HD XXXX Series
  - GCN Arch: Use GFXX

Differential Revision: https://reviews.llvm.org/D39019

llvm-svn: 316100
2017-10-18 17:59:20 +00:00
Konstantin Zhuravlyov
762f1d9a9a AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consistency
Differential Revision: https://reviews.llvm.org/D38957

llvm-svn: 316097
2017-10-18 17:31:09 +00:00
Tony Tye
9d875a6ad4 Add base relative relocation record that can be used for the following case (OpenCL example):
static __global int Var = 0; 
__global int* Ptr[] = {&Var};
...

In this case Var is a non premptable symbol and so its address can be used as the value of Ptr, with a base relative relocation that will add the delta between the ELF address and the actual load address. Such relocations do not require a symbol.

Differential Revision: https://reviews.llvm.org/D38909

llvm-svn: 315935
2017-10-16 20:44:29 +00:00
Konstantin Zhuravlyov
6ed2d5b556 AMDGPU: Add AMDGPU HSA Kernel Descriptor
- Update docs to match llvm coding style
  - Add missing FP16_OVFL bit for gfx9
  - Fix the size of the kernel descriptor in the docs

Differential Revision: https://reviews.llvm.org/D38902

llvm-svn: 315822
2017-10-14 19:17:08 +00:00
Konstantin Zhuravlyov
d68ff516d3 AMDGPU: Bring HSA metadata on par with the specification
Differential Revision: https://reviews.llvm.org/D38753

llvm-svn: 315821
2017-10-14 19:03:51 +00:00
Yaxun Liu
d75bc90d2a [AMDGPU] Lower enqueued blocks and generate runtime metadata
This patch adds a post-linking pass which replaces the function pointer of enqueued
block kernel with a global variable (runtime handle) and adds
runtime-handle attribute to the enqueued block kernel.

In LLVM CodeGen the runtime-handle metadata will be translated to
RuntimeHandle metadata in code object. Runtime allocates a global buffer
for each kernel with RuntimeHandel metadata and saves the kernel address
required for the AQL packet into the buffer. __enqueue_kernel function
in device library knows that the invoke function pointer in the block
literal is actually runtime handle and loads the kernel address from it
and puts it into AQL packet for dispatching.

This cannot be done in FE since FE cannot create a unique global variable
with external linkage across LLVM modules. The global variable with internal
linkage does not work since optimization passes will try to replace loads
of the global variable with its initialization value.

Differential Revision: https://reviews.llvm.org/D38610

llvm-svn: 315352
2017-10-10 19:39:48 +00:00
Konstantin Zhuravlyov
7ec1e6fa4f AMDGPU/Docs: Follow up on review feedback in https://reviews.llvm.org/D38387
llvm-svn: 314848
2017-10-03 21:18:03 +00:00
Konstantin Zhuravlyov
dd0f62bde0 AMDGPU: Add ELFOSABI_AMDGPU_MESA3D
Differential Revision: https://reviews.llvm.org/D38387

llvm-svn: 314846
2017-10-03 21:14:14 +00:00
Konstantin Zhuravlyov
faac723406 AMDGPU: Add ELFOSABI_AMDGPU_PAL
llvm-svn: 314843
2017-10-03 20:54:07 +00:00
Tony Tye
f0d2249fbf Update AMDGPUUsage.rst documentation:
1. Correct description of the kernel initial state for FLAT_SCRATCH_INIT.
    2. Add link to GFX9 architecture documentation.
    3. Update product names.
    4. Rename note record from NT_AMD_AMDGPU_METADATA to NT_AMD_AMDGPU_HSA_METADATA and move description to the AMDHSA coding convention section.
    5. Minor typo corrections.

Differential Revision: https://reviews.llvm.org/D36549

llvm-svn: 310954
2017-08-15 20:47:41 +00:00
Konstantin Zhuravlyov
d11811f3e7 AMDGPU: Also remove SI from docs
Differential Revision: https://reviews.llvm.org/D36424

llvm-svn: 310335
2017-08-08 04:28:31 +00:00
Tony Tye
2e2fda4b55 Correct GFX9 processor names.
Differential Revision: https://reviews.llvm.org/D33736

llvm-svn: 307353
2017-07-07 03:10:01 +00:00
Sylvestre Ledru
ae4d64b957 fix various typos
llvm-svn: 306262
2017-06-26 02:45:39 +00:00
Tony Tye
450e450b48 Correct AMDGPU Hawaii and Kabini target names
The FirePro and Radeon versions of Hawaii have different 64 bit floating point configurations so use distinct target names for them. Rename the target name for Kabini to accommodate.

Differential Revision: https://reviews.llvm.org/D34016

llvm-svn: 304959
2017-06-08 01:47:25 +00:00
Tony Tye
724bf48200 Try to work around possible bugs in version of Shpinx on buildserver.
Builds sucessfully with Sphinx v1.5.5

Differential Revision: https://reviews.llvm.org/D33736

llvm-svn: 304853
2017-06-07 00:46:08 +00:00
Tony Tye
e196baa8c0 Add documentation for various aspects of the AMDGPU backend.
Remove extra tabs.
Builds sucessfully with Sphinx v1.5.5

Differential Revision: https://reviews.llvm.org/D33736

llvm-svn: 304848
2017-06-07 00:08:35 +00:00
Tony Tye
44bb2c5151 Add documentation for various aspects of the AMDGPU backend.
Differential Revision: https://reviews.llvm.org/D33736

llvm-svn: 304831
2017-06-06 20:31:59 +00:00
Aaron Ballman
9bba36cdac Fixing a malformed RST table to get the documentation bot back to green.
llvm-svn: 301545
2017-04-27 14:33:01 +00:00
Matt Arsenault
237f3db4bd AMDGPU: Move trap lowering to DAG
Fixes traps in any block besides the entry block,
and fixes depending on a live-in physical register
by using a virtual register copy.

Also happens to stop emitting a nop in the case
debug trap is not supported.

llvm-svn: 301206
2017-04-24 17:49:13 +00:00
Konstantin Zhuravlyov
086cf9de9d [DebugInfo] Emit address space with DW_AT_address_class attribute for pointer and reference types
Differential Revision: https://reviews.llvm.org/D29670

llvm-svn: 297320
2017-03-08 23:55:44 +00:00
Wei Ding
98a8a85308 AMDGPU : AMDGPU : Update AMDGPU Trap Handler ABI.
Differential Revision: http://reviews.llvm.org/D29913

llvm-svn: 295745
2017-02-21 18:48:01 +00:00
Aaron Ballman
ae179535c0 Correcting several sphinx errors; should fix the LLVM documentation build.
llvm-svn: 294865
2017-02-11 18:45:24 +00:00
Wei Ding
3609e1230f AMDGPU : Add trap handler support.
Differential Revision: http://reviews.llvm.org/D26010

llvm-svn: 294692
2017-02-10 02:15:29 +00:00
Sylvestre Ledru
f96210978c fix some typos in the doc
llvm-svn: 292014
2017-01-14 11:37:01 +00:00
Nikolay Haustov
9a2d1330f7 AMDGPU: Improve documentation.
Summary:
Add links to ISA manuals and ABI.
Add text about assembler syntax.
Add info about instructions operands.
Add instruction examples for each encoding.
Update directives section, add missing .amdgpu_hsa_kernel.

Reviewers: tstellarAMD, SamWot, vpykhtin

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, artem.tamazov, llvm-commits

Differential Revision: https://reviews.llvm.org/D24724

llvm-svn: 281962
2016-09-20 09:04:51 +00:00
Aaron Ballman
694aef5995 This code block breaks the docs build (http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/11920/steps/docs-llvm-html/logs/stdio), but I cannot see anything immediately wrong with it and cannot reproduce the diagnostic locally. Setting the code highlighting to none instead of nasm to hopefully get the bot stumbling back towards green.
llvm-svn: 275998
2016-07-19 17:46:55 +00:00
Aaron Ballman
2039ea75ff Speculatively fix the sphinx build, which does not think the original code was valid nasm (http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/11854/steps/docs-llvm-html/logs/stdio).
llvm-svn: 275408
2016-07-14 13:08:16 +00:00
Tom Stellard
f352d0cd70 AMDGPU: Document address space mapping
Summary:
Address space mapping is described in lib/Target/AMDGPU/AMDGPU.h in
Doxygen comments. This patch adds the description to user guide for
AMDGPU back-end.

Patch By: Vedran Miletić

Reviewers: tstellarAMD, arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17046

llvm-svn: 265500
2016-04-06 01:29:19 +00:00
Sylvestre Ledru
d91024096e fix the indentation of the example
llvm-svn: 261628
2016-02-23 11:17:27 +00:00
Tom Stellard
f0367cd046 docs/AMDGPUUsage: Update assembly example
Reviewers: arsenm, nhaustov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17461

llvm-svn: 261550
2016-02-22 18:36:00 +00:00
Tom Stellard
ff6108f813 AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10772

llvm-svn: 240839
2015-06-26 21:58:31 +00:00
Tom Stellard
daced4c4cc AMDGPU/SI: Add hsa code object directives
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10757

llvm-svn: 240831
2015-06-26 21:15:07 +00:00
Tom Stellard
3f1708598e R600 -> AMDGPU rename
llvm-svn: 239657
2015-06-13 03:28:10 +00:00