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Commit Graph

279 Commits

Author SHA1 Message Date
Chad Rosier
07b6e758e1 [fast-isel] ARMEmitCmp generates FMSTAT, which transfers the floating-point
condition flags to CPSR.  This allows us to simplify SelectCmp.
Patch by Zonr Chang <zonr.xchg@gmail.com>.

llvm-svn: 152243
2012-03-07 20:59:26 +00:00
Lang Hames
a49054ac9c Split fpscr into two registers: FPSCR and FPSCR_NZCV.
The fpscr register contains both flags (set by FP operations/comparisons) and
control bits. The control bits (FPSCR) should be reserved, since they're always
available and needn't be defined before use. The flag bits (FPSCR_NZCV) should
like to be unreserved so they can be hoisted by MachineCSE. This fixes PR12165.

llvm-svn: 152076
2012-03-06 00:19:55 +00:00
Jim Grosbach
cd931af452 ARM use the right opcode for FP<->Integer move in fast-isel.
rdar://10965031

llvm-svn: 151850
2012-03-01 22:47:09 +00:00
Jakob Stoklund Olesen
a199ee0be3 Switch ARM target to register masks.
I'll let the buildbots determine the compile time improvements from this
change, but 464.h264ref has 5% faster codegen at -O2.

This patch does cause some assembly changes.  Branch folding can make
different decisions about calls with dead return values.
CriticalAntiDepBreaker may choose different registers because its
liveness tracking is affected.  MachineCopyPropagation may sometimes
leave a dead copy behind.

llvm-svn: 151331
2012-02-24 01:19:29 +00:00
Craig Topper
3ed929de0a Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified.
llvm-svn: 151134
2012-02-22 05:59:10 +00:00
Chad Rosier
7867a0bd92 [fast-isel] Add support for returning non-legal types with no sign- or zero-
entend flag.

llvm-svn: 150774
2012-02-17 01:21:28 +00:00
Chad Rosier
63d3cbe3db Remove unnecessary assignment to temporary, ResultReg.
llvm-svn: 150737
2012-02-16 22:45:33 +00:00
Chad Rosier
05263042a0 Add braces to if clause to make symmetric with associate else clause.
llvm-svn: 150591
2012-02-15 17:36:21 +00:00
Chad Rosier
00614de9ff Use a temporary variable, rather then a series of redundant calls.
llvm-svn: 150536
2012-02-15 00:23:55 +00:00
Chad Rosier
253ed7de62 Remove unnecessary assignment to temporary, ResultReg.
llvm-svn: 150520
2012-02-14 22:29:48 +00:00
Chad Rosier
b70d1dfae6 [fast-isel] Add support for SUBs with non-legal types.
llvm-svn: 150047
2012-02-08 02:45:44 +00:00
Chad Rosier
1ef78d6989 [fast-isel] Add support for ORs with non-legal types.
llvm-svn: 150045
2012-02-08 02:29:21 +00:00
Chad Rosier
26610906f0 [fast-isel] Add support for indirect branches.
llvm-svn: 150014
2012-02-07 23:56:08 +00:00
Craig Topper
11bcb12b5e Convert assert(0) to llvm_unreachable
llvm-svn: 149961
2012-02-07 02:50:20 +00:00
Chad Rosier
945ab43c4f [fast-isel] Add support for ADDs with non-legal types.
llvm-svn: 149934
2012-02-06 23:50:07 +00:00
Duncan Sands
cc472eec96 Persuade GCC that there is nothing worth warning about here (there isn't).
llvm-svn: 149834
2012-02-05 14:20:11 +00:00
Chad Rosier
a6e543e80b [fast-isel] Add support for URem.
llvm-svn: 149716
2012-02-03 21:23:45 +00:00
Chad Rosier
6de31d433d [fast-isel] Rename isZExt to isSigned. No functional change intended.
llvm-svn: 149714
2012-02-03 21:14:11 +00:00
Chad Rosier
fc667757e8 [fast-isel] Add support for UDIV.
llvm-svn: 149712
2012-02-03 21:07:27 +00:00
Chad Rosier
cff3c98417 [fast-isel] Add support for FPToUI. Also add test cases for FPToSI.
llvm-svn: 149706
2012-02-03 20:27:51 +00:00
Chad Rosier
40b3e74387 [fast-isel] Add support for selecting UIToFP.
llvm-svn: 149704
2012-02-03 19:42:52 +00:00
David Blaikie
06ecc99a56 More dead code removal (using -Wunreachable-code)
llvm-svn: 148578
2012-01-20 21:51:11 +00:00
Eric Christopher
d2436427b5 Fix assert.
llvm-svn: 147966
2012-01-11 20:55:27 +00:00
Jakob Stoklund Olesen
8db266fafb Match SelectionDAG logic for enabling movt.
Darwin doesn't do static, and ELF targets only support static.

llvm-svn: 147740
2012-01-07 20:49:15 +00:00
Jakob Stoklund Olesen
71f92061aa Use getRegForValue() to materialize the address of ARM globals.
This enables basic local CSE, giving us 20% smaller code for
consumer-typeset in -O0 builds.

<rdar://problem/10658692>

llvm-svn: 147720
2012-01-07 04:07:22 +00:00
Jakob Stoklund Olesen
536b4e24d8 Use movw+movt in ARMFastISel::ARMMaterializeGV.
This eliminates a lot of constant pool entries for -O0 builds of code
with many global variable accesses.

This speeds up -O0 codegen of consumer-typeset by 2x because the
constant island pass no longer has to look at thousands of constant pool
entries.

<rdar://problem/10629774>

llvm-svn: 147712
2012-01-07 01:47:05 +00:00
Evan Cheng
46b085721a ARM target code clean up. Check for iOS, not Darwin where it makes sense.
llvm-svn: 146981
2011-12-20 18:26:50 +00:00
Chad Rosier
879f983406 VFP2 is required for FP loads. Noticed by inspection.
llvm-svn: 146569
2011-12-14 17:55:03 +00:00
Chad Rosier
4cb75ebb48 Tidy up.
llvm-svn: 146568
2011-12-14 17:32:02 +00:00
Chad Rosier
c642144c4e Fix 80-column violation and extraneous brackets.
llvm-svn: 146566
2011-12-14 17:26:05 +00:00
Evan Cheng
68ba5536f3 - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def
  and use lists of the BUNDLE instruction) and a pass to unpack bundles.
- Teach more of MachineBasic and MachineInstr methods to be bundle aware.
- Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to
  prevent IT blocks from being broken apart.

llvm-svn: 146542
2011-12-14 02:11:42 +00:00
Chad Rosier
8af97606a9 [fast-isel] Unaligned loads of floats are not supported. Therefore, convert to a regular
load and then move the result from a GPR to a FPR.

llvm-svn: 146502
2011-12-13 19:22:14 +00:00
Evan Cheng
1acd685d87 Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026
2011-12-07 07:15:52 +00:00
Chad Rosier
70dd1f98af [arm-fast-isel] Doublewords only require word-alignment.
rdar://10528060

llvm-svn: 145891
2011-12-06 01:44:17 +00:00
Bob Wilson
f054e82281 Fix 80-column issues.
llvm-svn: 145783
2011-12-04 00:52:23 +00:00
Chad Rosier
d1968c9ed6 [arm-fast-isel] Unaligned stores of floats require special care.
rdar://10510150

llvm-svn: 145742
2011-12-03 02:21:57 +00:00
Nick Lewycky
7d0d3c2d58 Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.

llvm-svn: 145714
2011-12-02 22:16:29 +00:00
Chad Rosier
b3b2871bbf [arm-fast-isel] After promoting a function parameter be sure to update the
argument value type.  Otherwise, the sign/zero-extend has no effect on arguments
passed via the stack (i.e., undefined high-order bits).
rdar://10515467

llvm-svn: 145701
2011-12-02 20:25:18 +00:00
Duncan Sands
ec13954efd Silence wrong warnings from GCC about variables possibly being used
uninitialized: GCC doesn't understand that the variables are only used
if !UseImm, in which case they have been initialized.

llvm-svn: 145239
2011-11-28 10:31:27 +00:00
Chad Rosier
70dab03f8e Guard call to getRegForValue with isTypeLegal check to avoid unnecessary work/dead code.
llvm-svn: 144959
2011-11-18 01:17:34 +00:00
Chad Rosier
7d2af13ccb Add TODO comment.
llvm-svn: 144920
2011-11-17 21:46:13 +00:00
Chad Rosier
47928b03f3 Dead code.
llvm-svn: 144888
2011-11-17 07:24:49 +00:00
Chad Rosier
c9ed1d9072 Don't unconditionally set the kill flag.
rdar://10456186

llvm-svn: 144872
2011-11-17 01:16:53 +00:00
Chad Rosier
69f9c432a6 Check to make sure we can select the instruction before trying to put the
operands into a register.  Otherwise, we may materialize dead code.

llvm-svn: 144805
2011-11-16 18:39:44 +00:00
Chad Rosier
17577c9394 Add FIXME comment.
llvm-svn: 144743
2011-11-16 00:32:20 +00:00
Jay Foad
7d05fea7f8 Remove some unnecessary includes of PseudoSourceValue.h.
llvm-svn: 144631
2011-11-15 07:24:32 +00:00
Chad Rosier
4e05d7f12c Supporting inline memmove isn't going to be worthwhile. The only way to avoid
violating a dependency is to emit all loads prior to stores.  This would likely
cause a great deal of spillage offsetting any potential gains.

llvm-svn: 144585
2011-11-14 23:04:09 +00:00
Chad Rosier
48b92815e0 Add support for inlining small memcpys.
rdar://10412592

llvm-svn: 144578
2011-11-14 22:46:17 +00:00
Chad Rosier
8aa8f14940 Fix a performance regression from r144565. Positive offsets were being lowered
into registers, rather then encoded directly in the load/store.

llvm-svn: 144576
2011-11-14 22:34:48 +00:00
Chad Rosier
65395ac4d0 Add support for Thumb load/stores with negative offsets.
rdar://10412592

llvm-svn: 144565
2011-11-14 20:22:27 +00:00