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Author SHA1 Message Date
Jim Grosbach
90aca3a6bf Teach the MC disassembler to handle vmov.f32 and vmov.f64 immediate to register 
moves. Previously, the immediate was printed as the encoded integer value,
which is incorrect.

llvm-svn: 114021
 2010-09-15 21:04:54 +00:00
Jim Grosbach
2699e92c0e move getRegisterNumbering() to out of ARMBaseRegisterInfo into the helper 
functions in ARMBaseInfo.h so it can be used in the MC library as well.
For anything bigger than this, we may want a means to have a small support
library for shared helper functions like this. Cross that bridge when we
come to it.

llvm-svn: 114016
 2010-09-15 20:26:25 +00:00
Eli Friedman
b5aea103fc PR7959: Handle negative scales in GEPs correctly in BasicAA for non-64-bit 
targets.

llvm-svn: 114015
 2010-09-15 20:08:03 +00:00
Jim Grosbach
c85818a952 simplify getRegisterNumbering(). Remove the unused isSPVFP argument and 
merge the common cases.

llvm-svn: 114013
 2010-09-15 19:52:17 +00:00
Jim Grosbach
8a4ae35eed Refactor uses of getRegisterNumbering() to not need the isSPVFP argument. Check 
if the register is a member of the SPR register class directly instead.

llvm-svn: 114012
 2010-09-15 19:44:57 +00:00
Jim Grosbach
c0b045a0ef Reduce dependencies in the ARM MC instruction printer. 
llvm-svn: 114009
 2010-09-15 19:27:50 +00:00
Jim Grosbach
c74aeaa1c2 Fix spelling typo. 
llvm-svn: 114008
 2010-09-15 19:26:50 +00:00
Jim Grosbach
00f9682efa Factor out basic enums and hleper functions from ARM.h for cleaner sharing 
between the compiler back end and the MC libraries.

llvm-svn: 114007
 2010-09-15 19:26:06 +00:00
Jim Grosbach
62fb975e6e Add support for floating point immediates to MC instruction printing. ARM 
VFP instructions use it for loading some constants, so implement that
handling.

Not thrilled with adding a member to MCOperand, but not sure there's much of
a better option that's not pretty fragile (like putting a double in the
union instead and just assuming that's good enough). Suggestions welcome...

llvm-svn: 113996
 2010-09-15 18:47:08 +00:00
Devang Patel
e15f83013d Check bb to ensure that alloca is in separate basic block. 
This fixes funcargs.exp regression reported by gdb testsuite.

llvm-svn: 113992
 2010-09-15 18:13:55 +00:00
Jakob Stoklund Olesen
36aeeb67c3 Recognize VST1q64Pseudo and VSTMQ as stack slot stores. 
Recognize VLD1q64Pseudo as a stack slot load.

Reject these if they are loading or storing a subregister. The API (and
VirtRegRewriter) doesn't know how to deal with that.

llvm-svn: 113985
 2010-09-15 17:27:09 +00:00
Bob Wilson
e7e2f983e5 Reapply Gabor's 113839, 113840, and 113876 with a fix for a problem 
encountered while building llvm-gcc for arm.  This is probably the same issue
that the ppc buildbot hit. llvm::prior works on a MachineBasicBlock::iterator,
not a plain MachineInstr.

llvm-svn: 113983
 2010-09-15 17:12:08 +00:00
Gabor Greif
f7635897c8 the darwin9-powerpc buildbot keeps consistently crashing, 
backing out following to get it back to green,
so I can investigate in peace:

svn merge -c -113840  llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll
svn merge -c -113876 -c -113839 llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp

llvm-svn: 113980
 2010-09-15 16:53:07 +00:00
Jakob Stoklund Olesen
4a043370c4 Move ARM is{LoadFrom,StoreTo}StackSlot closer to their siblings so they won't be 
forgotten in the future.

Coalesce identical cases in switch.

No functional changes intended.

llvm-svn: 113979
 2010-09-15 16:36:26 +00:00
Bob Wilson
eb520cd057 Spelling fix. 
llvm-svn: 113978
 2010-09-15 16:28:21 +00:00
Jim Grosbach
b72d8c744a trailing whitespace and 80 column cleanup 
llvm-svn: 113977
 2010-09-15 16:24:01 +00:00
Jim Grosbach
611e7708d3 trailing whitespace 
llvm-svn: 113975
 2010-09-15 16:08:15 +00:00
Mikhail Glushenkov
649b391de6 llvmc: make -x work with unknown suffixes. 
llvm-svn: 113972
 2010-09-15 15:20:41 +00:00
Garrison Venn
e389929186 Removed TracingBrainF from examples Makefile. 
llvm-svn: 113970
 2010-09-15 14:55:32 +00:00
Devang Patel
fbc9fca6ac If dbg.declare from non-entry block is using alloca from entry block then use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info. 
llvm-svn: 113967
 2010-09-15 14:48:53 +00:00
Duncan Sands
918ad44a58 Release-Asserts no longer exists. 
llvm-svn: 113965
 2010-09-15 12:30:35 +00:00
Duncan Sands
2b3ed03649 Remove the Ada bindings which are unmaintained and unused. The project which 
was the main putative user of the binding is actually maintaining its own
different binding, see http://git.ada.cx/cgi-bin/cgit.cgi/draco.git/

llvm-svn: 113960
 2010-09-15 08:17:10 +00:00
Duncan Sands
e2be7b75b2 Remove LLVM_GLOBAL_VISIBILITY, which is unused, and was not working properly. 
The problem was that the test for whether a compiler supports it or not was
inaccurate, but has to be accurate: LLVM_LOCAL_VISIBILITY is an optimization
and not needed for correctness, so wrongly thinking a compiler doesn't support
it is not a big deal, but LLVM_GLOBAL_VISIBILITY is for correctness, and not
an optimization: getting it wrong is fatal: it needs to be set based on a
configure test not testing the gcc version.  Since dragonegg has moved to a
different scheme, and it was the only user of LLVM_GLOBAL_VISIBILITY, just
remove this macro.

llvm-svn: 113959
 2010-09-15 08:09:55 +00:00
Chris Lattner
fff8e3495b lcall and ljmp always default to lcalll and ljmpl. This finally 
wraps up r8418316

llvm-svn: 113949
 2010-09-15 05:30:20 +00:00
Chris Lattner
726aae87ee apparently jmpl $1,$2 is an alias for ljmpl, similiarly 
for call.  Add this.

llvm-svn: 113948
 2010-09-15 05:25:21 +00:00
Chris Lattner
5b8a3129a5 Disambiguate lcall/ljmp to the 32-bit version. This happens 
even in 64-bit mode apparently.

llvm-svn: 113945
 2010-09-15 05:14:54 +00:00
Chris Lattner
e542e3e2ad fix the encoding of sldt GR16 to have the 0x66 prefix, and 
add sldt GR32, which isn't documented in the intel manual
but which gas accepts.  Part of rdar://8418316

llvm-svn: 113938
 2010-09-15 04:45:10 +00:00
Chris Lattner
c4a2e044f3 implement aliases for shld/shrd, part of rdar://8418316 
llvm-svn: 113937
 2010-09-15 04:37:18 +00:00
Chris Lattner
ad73a2623c fix rdar://8431880 - rcl/rcr with no shift amount not recognized 
llvm-svn: 113936
 2010-09-15 04:33:27 +00:00
Chris Lattner
c48bd41698 add various broken forms of fnstsw. I didn't add the %rax 
version because it adds a prefix and makes even less sense
than the other broken forms.  This wraps up rdar://8431422

llvm-svn: 113932
 2010-09-15 04:15:16 +00:00
Chris Lattner
b6167a8674 add some aliases for f[u]comi, part of rdar://8431422 
llvm-svn: 113930
 2010-09-15 04:08:38 +00:00
Chris Lattner
c9f1a5cd94 add a bunch of aliases for fp operations with no operand, 
rdar://8431422

llvm-svn: 113929
 2010-09-15 04:04:33 +00:00
Michael J. Spencer
aa187e9b54 test: Fix coff-dump section array indicies to 1 based to match file format. 
llvm-svn: 113928
 2010-09-15 03:58:51 +00:00
Michael J. Spencer
02665c9d92 Tabs to spaces 
llvm-svn: 113927
 2010-09-15 03:58:39 +00:00
Michael J. Spencer
ef888b5023 Cleanup coff-dump.py 
llvm-svn: 113926
 2010-09-15 03:58:24 +00:00
Daniel Dunbar
14e18ee412 lit: Expose FileBasedTest object and Test module via 'lit' object that gets 
exposed to config files.

llvm-svn: 113923
 2010-09-15 03:52:38 +00:00
Daniel Dunbar
24c29a251d lit: Rename main lit module to main.py, lit/lit/lit.py was a bit too, err, 
alliterate.

llvm-svn: 113922
 2010-09-15 03:52:31 +00:00
Chris Lattner
a9a15c74b1 Diagnose invalid instructions like "incl" with "too few operands for instruction" 
instead of crashing.  This fixes:
rdar://8431815 - crash when invalid operand is one that isn't present

llvm-svn: 113921
 2010-09-15 03:50:11 +00:00
Bob Wilson
57c4ffb2f3 Use float64 instead of int64 vector elements for NEON vget_low and vget_high 
functions, since int64 is not a legal type and using it leads to inefficient
code.  PR8036.

llvm-svn: 113919
 2010-09-15 01:52:33 +00:00
Bob Wilson
9d68270b2e Use VLD1/VST1 pseudo instructions for loadRegFromStackSlot and 
storeRegToStackSlot.

llvm-svn: 113918
 2010-09-15 01:48:05 +00:00
Jim Grosbach
050a857211 trailing whitespace 
llvm-svn: 113915
 2010-09-15 01:01:45 +00:00
Dale Johannesen
c7739ca945 Add x86MMX a few more places. 
llvm-svn: 113914
 2010-09-15 00:52:23 +00:00
Chris Lattner
8729e47b8f fix PR8144, a bug where constant merge would merge globals marked 
attribute(used).

llvm-svn: 113911
 2010-09-15 00:30:11 +00:00
Jim Grosbach
901a646188 Reapply r113875 with additional cleanups. 
"The register specified for a dregpair is the corresponding Q register, so to
get the pair, we need to look up the sub-regs based on the qreg. Create a
lookup function since we don't have access to TargetRegisterInfo here to
be able to use getSubReg(ARM::dsub_[01])."

Additionaly, fix the NEON VLD1* and VST1* instruction patterns not to use
the dregpair modifier for the 2xdreg versions. Explicitly specifying the two
registers as operands is more correct and more consistent with the other
instruction patterns. This enables further cleanup of special case code in the
disassembler as a nice side-effect.

llvm-svn: 113903
 2010-09-14 23:54:06 +00:00
Chris Lattner
cd4eadce11 add a terrible hack to allow out with dx is parens, a gas bug. 
This fixes PR8114

llvm-svn: 113894
 2010-09-14 23:34:29 +00:00
Dan Gohman
a2e5bf005e Convert TBAA to use the new TBAATag field of AliasAnalysis::Location. 
llvm-svn: 113892
 2010-09-14 23:28:12 +00:00
Eric Christopher
c6075a71ad Emit libcalls for SDIV, this requires some call infrastructure 
that needs to be shared a bit more widely around.

llvm-svn: 113886
 2010-09-14 23:03:37 +00:00
Jim Grosbach
d7e8d8c018 revert 113875 momentarilly. Need to fix the MC disassembler to handle the 
change.

llvm-svn: 113878
 2010-09-14 22:38:39 +00:00
Jim Grosbach
12d12f92ff trailing whitespace cleanup 
llvm-svn: 113877
 2010-09-14 22:27:15 +00:00
Gabor Greif
8856ba094b an attempt to salvage the darwin9-powerpc buildbot, which could be miscompiling this line 
llvm-svn: 113876
 2010-09-14 22:25:16 +00:00