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7783 Commits

Author SHA1 Message Date
Nico Weber
e650a1bca0 gn build: Merge r371976
llvm-svn: 371977
2019-09-16 11:33:54 +00:00
Nico Weber
659c871c2e gn build: Merge r371965
llvm-svn: 371966
2019-09-16 09:43:26 +00:00
Nico Weber
1d97a74aa0 gn build: Merge r371959
llvm-svn: 371961
2019-09-16 07:34:23 +00:00
James Molloy
852739ecc8 [CodeEmitter] Support instruction widths > 64 bits
Some VLIW instruction sets are Very Long Indeed. Using uint64_t constricts the Inst encoding to 64 bits (naturally).

This change switches CodeEmitter to a mode that uses APInts when Inst's bitwidth is > 64 bits (NFC for existing targets).

When Inst.BitWidth > 64 the prototype changes to:

  void TargetMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
                                                  SmallVectorImpl<MCFixup> &Fixups,
                                                  APInt &Inst,
                                                  APInt &Scratch,
                                                  const MCSubtargetInfo &STI);

The Inst parameter returns the encoded instruction, the Scratch parameter is used internally for manipulating operands and is exposed so that the underlying storage can be reused between calls to getBinaryCodeForInstr. The goal is to elide any APInt constructions that we can.

Similarly the operand encoding prototype changes to:

  getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &op, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI);

That is, the operand is passed by reference as APInt rather than returned as uint64_t.

To reiterate, this APInt mode is enabled only when Inst.BitWidth > 64, so this change is NFC for existing targets.

llvm-svn: 371928
2019-09-15 08:35:08 +00:00
Nico Weber
dd0d908417 gn build: pacify "gn format" after 371102
llvm-svn: 371858
2019-09-13 14:35:20 +00:00
Nico Weber
c19d943856 gn build: (manually) merge r371834, take 2
llvm-svn: 371851
2019-09-13 13:07:54 +00:00
Nico Weber
3457b3fd67 Revert "gn build: (manually) merge r371834"
This reverts commit abc7e2b6004cd693cf3b6dedbc7908e099c7ac6a.
The commit was incomplete. I'll revert and reland the full commit,
so that the correct change is a single commit.

llvm-svn: 371850
2019-09-13 13:04:59 +00:00
Nico Weber
0f67698ab7 gn build: (manually) merge r371834
llvm-svn: 371849
2019-09-13 12:59:06 +00:00
Nico Weber
edfaf8ee25 gn build: Merge r371822
llvm-svn: 371848
2019-09-13 12:58:58 +00:00
Nico Weber
df5359a92f gn build: (manually) merge r371787
llvm-svn: 371847
2019-09-13 12:58:52 +00:00
Nandor Licker
d08de3dbd0 [Clang Interpreter] Initial patch for the constexpr interpreter
Summary:
This patch introduces the skeleton of the constexpr interpreter,
capable of evaluating a simple constexpr functions consisting of
if statements. The interpreter is described in more detail in the
RFC. Further patches will add more features.

Reviewers: Bigcheese, jfb, rsmith

Subscribers: bruno, uenoku, ldionne, Tyker, thegameg, tschuett, dexonsmith, mgorny, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64146

llvm-svn: 371834
2019-09-13 09:46:16 +00:00
Rainer Orth
7d740f416b test-release.sh: Don't use chrpath on Solaris
When trying to run test-release.sh on Solaris 11.4 for 9.0.0 rc4, I failed initially
because Solaris lacks chrpath.  This patch accounts for that and allowed the run to
continue.

Tested on amd64-pc-solaris2.11 and sparcv9-sun-solaris2.11.

Differential Revision: https://reviews.llvm.org/D67484

llvm-svn: 371741
2019-09-12 14:50:32 +00:00
Tim Northover
1bb14916f2 AArch64: support arm64_32, an ILP32 slice for watchOS.
This is the main CodeGen patch to support the arm64_32 watchOS ABI in LLVM.
FastISel is mostly disabled for now since it would generate incorrect code for
ILP32.

llvm-svn: 371722
2019-09-12 10:22:23 +00:00
Nico Weber
224c35980e gn build: Merge r371700
llvm-svn: 371701
2019-09-12 01:25:34 +00:00
Nico Weber
2145166934 gn build: Merge r371661
llvm-svn: 371670
2019-09-11 21:24:15 +00:00
Nico Weber
ac978cacf9 gn build: Merge r371657
llvm-svn: 371669
2019-09-11 21:24:11 +00:00
Nico Weber
944e7c848d gn build: Merge r371635
llvm-svn: 371636
2019-09-11 16:26:59 +00:00
Nico Weber
481cef9453 gn build: Merge r371562
llvm-svn: 371626
2019-09-11 14:40:16 +00:00
Nico Weber
b298a437ae gn build: add include_dir that's necessary after r371564
llvm-svn: 371611
2019-09-11 12:21:09 +00:00
Eric Christopher
24de559445 Move LLVM_ENABLE_ABI_BREAKING_CHECKS variables to their own file
so that you don't have to link Error.o and all of its dependencies.

In more detail: global initializers in Error.o can't be elided with
-ffunction-sections/-gc-sections since they always need to be run
causing a fairly significant binary bloat if all you want is the
ABI breaking checks code.

Differential Revision: https://reviews.llvm.org/D67387

llvm-svn: 371561
2019-09-10 22:05:01 +00:00
Matt Arsenault
2c4cefbd49 GlobalISel/TableGen: Handle REG_SEQUENCE patterns
The scalar f64 patterns don't work yet because they fail on multiple
results from the unused implicit def of scc in the result bit
operation.

llvm-svn: 371542
2019-09-10 17:57:33 +00:00
Djordje Todorovic
0dec37607c Revert "[utils] Implement the llvm-locstats tool"
This reverts commit rL371520.

llvm-svn: 371527
2019-09-10 14:48:52 +00:00
Djordje Todorovic
64810143df [utils] Implement the llvm-locstats tool
The tool reports verbose output for the DWARF debug location coverage.
The llvm-locstats for each variable or formal parameter DIE computes what
percentage from the code section bytes, where it is in scope, it has
location description. The line 0 shows the number (and the percentage) of
DIEs with no location information, but the line 100 shows the number (and
the percentage) of DIEs where there is location information in all code
section bytes (where the variable or parameter is in the scope). The line
50..59 shows the number (and the percentage) of DIEs where the location
information is in between 50 and 59 percentage of its scope covered.

The tool will be very useful for tracking improvements regarding the
"debugging optimized code" support with LLVM ecosystem.

Differential Revision: https://reviews.llvm.org/D66526

llvm-svn: 371520
2019-09-10 13:47:03 +00:00
Dmitri Gribenko
8560522aac Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline.""
This reverts commit r371502, it broke tests
(clang/test/CodeGenCXX/auto-var-init.cpp).

llvm-svn: 371507
2019-09-10 10:39:09 +00:00
Clement Courbet
29890c92af Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
With a fix for sanitizer breakage (see explanation in D60318).

llvm-svn: 371502
2019-09-10 09:18:00 +00:00
Nico Weber
43169359b2 gn build: Merge r371488
llvm-svn: 371489
2019-09-10 06:31:59 +00:00
Nico Weber
795dd43f08 gn build: Merge r371484
llvm-svn: 371485
2019-09-10 03:18:25 +00:00
Mehdi Amini
6ea70ba5d0 Revert [git-llvm] Do not reinvent @{upstream}
This reverts r371290 (git commit 7faffd544b16f851a632d6b8f93e3c8485ff34bb)

The change wasnt NFC and broke some users' workflow. Reverting while figuring
out the best alternative to move forward.

llvm-svn: 371480
2019-09-10 01:26:36 +00:00
Nico Weber
26b0dc2c31 gn build: Merge r371466
llvm-svn: 371479
2019-09-10 01:11:30 +00:00
Nico Weber
fd82eee3fd gn build: (manually) merge r371429
llvm-svn: 371477
2019-09-10 00:48:20 +00:00
Matt Arsenault
4ec23178ea AMDGPU/GlobalISel: Select atomic loads
A new check for an explicitly atomic MMO is needed to avoid
incorrectly matching pattern for non-atomic loads

llvm-svn: 371418
2019-09-09 16:18:07 +00:00
Matt Arsenault
44317511dd AMDGPU: Remove code address space predicates
Fixes 8-byte, 8-byte aligned LDS loads. 16-byte case still broken due
to not be reported as legal.

llvm-svn: 371413
2019-09-09 16:02:07 +00:00
James Molloy
aecd6e19a2 [DFAPacketizer] Reapply: Track resources for packetized instructions
Reapply with fix to reduce resources required by the compiler - use
unsigned[2] instead of std::pair. This causes clang and gcc to compile
the generated file multiple times faster, and hopefully will reduce
the resource requirements on Visual Studio also. This fix is a little
ugly but it's clearly the same issue the previous author of
DFAPacketizer faced (the previous tables use unsigned[2] rather uglily
too).

This patch allows the DFAPacketizer to be queried after a packet is formed to work out which
resources were allocated to the packetized instructions.

This is particularly important for targets that do their own bundle packing - it's not
sufficient to know simply that instructions can share a packet; which slots are used is
also required for encoding.

This extends the emitter to emit a side-table containing resource usage diffs for each
state transition. The packetizer maintains a set of all possible resource states in its
current state. After packetization is complete, all remaining resource states are
possible packetization strategies.

The sidetable is only ~500K for Hexagon, but the extra tracking is disabled by default
(most uses of the packetizer like MachinePipeliner don't care and don't need the extra
maintained state).

Differential Revision: https://reviews.llvm.org/D66936

llvm-svn: 371399
2019-09-09 13:17:55 +00:00
Simon Pilgrim
1c0d839652 Revert rL371198 from llvm/trunk: [DFAPacketizer] Track resources for packetized instructions
This patch allows the DFAPacketizer to be queried after a packet is formed to work out which
resources were allocated to the packetized instructions.

This is particularly important for targets that do their own bundle packing - it's not
sufficient to know simply that instructions can share a packet; which slots are used is
also required for encoding.

This extends the emitter to emit a side-table containing resource usage diffs for each
state transition. The packetizer maintains a set of all possible resource states in its
current state. After packetization is complete, all remaining resource states are
possible packetization strategies.

The sidetable is only ~500K for Hexagon, but the extra tracking is disabled by default
(most uses of the packetizer like MachinePipeliner don't care and don't need the extra
maintained state).

Differential Revision: https://reviews.llvm.org/D66936
........
Reverted as this is causing "compiler out of heap space" errors on MSVC 2017/19 NDEBUG builds

llvm-svn: 371393
2019-09-09 12:33:22 +00:00
David Zarzycki
a734b4b36f [git-llvm] Do not reinvent @{upstream}
Make `git-llvm` more robust when used with a nontrivial repository.

https://reviews.llvm.org/D67262

llvm-svn: 371290
2019-09-07 06:44:52 +00:00
Matt Arsenault
0f15b35531 GlobalISel: Support physical register inputs in patterns
llvm-svn: 371253
2019-09-06 20:32:37 +00:00
James Molloy
bd5b6d09b9 [DFAPacketizer] Track resources for packetized instructions
This patch allows the DFAPacketizer to be queried after a packet is formed to work out which
resources were allocated to the packetized instructions.

This is particularly important for targets that do their own bundle packing - it's not
sufficient to know simply that instructions can share a packet; which slots are used is
also required for encoding.

This extends the emitter to emit a side-table containing resource usage diffs for each
state transition. The packetizer maintains a set of all possible resource states in its
current state. After packetization is complete, all remaining resource states are
possible packetization strategies.

The sidetable is only ~500K for Hexagon, but the extra tracking is disabled by default
(most uses of the packetizer like MachinePipeliner don't care and don't need the extra
maintained state).

Differential Revision: https://reviews.llvm.org/D66936

llvm-svn: 371198
2019-09-06 12:20:08 +00:00
Nico Weber
a1ed6b84eb gn build: Merge r371182
llvm-svn: 371191
2019-09-06 09:44:13 +00:00
Nico Weber
94d1e484fb gn build: Merge r371179
llvm-svn: 371190
2019-09-06 09:44:10 +00:00
Nico Weber
c5822be200 gn build: Merge r371159
llvm-svn: 371161
2019-09-06 01:22:13 +00:00
Matt Arsenault
fe20e32ba0 GlobalISel/TableGen: Fix handling of EXTRACT_SUBREG constraints
This was only using the correct register constraints if this was the
final result instruction. If the extract was a sub instruction of the
result, it would attempt to use GIR_ConstrainSelectedInstOperands on a
COPY, which won't work. Move the handling to
createAndImportSubInstructionRenderer so it works correctly.

I don't fully understand why runOnPattern and
createAndImportSubInstructionRenderer both need to handle these
special cases, and constrain them with slightly different methods. If
I remove the runOnPattern handling, it does break the constraint when
the final result instruction is EXTRACT_SUBREG.

llvm-svn: 371150
2019-09-06 00:05:58 +00:00
Nico Weber
2bc897e1bd gn build: Merge r371134
llvm-svn: 371135
2019-09-05 22:40:47 +00:00
Nico Weber
57ffd0059f gn build: Merge r371121
llvm-svn: 371123
2019-09-05 20:58:38 +00:00
Nico Weber
370c784789 gn build: Merge r371117
llvm-svn: 371119
2019-09-05 20:38:24 +00:00
Nico Weber
da0c5a3e78 gn build: Merge r371103
llvm-svn: 371105
2019-09-05 18:15:50 +00:00
Nico Weber
46a38628ea gn build: (manually) merge r358706
llvm-svn: 371102
2019-09-05 18:03:18 +00:00
Nico Weber
91683fcaf2 gn build: (manually) merge r371003
llvm-svn: 371091
2019-09-05 17:22:55 +00:00
Nico Weber
329dea1715 gn build: Merge r370985
llvm-svn: 370988
2019-09-04 21:34:21 +00:00
Matt Arsenault
8c03368633 GlobalISel/TableGen: Don't skip REG_SEQUENCE based on patterns
This partially adds support for patterns with REG_SEQUENCE. The source
patterns are now accepted, but the pattern is still rejected due to
missing support for the instruction renderer.

llvm-svn: 370920
2019-09-04 16:19:34 +00:00
Nico Weber
8295707d08 gn build: Merge r370862
llvm-svn: 370876
2019-09-04 11:08:09 +00:00