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09fbb211eb
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44326 Commits

Author SHA1 Message Date
Duncan Sands
09fbb211eb Add a new convenience pass for testing InstructionSimplify. Previously 
it could only be tested indirectly, via instcombine, gvn or some other
pass that makes use of InstructionSimplify, which means that testcases
had to be carefully contrived to dance around any other transformations
that that pass did.

llvm-svn: 122264
 2010-12-20 20:54:37 +00:00
Wesley Peck
af2890a051 Teach the MBlaze asm parser how to parse special purpose register names. 
llvm-svn: 122261
 2010-12-20 20:43:24 +00:00
Dale Johannesen
036c3da142 Cosmetic changes. 
llvm-svn: 122259
 2010-12-20 20:10:50 +00:00
Benjamin Kramer
2b3ad7e4dc Add a check missing from my last commit and avoid a potential overflow situation. 
llvm-svn: 122258
 2010-12-20 20:00:31 +00:00
Owen Anderson
7a69be36e5 More LVI cleanups, including trying to simplify the process of maintaining the OverDefinedCache. 
llvm-svn: 122256
 2010-12-20 19:33:41 +00:00
Owen Anderson
2ebd7e9192 Reuse the reference into the LVI cache throughout the solver subsystem. This is much easier to 
verify as being safe thanks its recent de-recursivization.

llvm-svn: 122254
 2010-12-20 18:18:16 +00:00
Benjamin Kramer
d38a47e082 Reduce indentation. 
llvm-svn: 122249
 2010-12-20 16:21:59 +00:00
Benjamin Kramer
bec7a6be15 Teach InstCombine to merge (icmp ult (X + CA), C1) | (icmp eq X, C2) into (icmp ult (X + CA), C1 + 1) if C2 + CA == C1. 
InstCombine creates these so now we compile x == 23 || x == 24 || x == 25 to
  %x.off = add i32 %x, -23
  %1 = icmp ult i32 %x.off, 3
instead of
  %x.off = add i32 %x, -23
  %1 = icmp ult i32 %x.off, 2
  %cmp3 = icmp eq i32 %x, 25
  %ret2 = or i1 %1, %cmp3

llvm-svn: 122248
 2010-12-20 16:18:51 +00:00
Daniel Dunbar
5580eff1f8 Add header... 
llvm-svn: 122247
 2010-12-20 15:45:51 +00:00
Daniel Dunbar
f1deaf06a9 X86/MC/Mach-O: Split out createX86MachObjectWriter(). 
llvm-svn: 122246
 2010-12-20 15:07:39 +00:00
Duncan Sands
f72cfa961d Have SimplifyBinOp dispatch Xor, Add and Sub to the corresponding methods 
(they had just been forgotten before).  Adding Xor causes "main" in the
existing testcase 2010-11-01-lshr-mask.ll to be hugely more simplified.

llvm-svn: 122245
 2010-12-20 14:47:04 +00:00
Michael J. Spencer
8e93c3829f Support/PathV2: Add missing has_relative_path impl. 
llvm-svn: 122243
 2010-12-20 13:30:28 +00:00
Duncan Sands
a37d282962 There is no need for isAssociative to take the type as an argument anymore. 
llvm-svn: 122242
 2010-12-20 13:10:23 +00:00
Chris Lattner
b27b5d0a3a fix PR8807 by making transformConstExprCastCall aware of byval arguments. 
llvm-svn: 122238
 2010-12-20 08:36:38 +00:00
Chris Lattner
a3fea736c1 various cleanups for transformConstExprCastCall 
llvm-svn: 122237
 2010-12-20 08:25:06 +00:00
Chris Lattner
ba962825a4 when eliding a byval copy due to inlining a readonly function, we have 
to make sure that the reused alloca has sufficient alignment.

llvm-svn: 122236
 2010-12-20 08:10:40 +00:00
Chris Lattner
c0a48df9f9 pull byval processing out to its own helper function. 
llvm-svn: 122235
 2010-12-20 07:57:41 +00:00
Chris Lattner
029952c844 fix PR8769, a miscompilation by inliner when inlining a function with a byval 
argument.  The generated alloca has to have at least the alignment of the
byval, if not, the client may be making assumptions that the new alloca won't
satisfy.

llvm-svn: 122234
 2010-12-20 07:45:28 +00:00
Cameron Zwarich
ad29bd5325 MachineVerifier should count landing pad successors as basic blocks rather than 
out-edges. Fixes PR8824.

llvm-svn: 122228
 2010-12-20 04:19:48 +00:00
Cameron Zwarich
6970ec515e Teach MachineVerifier that early clobber defs begin at USE slots and other defs 
begin at DEF slots. Fixes the second half of PR8813.

llvm-svn: 122225
 2010-12-20 03:15:20 +00:00
Cameron Zwarich
31af86ef44 Add a missing check from r122218. 
llvm-svn: 122224
 2010-12-20 02:59:51 +00:00
Chris Lattner
249e131f39 implement type legalization promotion support for SMULO and UMULO, giving 
ARM (and other 32-bit-only) targets support for i8 and i16 overflow 
multiplies.  The generated code isn't great, but this at least fixes
CodeGen/Generic/overflow.ll when running on ARM hosts.

llvm-svn: 122221
 2010-12-20 02:05:39 +00:00
Chris Lattner
bee7320c3c now that addc/adde are gone, "ADDC" in the X86 backend uses EFLAGS results, 
the same as setcc.  Optimize ADDC(0,0,FLAGS) -> SET_CARRY(FLAGS).  This is
a step towards finishing off PR5443.  In the testcase in that bug we now  get:

	movq	%rdi, %rax
	addq	%rsi, %rax
	sbbq	%rcx, %rcx
	testb	$1, %cl
	setne	%dl
	ret

instead of:

	movq	%rdi, %rax
	addq	%rsi, %rax
	movl	$0, %ecx
	adcq	$0, %rcx
	testq	%rcx, %rcx
	setne	%dl
	ret

llvm-svn: 122219
 2010-12-20 01:37:09 +00:00
Cameron Zwarich
bcd02fd9a4 Don't assume that an instruction ending a register's live range always reads 
the register; it may be a dead def instead. Fixes PR8820.

llvm-svn: 122218
 2010-12-20 01:22:37 +00:00
Chris Lattner
2d4e17d195 We lower setb to sbb with the hope that the and will go away, when it 
doesn't, match it back to setb.

On a 64-bit version of the testcase before we'd get:

	movq	%rdi, %rax
	addq	%rsi, %rax
	sbbb	%dl, %dl
	andb	$1, %dl
	ret

now we get:

	movq	%rdi, %rax
	addq	%rsi, %rax
	setb	%dl
	ret

llvm-svn: 122217
 2010-12-20 01:16:03 +00:00
Mon P Wang
4ab0ea216d Avoid dropping the address space when InstCombine optimizes memset 
llvm-svn: 122215
 2010-12-20 01:05:30 +00:00
Chris Lattner
16ea7f257f use for loop over types. 
llvm-svn: 122214
 2010-12-20 01:03:27 +00:00
Chris Lattner
8b1f76cad6 Change the X86 backend to stop using the evil ADDC/ADDE/SUBC/SUBE nodes (which 
their carry depenedencies with MVT::Flag operands) and use clean and beautiful
EFLAGS dependences instead.

We do this by changing the modelling of SBB/ADC to have EFLAGS input and outputs
(which is what requires the previous scheduler change) and change X86 ISelLowering
to custom lower ADDC and friends down to X86ISD::ADD/ADC/SUB/SBB nodes.

With the previous series of changes, this causes no changes in the testsuite, woo.

llvm-svn: 122213
 2010-12-20 00:59:46 +00:00
Chris Lattner
0f801998bf Fix a bug in the scheduler's handling of "unspillable" vregs. 
Imagine we see:

EFLAGS = inst1
EFLAGS = inst2 FLAGS
gpr = inst3 EFLAGS

Previously, we would refuse to schedule inst2 because it clobbers
the EFLAGS of the predecessor.  However, it also uses the EFLAGS
of the predecessor, so it is safe to emit.  SDep edges ensure that
the right order happens already anyway.

This fixes 2 testsuite crashes with the X86 patch I'm going to
commit next.

llvm-svn: 122211
 2010-12-20 00:55:43 +00:00
Chris Lattner
85875bf06b the result of CheckForLiveRegDef is dead, remove it. 
llvm-svn: 122209
 2010-12-20 00:51:56 +00:00
Chris Lattner
ee7fa0d706 reduce indentation, no functionality change. 
llvm-svn: 122208
 2010-12-20 00:50:16 +00:00
Cameron Zwarich
8c00d690f5 Ignore debug values when performing MachineVerifier liveness checks. Fixes 
PR8822.

llvm-svn: 122207
 2010-12-20 00:08:10 +00:00
Mon P Wang
d3adab7a64 Prevents PerformShuffleCombine from creating a node with an illegal type after legalize types 
has run, e.g., prevent creating an i64 node from a v2i64 when i64 is not a legal type.

llvm-svn: 122206
 2010-12-19 23:55:53 +00:00
Cameron Zwarich
c8dfbe7503 Early clobber operands are allowed to be defined at use indices. This fixes one 
half of PR8813.

llvm-svn: 122205
 2010-12-19 23:50:53 +00:00
Chris Lattner
c8327b2f7c fix an oversight caught by Frits! 
llvm-svn: 122204
 2010-12-19 23:24:04 +00:00
Cameron Zwarich
6f5c1021ba Fix PR8815 by checking for an explicit clobber def tied to a use operand in 
ConnectedVNInfoEqClasses::Classify().

llvm-svn: 122202
 2010-12-19 22:12:45 +00:00
Chris Lattner
297259f6f1 improve the setcc -> setcc_carry optimization to happen more 
consistently by moving it out of lowering into dag combine.

Add some missing patterns for matching away extended versions of setcc_c.

llvm-svn: 122201
 2010-12-19 22:08:31 +00:00
Cameron Zwarich
37aec9c35d Fix PR8811 by teaching MachineVerifier about optional defs. 
llvm-svn: 122199
 2010-12-19 21:37:23 +00:00
Cameron Zwarich
64fbc5e267 StrongPHIElimination will never run before TwoAddressInstructionPass. 
llvm-svn: 122197
 2010-12-19 21:32:29 +00:00
Chris Lattner
1f31c7fa15 simplify some code to just reuse a setcc if we can instead of 
going through the CSE maps to get it.

llvm-svn: 122196
 2010-12-19 21:23:48 +00:00
Nick Lewycky
c85935836b Add missing standard headers. Patch by Joerg Sonnenberger! 
llvm-svn: 122193
 2010-12-19 20:43:38 +00:00
Nick Lewycky
e718af6c63 Add missing std:: prefixes to some calls. C++ doesn't require that <cfoo> 
headers provide symbols outside namespace std and the LLVM coding standards
state that we should prefix all of them.

llvm-svn: 122192
 2010-12-19 20:42:43 +00:00
Chris Lattner
92dcd2af36 teach MaskedValueIsZero how to analyze ADDE. This is 
enough to teach it that ADDE(0,0) is known 0 except the 
low bit, for example.

llvm-svn: 122191
 2010-12-19 20:38:28 +00:00
Chris Lattner
45f7e2d4cb tidy up 
llvm-svn: 122190
 2010-12-19 20:24:28 +00:00
Chris Lattner
2d59eef5fd now that generic vector types aren't selected onto MMX operations, 
we don't need -disable-mmx anymore.

llvm-svn: 122189
 2010-12-19 20:19:20 +00:00
Chris Lattner
30438e63c8 reduce copy/paste programming with the power of for loops. 
llvm-svn: 122187
 2010-12-19 20:07:10 +00:00
Chris Lattner
29475c23d0 X86 supports i8/i16 overflow ops (except i8 multiplies), we should 
generate them.  

Now we compile:

define zeroext i8 @X(i8 signext %a, i8 signext %b) nounwind ssp {
entry:
  %0 = tail call %0 @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
  %cmp = extractvalue %0 %0, 1
  br i1 %cmp, label %if.then, label %if.end

into:

_X:                                     ## @X
## BB#0:                                ## %entry
	subl	$12, %esp
	movb	16(%esp), %al
	addb	20(%esp), %al
	jo	LBB0_2

Before we were generating:

_X:                                     ## @X
## BB#0:                                ## %entry
	pushl	%ebp
	movl	%esp, %ebp
	subl	$8, %esp
	movb	12(%ebp), %al
	testb	%al, %al
	setge	%cl
	movb	8(%ebp), %dl
	testb	%dl, %dl
	setge	%ah
	cmpb	%cl, %ah
	sete	%cl
	addb	%al, %dl
	testb	%dl, %dl
	setge	%al
	cmpb	%al, %ah
	setne	%al
	andb	%cl, %al
	testb	%al, %al
	jne	LBB0_2

llvm-svn: 122186
 2010-12-19 20:03:11 +00:00
Chris Lattner
7858cb9c08 move a transformation to a more logical place, simplifying it. 
llvm-svn: 122183
 2010-12-19 19:43:52 +00:00
Chris Lattner
3bc741a0d2 recognize an unsigned add with overflow idiom into uadd. 
This resolves a README entry and technically resolves PR4916,
but we still get poor code for the testcase in that PR because
GVN isn't CSE'ing uadd with add, filed as PR8817.

Previously we got:

_test7:                                 ## @test7
	addq	%rsi, %rdi
	cmpq	%rdi, %rsi
	movl	$42, %eax
	cmovaq	%rsi, %rax
	ret

Now we get:

_test7:                                 ## @test7
	addq	%rsi, %rdi
	movl	$42, %eax
	cmovbq	%rsi, %rax
	ret

llvm-svn: 122182
 2010-12-19 19:37:52 +00:00
Chris Lattner
faef9b6bfb optimize uadd(x, cst) into a comparison when the normal 
result is dead.  This is required for my next patch to not
regress the testsuite.

llvm-svn: 122181
 2010-12-19 19:35:32 +00:00