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Commit Graph

68879 Commits

Author SHA1 Message Date
Rafael Espindola
9639d4700f Fix DataLayout::operator==().
Patch by Maks Naumov!

llvm-svn: 206911
2014-04-22 17:47:03 +00:00
Kevin Enderby
223e66dc63 Fix the assembler to print a better relocatable expression error
diagnostic that includes location information.

Currently if one has this assembly:

	.quad (0x1234 + (4 * SOME_VALUE))

where SOME_VALUE is undefined ones gets the less than
useful error message with no location information:

% clang -c x.s
clang -cc1as: fatal error: error in backend: expected relocatable expression

With this fix one now gets a more useful error message
with location information:

% clang -c x.s 
x.s:5:8: error: expected relocatable expression
 .quad (0x1234 + (4 * SOME_VALUE))
       ^

To do this I plumbed the SMLoc through the MCObjectStreamer
EmitValue() and EmitValueImpl() interfaces so it could be used
when creating the MCFixup.

rdar://12391022

llvm-svn: 206906
2014-04-22 17:27:29 +00:00
David Blaikie
9010d1345e Simplify address pool index assignment.
llvm-svn: 206905
2014-04-22 17:21:40 +00:00
Matt Arsenault
f022fe68e4 R600: Emit error instead of unreachable on function call
llvm-svn: 206904
2014-04-22 16:42:00 +00:00
Tom Stellard
dc5c99c92d R600/SI: Reorganize SIInstructions.td
llvm-svn: 206902
2014-04-22 16:33:57 +00:00
Elena Demikhovsky
0038f7ae47 AVX-512: store and truncstore for i1 values
llvm-svn: 206897
2014-04-22 14:13:10 +00:00
NAKAMURA Takumi
3a13d3a710 Remove DOS CRLF.
llvm-svn: 206894
2014-04-22 13:35:50 +00:00
Tim Northover
36d7628659 AArch64/ARM64: make use of ANDS and BICS instructions for comparisons.
llvm-svn: 206888
2014-04-22 12:45:42 +00:00
Lang Hames
883a05a1d6 [X86] Require HasBMI2 for the new BZHI tablegen patterns.
Evidently tablegen doesn't infer this from the HasBMI2 predicate on the BZHI
instructions. This should fix the recent bot failures.

llvm-svn: 206885
2014-04-22 12:04:53 +00:00
Robert Khasanov
5fa2a3546f [AVX512] Implemented integer conversions up/down with masking.
Added encoding tests.

llvm-svn: 206884
2014-04-22 11:36:19 +00:00
Kostya Serebryany
291de5fd50 [asan] Support outline instrumentation for wide types and delete dead code, patch by Yuri Gribov
llvm-svn: 206883
2014-04-22 11:19:45 +00:00
Lang Hames
067ce6ce24 [X86] Remove Tablegen def of X86bzhi SDNode: It's not needed as of r206879.
llvm-svn: 206880
2014-04-22 10:50:46 +00:00
Lang Hames
c13d48ed4c [X86] Use tablegen instead of DAG combines to match BZHI instructions, as
suggested by Ben Kramer in review of r206738.

Thanks again Ben!

llvm-svn: 206879
2014-04-22 10:41:56 +00:00
Matheus Almeida
202ffe4158 [mips] Clang-format MipsAsmParser.
No functional changes.

llvm-svn: 206878
2014-04-22 10:15:54 +00:00
Tim Northover
99097ae341 AArch64/ARM64: add patterns for scalar_to_vector/extract pairs
llvm-svn: 206876
2014-04-22 10:10:18 +00:00
Tim Northover
17d76dc72c ARM: disable emission of __XYZvfp in soft-float environment.
The point of these calls is to allow Thumb-1 code to make use of the VFP unit
to perform its operations. This is not desirable with -msoft-float, since most
of the reasons you'd want that apply equally to the runtime library.

rdar://problem/13766161

llvm-svn: 206874
2014-04-22 10:10:09 +00:00
Hao Liu
6daf5ecff4 Fix an infinite loop bug in DAG Combine about keeping transfering between ANY_EXTEND and SIGN_EXTEND.
llvm-svn: 206873
2014-04-22 09:57:06 +00:00
Lang Hames
c6b233b58f [X86] Don't use BZHI for short masks (>=32 bits). Thanks to Ben Kramer for the
review.

llvm-svn: 206869
2014-04-22 07:40:34 +00:00
David Blaikie
eb8b511a12 Revert "Use value semantics to manage DbgVariables rather than dynamic allocation/pointers."
This reverts commit r206780.

This commit was regressing gdb.opt/inline-locals.exp in the GDB 7.5 test
suite. Reverting until I can fix the issue.

llvm-svn: 206867
2014-04-22 05:41:06 +00:00
Matt Arsenault
c47555412c R600: Change how vector truncating stores are packed.
Don't introduce new operations on an illegal sub 32-bit type.
Do the operations on a 32-bit value, and then use a truncating store.

llvm-svn: 206864
2014-04-22 04:11:14 +00:00
Matt Arsenault
01a0b32658 R600: Make sign_extend_inreg legal.
Don't know why I didn't just do this in the first place.

llvm-svn: 206862
2014-04-22 03:49:30 +00:00
Jiangning Liu
fbd9fe9a73 [AArch64] Enable global merge pass.
llvm-svn: 206861
2014-04-22 03:33:26 +00:00
Duncan P. N. Exon Smith
e7f58108ee blockfreq: Skip irreducible backedges inside functions
The branch that skips irreducible backedges was only active when
propagating mass at the top-level.  In particular, when propagating mass
through a loop recognized by `LoopInfo` with irreducible control flow
inside, irreducible backedges would not be skipped.

Not sure where that idea came from, but the result was that mass was
lost until after loop exit.  Added a testcase that covers this case.

llvm-svn: 206860
2014-04-22 03:31:53 +00:00
Duncan P. N. Exon Smith
a1d9be7fae blockfreq: Rename PackagedLoops => Loops
llvm-svn: 206859
2014-04-22 03:31:50 +00:00
Duncan P. N. Exon Smith
f75da5e8f9 blockfreq: Use a pointer for ContainingLoop too
llvm-svn: 206858
2014-04-22 03:31:44 +00:00
Duncan P. N. Exon Smith
a90ab97d92 blockfreq: Use pointers to loops instead of an index
Store pointers directly to loops inside the nodes.  This could have been
done without changing the type stored in `std::vector<>`.  However,
rather than computing the number of loops before constructing them
(which `LoopInfo` doesn't provide directly), I've switched to a
`vector<unique_ptr<LoopData>>`.

This adds some heap overhead, but the number of loops is typically
small.

llvm-svn: 206857
2014-04-22 03:31:37 +00:00
Duncan P. N. Exon Smith
60f9a7cb7f blockfreq: Implement clear() explicitly
This was implicitly with copy assignment before, which fails to actually
clear `std::vector<>`'s heap storage.  Move assignment would work, but
since MSVC can't imply those anyway, explicitly `clear()`-ing members
makes more sense.

llvm-svn: 206856
2014-04-22 03:31:34 +00:00
Duncan P. N. Exon Smith
17a7eb45ae blockfreq: Rename PackagedLoopData => LoopData
No functionality change.

llvm-svn: 206855
2014-04-22 03:31:31 +00:00
Chandler Carruth
5442ebf19c [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE
definition below all of the header #include lines, lib/Support edition.

llvm-svn: 206847
2014-04-22 03:07:47 +00:00
Chandler Carruth
3b7bc6ca91 [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE
definition below all the header #include lines. This updates most of the
miscellaneous other lib/... directories. A few left though.

llvm-svn: 206845
2014-04-22 03:04:17 +00:00
Chandler Carruth
6f9ba6a633 [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE
definition below all of the header #include lines, lib/Transforms/...
edition.

This one is tricky for two reasons. We again have a couple of passes
that define something else before the includes as well. I've sunk their
name macros with the DEBUG_TYPE.

Also, InstCombine contains headers that need DEBUG_TYPE, so now those
headers #define and #undef DEBUG_TYPE around their code, leaving them
well formed modular headers. Fixing these headers was a large motivation
for all of these changes, as "leaky" macros of this form are hard on the
modules implementation.

llvm-svn: 206844
2014-04-22 02:55:47 +00:00
Chandler Carruth
7b7b0c3523 [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE
definition below all the header #include lines, lib/Analysis/...
edition.

This one has a bit extra as there were *other* #define's before #include
lines in addition to DEBUG_TYPE. I've sunk all of them as a block.

llvm-svn: 206843
2014-04-22 02:48:03 +00:00
Chandler Carruth
ae889a5f85 [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE
definition below all of the header #include lines, lib/Target/...
edition.

llvm-svn: 206842
2014-04-22 02:41:26 +00:00
Chandler Carruth
1bfa34f57d [cleanup] Fix two headers where we included a standard library header
after including the generated code from tablegen.

llvm-svn: 206841
2014-04-22 02:28:45 +00:00
Chandler Carruth
0ce7e31733 [cleanup] Fix another place where we were including the tablegen'ed code
of a '.inc' file before including actual headers. In this case we had
both duplicated a header's include and were including a standard header.

llvm-svn: 206840
2014-04-22 02:25:17 +00:00
Chandler Carruth
72185824a4 [cleanup] Lift using directives, DEBUG_TYPE definitions, and even some
system headers above the includes of generated '.inc' files that
actually contain code. In a few targets this was already done pretty
consistently, but it wasn't done *really* consistently anywhere. It is
strictly cleaner IMO and necessary in a bunch of places where the
DEBUG_TYPE is referenced from the generated code. Consistency with the
necessary places trumps. Hopefully the build bots are OK with the
movement of intrin.h...

llvm-svn: 206838
2014-04-22 02:03:14 +00:00
Chandler Carruth
2361db41db [Modules] Remove potential ODR violations by sinking the DEBUG_TYPE
define below all header includes in the lib/CodeGen/... tree. While the
current modules implementation doesn't check for this kind of ODR
violation yet, it is likely to grow support for it in the future. It
also removes one layer of macro pollution across all the included
headers.

Other sub-trees will follow.

llvm-svn: 206837
2014-04-22 02:02:50 +00:00
Quentin Colombet
df419d429a [CodeGenPrepare] Use APInt to check the value of the immediate in a and
while checking candidate for bit field extract.
Otherwise the value may not fit in uint64_t and this will trigger an
assertion.

This fixes PR19503.

llvm-svn: 206834
2014-04-22 01:20:34 +00:00
Chandler Carruth
5038051a3d [Modules] Followup to r206822 to add a DEBUG_TYPE which is used on ARM
and PPC, but not x86.

llvm-svn: 206830
2014-04-21 23:58:10 +00:00
Chandler Carruth
15c7b91ac2 [Modules] Make Support/Debug.h modular. This requires it to not change
behavior based on other files defining DEBUG_TYPE, which means it cannot
define DEBUG_TYPE at all. This is actually better IMO as it forces folks
to define relevant DEBUG_TYPEs for their files. However, it requires all
files that currently use DEBUG(...) to define a DEBUG_TYPE if they don't
already. I've updated all such files in LLVM and will do the same for
other upstream projects.

This still leaves one important change in how LLVM uses the DEBUG_TYPE
macro going forward: we need to only define the macro *after* header
files have been #include-ed. Previously, this wasn't possible because
Debug.h required the macro to be pre-defined. This commit removes that.
By defining DEBUG_TYPE after the includes two things are fixed:

- Header files that need to provide a DEBUG_TYPE for some inline code
  can do so by defining the macro before their inline code and undef-ing
  it afterward so the macro does not escape.

- We no longer have rampant ODR violations due to including headers with
  different DEBUG_TYPE definitions. This may be mostly an academic
  violation today, but with modules these types of violations are easy
  to check for and potentially very relevant.

Where necessary to suppor headers with DEBUG_TYPE, I have moved the
definitions below the includes in this commit. I plan to move the rest
of the DEBUG_TYPE macros in LLVM in subsequent commits; this one is big
enough.

The comments in Debug.h, which were hilariously out of date already,
have been updated to reflect the recommended practice going forward.

llvm-svn: 206822
2014-04-21 22:55:11 +00:00
Yi Jiang
284d0fc3fc Set default value of HasExtractBitsInsn to false
llvm-svn: 206803
2014-04-21 22:22:44 +00:00
Jim Grosbach
b5e765535e ARM64: Refactor away a few redundant helpers.
The comment claimed that the register class information wasn't available
in the assembly parser, but that's not really true. It's just annoying to
get to. Replace the helper functions with references to the auto-generated
information.

llvm-svn: 206802
2014-04-21 22:13:57 +00:00
Rafael Espindola
5bfe46aee5 Simplify a vpermil* with constant mask.
With a constant mask a vpermil* is just a shufflevector. This patch implements
that simplification. This allows us to produce denser code. It should also
allow more folding down the line.

llvm-svn: 206801
2014-04-21 22:06:04 +00:00
Jim Grosbach
e077bdf54a ARM64: Improve diagnostics for malformed reg+reg addressing mode.
Make sure only general purpose registers are valid for offset regs and
that 32-bit regs are only valid for sxtw and uxtw extends.

llvm-svn: 206799
2014-04-21 21:45:57 +00:00
Jim Grosbach
3c9de17a55 Move helper functions earlier in the file.
No functional change.

llvm-svn: 206798
2014-04-21 21:45:53 +00:00
Jim Grosbach
5451843d7f ARM64: Extended addressing mode source reg is 64-bit.
The canonical form for the extended addressing mode (e.g.,
"[x1, w2, uxtw #3]" is for the MCInst to have the second register be the
full 64-bit GPR64 register class. The instruction printer cleans up
the output for display to show the 32-bit register instead, per the
specification.

This simplifies 205893 now that the aliasing is handled in the printer
in 206495 so that the codegen path and the disassembler path give the
same MCInst form.

llvm-svn: 206797
2014-04-21 21:45:44 +00:00
David Blaikie
7f6857210a Use unique_ptr to manage ownership of GCOVFunctions, Blocks, and Edges.
llvm-svn: 206796
2014-04-21 21:40:16 +00:00
Hal Finkel
9e0afff216 Remove seemingly-unneeded artificial dependency
The rationale for this artificial dependency seems to have been lost to the
ravages of time, it is covered by no regression tests, and has no impact on
test-suite performance numbers on either x86 or PPC.

For the test suite, on both x86 and PPC, I ran the test suite 10 times (both as
a baseline and with this change), and found no statistically-significant
changes.  For PPC, I used a P7 box. For x86, I used an Intel Xeon E5430. Both
with -O3 -mcpu=native.

This was discussed on-list back in January, but I've not had a chance to run
the performance tests until today.

llvm-svn: 206795
2014-04-21 21:30:25 +00:00
David Blaikie
c1753661ef Simplify destruction of Modules in LLVContextImpl.
This avoids copying the container by simply deleting until empty.

While I'd rather move to a stricter ownership semantic (unique_ptr),
SmallPtrSet can't cope with unique_ptr and the ownership semantics here
are a bit incestuous (Module sort of owns itself, but sort of doesn't
(if the LLVMContext is destroyed before the Module, then it deregisters
itself from the context... )).

Ideally Modules would be given to the context, or possibly an
emplace-like function to construct them there. Modules then shouldn't be
destroyed by LLVM API clients, but by interacting with the owner
(LLVMContext) directly (but even then, passing a Module* to LLVMContext
doesn't provide an easy way to destroy the Module, since the set would
be over unique_ptrs and you'd need a heterogenous lookup function which
SmallPtrSet doesn't have either).

llvm-svn: 206794
2014-04-21 21:27:19 +00:00
Rafael Espindola
eb72b1fec2 Handle _GLOBAL_OFFSET_TABLE_ in 64 bit mode.
With this MC is able to handle _GLOBAL_OFFSET_TABLE_ in 64 bit mode, which is
needed for medium and large code models.

This fixes pr19470.

llvm-svn: 206793
2014-04-21 21:15:45 +00:00
Rafael Espindola
76d276cf3f clang-format this function.
No functionality change, it will just make the next patch easier to read.

llvm-svn: 206792
2014-04-21 21:00:58 +00:00
David Blaikie
091f1b9444 Use unique_ptr to handle GlobalOpt's Evaluator members
llvm-svn: 206790
2014-04-21 20:49:36 +00:00
Reid Kleckner
5013d7ca2d Fix PR7272 in -tailcallelim instead of the inliner
The -tailcallelim pass should be checking if byval or inalloca args can
be captured before marking calls as tail calls.  This was the real root
cause of PR7272.

With a better fix in place, revert the inliner change from r105255.  The
test case it introduced still passes and has been moved to
test/Transforms/Inline/byval-tail-call.ll.

Reviewers: chandlerc

Differential Revision: http://reviews.llvm.org/D3403

llvm-svn: 206789
2014-04-21 20:48:47 +00:00
David Blaikie
057cb4407d Simplify expression that was explicitly naming an operator overload in a call.
llvm-svn: 206788
2014-04-21 20:43:51 +00:00
David Blaikie
f04826c7d5 Use unique_ptr to handle ownership of GCOVFunctions in GCOVProfiler.
llvm-svn: 206786
2014-04-21 20:41:55 +00:00
David Blaikie
11a5acbfd8 Use unique_ptr to handle ownership of UserValues in LiveDebugVariablesImpl
llvm-svn: 206785
2014-04-21 20:37:07 +00:00
David Blaikie
3fde01a358 Use unique_ptr to manage objects owned by the ScheduleDAGMI.
llvm-svn: 206784
2014-04-21 20:32:32 +00:00
David Blaikie
ac6cce35ed Use value semantics to manage DbgVariables rather than dynamic allocation/pointers.
Requires switching some vectors to lists to maintain pointer validity.
These could be changed to forward_lists (singly linked) with a bit more
work - I've left comments to that effect.

llvm-svn: 206780
2014-04-21 20:13:09 +00:00
Filipe Cabecinhas
1ca83b7941 Rename X86insrtps to the proper instruction name.
Summary:
The INSERTPS pattern fragment was called insrtps (mising 'e'), which
would make it harder to grep for the patterns related to this instruction.
Renaming it to use the proper instruction name.

Reviewers: nadav

CC: llvm-commits

Differential Revision: http://reviews.llvm.org/D3443

llvm-svn: 206779
2014-04-21 20:07:29 +00:00
Chandler Carruth
74d9386b11 [Modules] Consolidate the DEBUG_TYPE defines in NVPTX to the top of the
cpp file rather than in the header and then again in the cpp file.

llvm-svn: 206778
2014-04-21 19:53:55 +00:00
Chandler Carruth
e07407deea [Modules] Sink all the DEBUG_TYPE defines for InstCombine out of the
header files and into the cpp files.

These files will require more touches as the header files actually use
DEBUG(). Eventually, I'll have to introduce a matched #define and #undef
of DEBUG_TYPE for the header files, but that comes as step N of many to
clean all of this up.

llvm-svn: 206777
2014-04-21 19:51:41 +00:00
Chandler Carruth
ac94fb1460 [Modules] Sink the DEBUG_TYPE macro out of LegalizeTypes.h and into the
various .cpp files. This macro is inherently non-modular, and it wasn't
even needed in this header file.

llvm-svn: 206775
2014-04-21 19:43:07 +00:00
Yi Jiang
b1c450606d ARM64: Combine shifts and uses from different basic block to bit-extract instruction
llvm-svn: 206774
2014-04-21 19:34:27 +00:00
Jim Grosbach
d756200081 Revert "[rtdyld,c++11] Range'ify symbol table walking."
Tentative revert for
http://lab.llvm.org:8011/builders/llvm-mips-linux/builds/8305.

This reverts commit c2a58efff07294fca724f89500538f2ddbcd12ff.

llvm-svn: 206773
2014-04-21 19:23:59 +00:00
Matt Arsenault
797b7a884c Fix unnecessary line break
llvm-svn: 206772
2014-04-21 18:39:13 +00:00
Duncan P. N. Exon Smith
9067c09422 blockfreq: Some cleanup of UnsignedFloat
Change `PositiveFloat` to `UnsignedFloat`, and fix some of the comments
to indicate that it's disappearing eventually.

llvm-svn: 206771
2014-04-21 18:31:58 +00:00
Jim Grosbach
fa70de88c2 [rtdyld,c++11] Range'ify symbol table walking.
llvm-svn: 206769
2014-04-21 18:10:31 +00:00
Duncan P. N. Exon Smith
78dd4cd9af Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl"
This reverts commit r206707, reapplying r206704.  The preceding commit
to CalcSpillWeights should have sorted out the failing buildbots.

<rdar://problem/14292693>

llvm-svn: 206766
2014-04-21 17:57:07 +00:00
Duncan P. N. Exon Smith
ffa49df7cf CalcSpillWeights: Hack to prevent x87 nonsense
This gross hack forces `hweight` into memory, preventing hidden
precision from making `1 > 1` occasionally equal `true`.

<rdar://problem/14292693>

llvm-svn: 206765
2014-04-21 17:57:01 +00:00
Evgeniy Stepanov
b8b4d1d879 [msan] Enable out-of-line instrumentation for large functions by default.
llvm-svn: 206759
2014-04-21 15:04:05 +00:00
NAKAMURA Takumi
c0dacc327f Appease autoconf build since X86Disassembler.c has been disappeared in r206717.
It can be reverted a few days later, after X86Disassembler.d is updated not to contain "X86Disassembler.c".

llvm-svn: 206758
2014-04-21 14:59:11 +00:00
Kostya Serebryany
0ca459b956 [asan] add a run-time flag detect_container_overflow=true/false
llvm-svn: 206756
2014-04-21 14:35:00 +00:00
Rafael Espindola
56c64fd6fd Convert getFileOffset to getOffset and move it to its only user.
We normally don't drop functions from the C API's, but in this case I think we
can:

* The old implementation of getFileOffset was fairly broken
* The introduction of LLVMGetSymbolFileOffset was itself a C api breaking
  change as it removed LLVMGetSymbolOffset.
* It is an incredibly specialized use case. The only reason MCJIT needs it is
  because of its odd position of being a dynamic linker of .o files.

llvm-svn: 206750
2014-04-21 13:45:32 +00:00
Michael Zolotukhin
c7f992f9a3 Reapply r206732. This time without optimization of branches.
llvm-svn: 206749
2014-04-21 12:01:33 +00:00
Kostya Serebryany
8369b857f6 [asan] instead of inserting inline instrumentation around memset/memcpy/memmove, replace the intrinsic with __asan_memset/etc. This makes the memset/etc handling more complete and consistent with what we do in msan. It may slowdown some cases (when the intrinsic was actually inlined) and speedup other cases (when it was not inlined)
llvm-svn: 206746
2014-04-21 11:50:42 +00:00
Chandler Carruth
88dfbdf34a [PM] Add a new-PM-style CGSCC pass manager using the newly added
LazyCallGraph analysis framework. Wire it up all the way through the opt
driver and add some very basic testing that we can build pass pipelines
including these components. Still a lot more to do in terms of testing
that all of this works, but the basic pieces are here.

There is a *lot* of boiler plate here. It's something I'm going to
actively look at reducing, but I don't have any immediate ideas that
don't end up making the code terribly complex in order to fold away the
boilerplate. Until I figure out something to minimize the boilerplate,
almost all of this is based on the code for the existing pass managers,
copied and heavily adjusted to suit the needs of the CGSCC pass
management layer.

The actual CG management still has a bunch of FIXMEs in it. Notably, we
don't do *any* updating of the CG as it is potentially invalidated.
I wanted to get this in place to motivate the new analysis, and add
update APIs to the analysis and the pass management layers in concert to
make sure that the *right* APIs are present.

llvm-svn: 206745
2014-04-21 11:12:00 +00:00
Chandler Carruth
aaa7e37c5d [PM] Fix a bug where we didn't properly clear the list map when the list
became empty. This would manifest later as an assert failure due to
a non-empty list map but an empty result map. This doesn't easily
manifest with just the module pass manager and the function pass
manager, but the next commit will add the CGSCC pass manager that hits
this assert immediately.

llvm-svn: 206744
2014-04-21 11:11:54 +00:00
Kostya Serebryany
25679a433d [asan] temporary disable generating __asan_loadN/__asan_storeN
llvm-svn: 206741
2014-04-21 10:28:13 +00:00
Benjamin Kramer
09963da394 [C++11] Replace OwningPtr with std::unique_ptr in places where it doesn't break the API.
No functionality change.

llvm-svn: 206740
2014-04-21 09:34:48 +00:00
Lang Hames
00d9f4ce20 [X86] ISEL (and X, <constant mask>) to BZHI when BMI2 is available.
Generating BZHI in the variable mask case, i.e. (and X, (sub (shl 1, N), 1)),
was already supported, but we were missing the constant-mask case. This patch
fixes that.

<rdar://problem/15480077>

llvm-svn: 206738
2014-04-21 08:18:53 +00:00
Chandler Carruth
164ee32140 Revert r206732 which is causing llc to crash on most of the build bots.
Original commit message:
  Implement builtins for safe division: safe.sdiv.iN, safe.udiv.iN,
  safe.srem.iN, safe.urem.iN (iN = i8, i61, i32, or i64).

llvm-svn: 206735
2014-04-21 07:11:15 +00:00
Kostya Serebryany
0405013a8c [asan] insert __asan_loadN/__asan_storeN as out-lined asan checks, llvm part
llvm-svn: 206734
2014-04-21 07:10:43 +00:00
Michael Zolotukhin
f5ebd83e24 Implement builtins for safe division: safe.sdiv.iN, safe.udiv.iN, safe.srem.iN,
safe.urem.iN (iN = i8, i16, i32, or i64).

llvm-svn: 206732
2014-04-21 05:33:09 +00:00
Chandler Carruth
1369099dbd [LCG] Add some basic debug output to the LCG pass.
llvm-svn: 206730
2014-04-21 05:04:24 +00:00
David Blaikie
a7b0347b5d Protect the ArgList dtor
It could even be made non-virtual if it weren't for bad compiler
warnings.

This demonstrates that ArgList objects aren't destroyed polymorphically
and possibly that they aren't even used polymorphically. If that's the
case, it might be possible to refactor the two ArgList types more
separately and simplify the Arg ownership model. *continues
experimenting*

llvm-svn: 206727
2014-04-20 23:59:00 +00:00
David Blaikie
f89b4c6c30 Use unique_ptr to handle ownership of synthesized args in DerivedArgList
This might be able to be simplified further by using Arg as a value type
in a linked list (to maintain pointer validity), but here's something
simple to start with.

llvm-svn: 206724
2014-04-20 22:37:46 +00:00
Richard Smith
1eddccc678 C++ has a bool type! (And C's had one too, for 15 years...)
llvm-svn: 206723
2014-04-20 22:15:37 +00:00
Richard Smith
840046247e More C++ification.
llvm-svn: 206722
2014-04-20 22:10:16 +00:00
Richard Smith
e7a6813c55 Remove some more C junk from these files.
llvm-svn: 206721
2014-04-20 21:56:02 +00:00
Richard Smith
bb9ac8f48d Don't provide two different definitions of ModRMDecision, OpcodeDecision, and ContextDecision in different source files (depending on #define magic).
llvm-svn: 206720
2014-04-20 21:52:16 +00:00
Richard Smith
5ba5f90c69 Don't define llvm::X86Disassembler::InstructionSpecifier in different ways in
different source files.

llvm-svn: 206719
2014-04-20 21:35:26 +00:00
Richard Smith
a7b186c4d8 Maybe if I touch this file the buildbots will actually rerun configure like they need to...
llvm-svn: 206718
2014-04-20 21:28:33 +00:00
Richard Smith
84281551ab What year is it! This file has no reason to be written in C, and has doubly no
reason to expose a global symbol 'decodeInstruction' nor to pollute the global
scope with a bunch of external linkage entities (some of which conflict with
others elsewhere in LLVM).

This is just the initial transition to C++; more cleanups to follow.

llvm-svn: 206717
2014-04-20 21:07:34 +00:00
Alp Toker
faee7c31dd Remove some empty statements
Cleanup only.

llvm-svn: 206710
2014-04-19 23:56:35 +00:00
Justin Bogner
73a3bf0679 ProfileData: Remove an extra semicolon
Spotted by Nick Lewycky in review, thanks!

llvm-svn: 206708
2014-04-19 23:42:50 +00:00
Duncan P. N. Exon Smith
f65036e329 Revert "blockfreq: Rewrite BlockFrequencyInfoImpl"
This reverts commit r206704, as expected.

llvm-svn: 206707
2014-04-19 22:46:00 +00:00
Duncan P. N. Exon Smith
707997192f Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl"
This reverts commit r206677, reapplying my BlockFrequencyInfo rewrite.

I've done a careful audit, added some asserts, and fixed a couple of
bugs (unfortunately, they were in unlikely code paths).  There's a small
chance that this will appease the failing bots [1][2].  (If so, great!)

If not, I have a follow-up commit ready that will temporarily add
-debug-only=block-freq to the two failing tests, allowing me to compare
the code path between what the failing bots and what my machines (and
the rest of the bots) are doing.  Once I've triggered those builds, I'll
revert both commits so the bots go green again.

[1]: http://bb.pgr.jp/builders/ninja-x64-msvc-RA-centos6/builds/1816
[2]: http://llvm-amd64.freebsd.your.org/b/builders/clang-i386-freebsd/builds/18445

<rdar://problem/14292693>

llvm-svn: 206704
2014-04-19 22:34:26 +00:00
Yaron Keren
407a465a3d Patch by Vadim Chugunov
Win64 stack unwinder gets confused when execution flow "falls through" after
a call to 'noreturn' function. This fixes the "missing epilogue" problem by 
emitting a trap instruction for IR 'unreachable' on x86_x64-pc-windows.

A secondary use for it would be for anyone wanting to make double-sure that
'noreturn' functions, indeed, do not return.

llvm-svn: 206684
2014-04-19 13:47:43 +00:00
Yaron Keren
47e8a019e4 Patch by Ray Donnelly to print register names instead of numbers.
http://reviews.llvm.org/D3422

llvm-svn: 206683
2014-04-19 05:40:09 +00:00
David Blaikie
322880afda Add parens to appease GCC warning.
llvm-svn: 206678
2014-04-19 00:50:15 +00:00
Duncan P. N. Exon Smith
0ee9548e22 Revert "blockfreq: Rewrite BlockFrequencyInfoImpl" (#2)
This reverts commit r206666, as planned.

Still stumped on why the bots are failing.  Sanitizer bots haven't
turned anything up.  If anyone can help me debug either of the failures
(referenced in r206666) I'll owe them a beer.  (In the meantime, I'll be
auditing my patch for undefined behaviour.)

llvm-svn: 206677
2014-04-19 00:42:46 +00:00
Justin Bogner
40987a4daf OnDiskHashTable: Audit types and use offset_type consistently
llvm-svn: 206675
2014-04-19 00:33:15 +00:00
Nick Lewycky
bd9ff641e7 Check whether functions have any lines associated before emitting coverage info for them. This isn't just a size/time saving, gcov may crash on these.
llvm-svn: 206671
2014-04-18 23:32:28 +00:00
Kevin Enderby
2bb5aba324 Change the ARM assembler to require a :lower16: or :upper16 on non-constant
expressions for mov instructions instead of silently truncating by default.

For the ARM assembler, we want to avoid misleadingly allowing something
like "mov r0, <symbol>" especially when we turn it into a movw and the
expression <symbol> does not have a :lower16: or :upper16" as part of the
expression.  We don't want the behavior of silently truncating, which can be
unexpected and lead to bugs that are difficult to find since this is an easy
mistake to make.

This does change the previous behavior of llvm but actually matches an
older gnu assembler that would not allow this but print less useful errors
of like “invalid constant (0x927c0) after fixup” and “unsupported relocation on
symbol foo”.  The error for llvm is "immediate expression for mov requires
:lower16: or :upper16" with correct location information on the operand
as shown in the added test cases.

rdar://12342160

llvm-svn: 206669
2014-04-18 23:06:39 +00:00
Duncan P. N. Exon Smith
66e247e69c Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl" (#2)
This reverts commit r206628, reapplying r206622 (and r206626).

Two tests are failing only on buildbots [1][2]: i.e., I can't reproduce
on Darwin, and Chandler can't reproduce on Linux.  Asan and valgrind
don't tell us anything, but we're hoping the msan bot will catch it.

So, I'm applying this again to get more feedback from the bots.  I'll
leave it in long enough to trigger builds in at least the sanitizer
buildbots (it was failing for reasons unrelated to my commit last time
it was in), and hopefully a few others.... and then I expect to revert a
third time.

[1]: http://bb.pgr.jp/builders/ninja-x64-msvc-RA-centos6/builds/1816
[2]: http://llvm-amd64.freebsd.your.org/b/builders/clang-i386-freebsd/builds/18445

llvm-svn: 206666
2014-04-18 22:30:03 +00:00
Alexey Samsonov
b94b4557c0 [llvm-symbolizer] Print file/line for a PC even if there is no DIE describing it.
This is important for symbolizing executables with debug info in
unavailable .dwo files. Even if all DIE entries are missing, we can
still symbolize an address: function name can be fetched from symbol table,
and file/line info can be fetched from line table.

llvm-svn: 206665
2014-04-18 22:22:44 +00:00
Justin Bogner
d9f7325c10 ProfileData: Don't forward declare ComputeHash and make it static inline
llvm-svn: 206663
2014-04-18 22:00:22 +00:00
David Blaikie
d6a2d14707 Compress debug sections only when beneficial.
Both ZLIB and the debug info compressed section header ("ZLIB" + the
size of the uncompressed data) take some constant overhead so in some
cases the compressed data is actually larger than the uncompressed data.
In these cases, just don't compress or rename the section at all.

llvm-svn: 206659
2014-04-18 21:52:26 +00:00
Justin Bogner
426c7606ff ProfileData: Add support for the indexed instrprof format
This adds support for an indexed instrumentation based profiling
format, which is just a small header and an on disk hash table.  This
format will be used by clang's -fprofile-instr-use= for PGO.

llvm-svn: 206656
2014-04-18 21:48:40 +00:00
Alexey Samsonov
5a3863a395 [DWARF parser] Turn DILineInfo into a struct.
Immutable DILineInfo doesn't bring any benefits and complicates
code. Also, use std::string instead of SmallString<16> for file
and function names - their length can vary significantly.

No functionality change.

llvm-svn: 206654
2014-04-18 21:36:39 +00:00
David Blaikie
3465898e26 Update the fragments of symbols in compressed sections.
While unnamed relocations are already cached in side tables in
ELFObjectWriter::RecordRelocation, symbols still need their fragments
updated to refer to the newly compressed fragment (even if that fragment
isn't big enough to fit the offset). Even though we only create
temporary symbols in debug info sections this comes up in 32 bit builds
where even temporary symbols in mergeable sections (such as debug_str)
have to be emitted as named symbols.

I tried a few other ways to do this but they all didn't work for various
reasons:

1) Canonicalize the MCSymbolData in RecordRelocation, nulling out the
Fragment (so it didn't have to be updated by CompressDebugSection). This
doesn't work because some code relies on symbols having fragments to
indicate that they're defined, I think.

2) Canonicalize the MCSymbolData in RecordRelocation to be "first
fragment + absolute offset" so it would be cheaper to just test and
update the fragment in CompressDebugSections. This doesn't work because
the offset computed in RecordRelocation isn't that of the symbol's
fragment, it's the passed in fragment (I haven't figured out what that
fragment is - perhaps it's the location where the relocation is to be
written). And if the fragment offset has to be computed only for this
use we might as well just do it when we need to, in
CompressDebugSection.

I also added an assert to help catch this a bit more clearly, even
though it is UB. The test case improvements would either assert fail
and/or valgrind vail without the fix, even if they wouldn't necessarily
fail the FileCheck output.

llvm-svn: 206653
2014-04-18 21:24:12 +00:00
Chad Rosier
0edf159537 [ARM64] Ports the Cortex-A53 Machine Model description from AArch64.
Summary:
This port includes the rudimentary latencies that were provided for
the Cortex-A53 Machine Model in the AArch64 backend. It also changes
the SchedAlias for COPY in the Cyclone model to an explicit
WriteRes mapping to avoid conflicts in other subtargets.

Differential Revision: http://reviews.llvm.org/D3427
Patch by Dave Estes <cestes@codeaurora.org>!

llvm-svn: 206652
2014-04-18 21:22:04 +00:00
Chandler Carruth
843e9b39b8 [LCG] Fix the bugs that Ben pointed out in code review (and the MSan bot
caught). Sad that we don't have warnings for these things, but bleh, no
idea how to fix that.

llvm-svn: 206646
2014-04-18 20:44:16 +00:00
Alexey Samsonov
f021cb1cc1 [DWARF parser] Respect address ranges specified in compile unit DIE.
When address ranges for compile unit are specified in compile unit DIE
itself, there is no need to collect ranges from children subprogram DIEs.

This change speeds up llvm-symbolizer on Clang-produced binaries with
full debug info. For instance, symbolizing a first address in a 1Gb binary
is now 2x faster (1s vs. 2s).

llvm-svn: 206641
2014-04-18 20:30:27 +00:00
Benjamin Kramer
eadee1840d Remove a couple of redundant copies of SmallVector::operator==.
No functionality change.

llvm-svn: 206635
2014-04-18 19:48:03 +00:00
Adam Nemet
2e62945692 [X86] Improve buildFromShuffleMostly for AVX
For a 256-bit BUILD_VECTOR consisting mostly of shuffles of 256-bit vectors,
both the BUILD_VECTOR and its operands may need to be legalized in multiple
steps.  Consider:

(v8f32 (BUILD_VECTOR (extract_vector_elt (v8f32 %vreg0,) Constant<1>),
                     (extract_vector_elt %vreg0, Constant<2>),
                     (extract_vector_elt %vreg0, Constant<3>),
                     (extract_vector_elt %vreg0, Constant<4>),
                     (extract_vector_elt %vreg0, Constant<5>),
                     (extract_vector_elt %vreg0, Constant<6>),
                     (extract_vector_elt %vreg0, Constant<7>),
                     %vreg1))

a. We can't build a 256-bit vector efficiently so, we need to split it into
two 128-bit vecs and combine them with VINSERTX128.

b. Operands like (extract_vector_elt (v8f32 %vreg0), Constant<7>) needs to be
split into a VEXTRACTX128 and a further extract_vector_elt from the
resulting 128-bit vector.

c. The extract_vector_elt from b. is lowered into a shuffle to the first
element and a movss.

Depending on the order in which we legalize the BUILD_VECTOR and its
operands[1], buildFromShuffleMostly may be faced with:

(v4f32 (BUILD_VECTOR (extract_vector_elt
                      (vector_shuffle<1,u,u,u> (extract_subvector %vreg0, Constant<4>), undef),
                      Constant<0>),
                     (extract_vector_elt
                      (vector_shuffle<2,u,u,u> (extract_subvector %vreg0, Constant<4>), undef),
                      Constant<0>),
                     (extract_vector_elt
                      (vector_shuffle<3,u,u,u> (extract_subvector %vreg0, Constant<4>), undef),
                      Constant<0>),
                     %vreg1))

In order to figure out the underlying vector and their identity we need to see
through the shuffles.

[1] Note that the order in which operations and their operands are legalized is
only guaranteed in the first iteration of LegalizeDAG.

Fixes <rdar://problem/16296956>

llvm-svn: 206634
2014-04-18 19:44:16 +00:00
Benjamin Kramer
cbe7245a0f DebugInfo: Remove some initializer lists to make MSVC happy again.
llvm-svn: 206632
2014-04-18 19:01:53 +00:00
David Blaikie
f7ac1be0ce Add range access to MCAssembler's symbol collection.
llvm-svn: 206631
2014-04-18 18:24:25 +00:00
Duncan P. N. Exon Smith
80fdbd652d Revert "blockfreq: Rewrite BlockFrequencyInfoImpl" (#2)
This reverts commit r206622 and the MSVC fixup in r206626.

Apparently the remotely failing tests are still failing, despite my
attempt to fix the nondeterminism in r206621.

llvm-svn: 206628
2014-04-18 17:56:08 +00:00
Duncan P. N. Exon Smith
b881681eb9 Fixing MSVC after r206622?
llvm-svn: 206626
2014-04-18 17:38:01 +00:00
Andrew Trick
13e85b6249 Better comments to explain buffered/unbuffered processor resources.
llvm-svn: 206625
2014-04-18 17:35:08 +00:00
Alexey Samsonov
ea5a42fe9c [DWARF parser] Refactor fetching DIE address ranges.
Add a helper method to get address ranges specified in a DIE
(either by DW_AT_low_pc/DW_AT_high_pc, or by DW_AT_ranges). Use it
to untangle and simplify the code.

No functionality change.

llvm-svn: 206624
2014-04-18 17:25:46 +00:00
Duncan P. N. Exon Smith
cf746f5ff0 Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl"
This reverts commit r206556, effectively reapplying commit r206548 and
its fixups in r206549 and r206550.

In an intervening commit I've added target triples to the tests that
were failing remotely [1] (but passing locally).  I'm hoping the mystery
is solved?  I'll revert this again if the tests are still failing
remotely.

[1]: http://bb.pgr.jp/builders/ninja-x64-msvc-RA-centos6/builds/1816

llvm-svn: 206622
2014-04-18 17:22:25 +00:00
Tim Northover
6da78986c9 ARM64: disable generation of .loh directives outside MachO.
Part of PR19455.

llvm-svn: 206611
2014-04-18 14:54:46 +00:00
Tim Northover
f264cc2d60 ARM64: don't emit .subsections_via_symbols on ELF.
Part of PR19455.

llvm-svn: 206610
2014-04-18 14:54:41 +00:00
Tim Northover
f3e0ceb127 ARM64: add extra NEG pattern.
llvm-svn: 206609
2014-04-18 14:54:35 +00:00
Tim Northover
56351e91d9 AArch64/ARM64: add non-scalar lowering for more FCVT operations.
llvm-svn: 206591
2014-04-18 13:16:42 +00:00
Tim Northover
de9624364e AArch64/ARM64: improve spotting of EXT instructions from VECTOR_SHUFFLE.
We couldn't cope if the first mask element was UNDEF before, which
isn't ideal.

llvm-svn: 206588
2014-04-18 12:50:58 +00:00
Evgeniy Stepanov
de38078fd6 [msan] Add -msan-instrumentation-with-call-threshold.
This flag replaces inline instrumentation for checks and origin stores with
calls into MSan runtime library. This is a workaround for PR17409.

Disabled by default.

llvm-svn: 206585
2014-04-18 12:17:20 +00:00
Chandler Carruth
3104562756 [LCG] Remove all of the complexity stemming from supporting copying.
Reality is that we're never going to copy one of these. Supporting this
was becoming a nightmare because nothing even causes it to compile most
of the time. Lots of subtle errors built up that wouldn't have been
caught by any "normal" testing.

Also, make the move assignment actually work rather than the bogus swap
implementation that would just infloop if used. As part of that, factor
out the graph pointer updates into a helper to share between move
construction and move assignment.

llvm-svn: 206583
2014-04-18 11:02:33 +00:00
Chandler Carruth
d0707ed2ba [LCG] Add support for building persistent and connected SCCs to the
LazyCallGraph. This is the start of the whole point of this different
abstraction, but it is just the initial bits. Here is a run-down of
what's going on here. I'm planning to incorporate some (or all) of this
into comments going forward, hopefully with better editing and wording.
=]

The crux of the problem with the traditional way of building SCCs is
that they are ephemeral. The new pass manager however really needs the
ability to associate analysis passes and results of analysis passes with
SCCs in order to expose these analysis passes to the SCC passes. Making
this work is kind-of the whole point of the new pass manager. =]

So, when we're building SCCs for the call graph, we actually want to
build persistent nodes that stick around and can be reasoned about
later. We'd also like the ability to walk the SCC graph in more complex
ways than just the traditional postorder traversal of the current CGSCC
walk. That means that in addition to being persistent, the SCCs need to
be connected into a useful graph structure.

However, we still want the SCCs to be formed lazily where possible.

These constraints are quite hard to satisfy with the SCC iterator. Also,
using that would bypass our ability to actually add data to the nodes of
the call graph to facilite implementing the Tarjan walk. So I've
re-implemented things in a more direct and embedded way. This
immediately makes it easy to get the persistence and connectivity
correct, and it also allows leveraging the existing nodes to simplify
the algorithm. I've worked somewhat to make this implementation more
closely follow the traditional paper's nomenclature and strategy,
although it is still a bit obtuse because it isn't recursive, using
an explicit stack and a tail call instead, and it is interruptable,
resuming each time we need another SCC.

The other tricky bit here, and what actually took almost all the time
and trials and errors I spent building this, is exactly *what* graph
structure to build for the SCCs. The naive thing to build is the call
graph in its newly acyclic form. I wrote about 4 versions of this which
did precisely this. Inevitably, when I experimented with them across
various use cases, they became incredibly awkward. It was all
implementable, but it felt like a complete wrong fit. Square peg, round
hole. There were two overriding aspects that pushed me in a different
direction:

1) We want to discover the SCC graph in a postorder fashion. That means
   the root node will be the *last* node we find. Using the call-SCC DAG
   as the graph structure of the SCCs results in an orphaned graph until
   we discover a root.

2) We will eventually want to walk the SCC graph in parallel, exploring
   distinct sub-graphs independently, and synchronizing at merge points.
   This again is not helped by the call-SCC DAG structure.

The structure which, quite surprisingly, ended up being completely
natural to use is the *inverse* of the call-SCC DAG. We add the leaf
SCCs to the graph as "roots", and have edges to the caller SCCs. Once
I switched to building this structure, everything just fell into place
elegantly.

Aside from general cleanups (there are FIXMEs and too few comments
overall) that are still needed, the other missing piece of this is
support for iterating across levels of the SCC graph. These will become
useful for implementing #2, but they aren't an immediate priority.

Once SCCs are in good shape, I'll be working on adding mutation support
for incremental updates and adding the pass manager that this analysis
enables.

llvm-svn: 206581
2014-04-18 10:50:32 +00:00
Benjamin Kramer
0b863e9a98 X86: Pattern match scalar loads + vcvtph2ps into just vcvtph2ps.
vcvtph2ps only reads the lower 64 bits of the address passed to the
intrinsic.

llvm-svn: 206579
2014-04-18 10:45:33 +00:00
Chandler Carruth
583964878f Revert r206565 (and r206566 which updated tests).
This commit was attributed to a different person from the person who
posted the patch to the list, and the person who posted it the list
claimed when they did that they were not the author, but that the author
was yet a third person. I don't know what is going on here, but
reverting until the attribution is clear and the author has explicitly
contributed the patch.

Also, the review hasn't really involved any of the MC maintainers and
that seems questionable too.

llvm-svn: 206576
2014-04-18 09:35:51 +00:00
Tim Northover
23ca911ed1 AArch64/ARM64: spot a greater variety of concat_vector operations.
Code mostly copied from AArch64, just tidied up a trifle and plumbed
into the ARM64 way of doing things.

This also enables the AArch64 tests which inspired the previous
untested commits.

llvm-svn: 206574
2014-04-18 09:31:27 +00:00
Tim Northover
1584cfd1c5 ARM64: implement cunning optimisation from AArch64
A vector extract followed by a dup can become a single instruction even if the
types don't match. AArch64 handled this in ISelLowering, but a few reasonably
simple patterns can take care of it in TableGen, so that's where I've put it.

llvm-svn: 206573
2014-04-18 09:31:20 +00:00
Tim Northover
bb94a88804 ARM64: spot a vector_shuffle that maps to INS and expand.
Tests will be coming very shortly when all the optimisations needed to
support AArch64's neon-copy.ll file are committed.

llvm-svn: 206572
2014-04-18 09:31:15 +00:00
Tim Northover
e3c3a026a1 ARM64: nick some AArch64 patterns for extract/insert -> INS.
Tests will be committed shortly when all optimisations needed to
support AArch64's neon-copy.ll file are supported.

llvm-svn: 206571
2014-04-18 09:31:11 +00:00
Tim Northover
21403d6f09 AArch64/ARM64: emit all vector FP comparisons as such.
ARM64 was scalarizing some vector comparisons which don't quite map to
AArch64's compare and mask instructions. AArch64's approach of sacrificing a
little efficiency to emulate them with the limited set available was better, so
I ported it across.

More "inspired by" than copy/paste since the backend's internal expectations
were a bit different, but the tests were invaluable.

llvm-svn: 206570
2014-04-18 09:31:07 +00:00
Tim Northover
1828862541 AArch64/ARM64: port BSL logic from AArch64 & enable test.
I enhanced it a little in the process. The decision shouldn't really be beased
on whether a BUILD_VECTOR is a splat: any set of constants will do the job
provided they're related in the correct way.

Also, the BUILD_VECTOR could be any operand of the incoming AND nodes, so it's
best to check for all 4 possibilities rather than assuming it'll be the RHS.

llvm-svn: 206569
2014-04-18 09:31:01 +00:00
Tim Northover
2b48b866aa AArch64/ARM64: copy byval implementation from AArch64.
It's not actually used to handle C or C++ ABI rules on ARM64, but could well be
emitted by other language front-ends, so it's as well to have a sensible
implementation.

llvm-svn: 206568
2014-04-18 09:30:52 +00:00
Yaron Keren
e48a1d6c0b Patch by Ray Donnelly.
Emit WIN64 SEH registers by name instead of just number.

llvm-svn: 206565
2014-04-18 08:03:38 +00:00
Kostya Serebryany
2b02920109 [asan] one more workaround for PR17409: don't do BB-level coverage instrumentation if there are more than N (=1500) basic blocks. This makes ASanCoverage work on libjpeg_turbo/jchuff.c used by Chrome, which has 1824 BBs
llvm-svn: 206564
2014-04-18 08:02:42 +00:00
Jiangning Liu
57e94eee58 This commit allows vectorized loops to be unrolled by a factor of 2 for AArch64.
A new test case is also added for ARM64.

Patched by Z.Zheng

llvm-svn: 206563
2014-04-18 07:57:54 +00:00
Matt Arsenault
de91105f57 R600: Minor cleanups.
Fix indentation, better line wrapping, unused includes.

llvm-svn: 206562
2014-04-18 07:40:20 +00:00
Lang Hames
b12d0547e6 [ExecutionEngine] Allow JIT clients to enable/disable module verification.
Previously module verification was always enabled, with no way to turn it off.
As of this commit, module verification is on by default in Debug builds, and off
by default in release builds. The default behaviour can be overridden by calling
setVerifyModules(bool) on the JIT instance (this works for both the old JIT, and
MCJIT).

<rdar://problem/16150008>

llvm-svn: 206561
2014-04-18 06:48:23 +00:00
Jiangning Liu
6aa9a901c7 This is one of the optimizations ported from ARM64 to AArch64 to address the performance gap between these two back ends. The test case newly added for AArch64 already exists in ARM64.
Patched by Z.Zheng

llvm-svn: 206559
2014-04-18 05:58:09 +00:00
Matt Arsenault
6b6f53eaec R600/SI: Try to use scalar BFE.
Use scalar BFE with constant shift and offset when possible.
This is complicated by the fact that the scalar version packs
the two operands of the vector version into one.

llvm-svn: 206558
2014-04-18 05:19:26 +00:00
Jiangning Liu
fcc0f2379a This commit enables unaligned memory accesses of vector types on AArch64 back end. This should boost vectorized code performance.
Patched by Z. Zheng

llvm-svn: 206557
2014-04-18 03:58:38 +00:00
Duncan P. N. Exon Smith
79011f6e40 Revert "blockfreq: Rewrite BlockFrequencyInfoImpl"
This reverts commits r206548, r206549 and r206549.

There are some unit tests failing that aren't failing locally [1], so
reverting until I have time to investigate.

[1]: http://bb.pgr.jp/builders/ninja-x64-msvc-RA-centos6/builds/1816

llvm-svn: 206556
2014-04-18 02:17:43 +00:00
Duncan P. N. Exon Smith
6179ba903c blockfreq: Really fix r206548 (and r206549)
Turns out this code is dead.

llvm-svn: 206554
2014-04-18 02:10:09 +00:00