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Commit Graph

147129 Commits

Author SHA1 Message Date
Sam Kolton
0b70fd1739 [AMDGPU] Resubmit SDWA peephole: enable by default
Reviewers: vpykhtin, rampitec, arsenm

Subscribers: qcolombet, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D31671

llvm-svn: 299654
2017-04-06 15:03:28 +00:00
Jonas Paulsson
57a6487409 [SelectionDAG] NFC patch removing a redundant check.
Since the BUILD_VECTOR has already been checked by
isBuildVectorOfConstantSDNodes() in SelectionDAG::getNode() for a
SIGN_EXTEND_INREG, it can be assumed that Op is always either undef or a
ConstantSDNode, and Ops.size() will always equal VT.getVectorNumElements().

llvm-svn: 299647
2017-04-06 13:00:37 +00:00
Simon Pilgrim
b900745649 [X86][MMX] Test showing failure to create MMX non-temporal store
llvm-svn: 299640
2017-04-06 10:32:30 +00:00
Daniel Sanders
64f3f18f53 [globalisel][tablegen] Move <Target>InstructionSelector declarations to anonymous namespaces
Summary: This resolves the issue of tablegen-erated includes in the headers for non-GlobalISel builds in a simpler way than before.

Reviewers: qcolombet, ab

Reviewed By: ab

Subscribers: igorb, ab, mgorny, dberris, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D30998

llvm-svn: 299637
2017-04-06 09:49:34 +00:00
David Green
be4cc9fc51 [ARM] Remove a dead ADD during the creation of TBBs
During the optimisation of jump tables in the constant island pass,
an extra ADD could be left over, now dead but not removed.

Differential Revision: https://reviews.llvm.org/D31389

llvm-svn: 299634
2017-04-06 08:32:47 +00:00
Craig Topper
c3e279d063 [InstSimplify] Add test cases for mixing add/sub i1 with xor of i1. Seems we can simplify in one direction but not the other.
llvm-svn: 299627
2017-04-06 05:48:06 +00:00
Craig Topper
1b82c553d5 [InstSimplify] Teach SimplifyAddInst and SimplifySubInst that vectors of i1 can be treated as Xor too.
llvm-svn: 299626
2017-04-06 05:28:41 +00:00
Dean Michael Berris
6e06198232 [XRay][docs] Fix hyperlink to XRay doc
llvm-svn: 299624
2017-04-06 04:26:26 +00:00
Lang Hames
74f28aa8b6 [Orc] Add missing header include for r299611.
llvm-svn: 299623
2017-04-06 04:12:47 +00:00
Craig Topper
af5e07dfff Revert accidental commit of r299619.
llvm-svn: 299622
2017-04-06 04:04:10 +00:00
Craig Topper
7a2fb0e3f1 Revert accidental commit of r299618
llvm-svn: 299621
2017-04-06 04:03:34 +00:00
Craig Topper
8970a34404 [IR] Add commutable matchers for Add and Mul to go with the logic operations that are already present. NFC
llvm-svn: 299620
2017-04-06 04:02:33 +00:00
Craig Topper
47567b2b71 bar
llvm-svn: 299619
2017-04-06 04:02:31 +00:00
Craig Topper
8886f39d38 foo
llvm-svn: 299618
2017-04-06 04:02:28 +00:00
Keith Wyss
1505d573c2 [XRay] - Fix spelling error to test commit access.
Just a spelling change in a comment intended to test svn commit access.

llvm-svn: 299616
2017-04-06 03:32:01 +00:00
Lang Hames
dbf477f83a [Orc] Break QueueChannel out into its own header and add a utility,
createPairedQueueChannels, to simplify channel creation in the RPC unit tests.

llvm-svn: 299611
2017-04-06 01:49:21 +00:00
Lang Hames
55f68c12d5 [Orc] Make orcError return an error_code rather than Error.
This will allow orcError to be used in convertToErrorCode implementations,
which will help in transitioning Orc RPC to Error.

llvm-svn: 299610
2017-04-06 01:35:13 +00:00
Reid Kleckner
5972ba002c [lit] Implement timeouts and max_time for process pool testing
This is necessary to pass the lit test suite at llvm/utils/lit/tests.

There are some pre-existing failures here, but now switching to pools
doesn't regress any tests.

I had to change test-data/lit.cfg to import DummyConfig from a module to
fix pickling problems, but I think it'll be OK if we require test
formats to be written in real .py modules outside lit.cfg files.

I also discovered that in some circumstances AsyncResult.wait() will not
raise KeyboardInterrupt in a timely manner, but you can pass a non-zero
timeout to work around this. This makes threading.Condition.wait use a
polling loop that runs through the interpreter, so it's capable of
asynchronously raising KeyboardInterrupt.

llvm-svn: 299605
2017-04-06 00:38:28 +00:00
Peter Collingbourne
1fe52605ee StringTableBuilder: Don't assert when writing an empty raw string table.
llvm-svn: 299602
2017-04-06 00:10:17 +00:00
Peter Collingbourne
5d16f6a250 Bitcode: Remove an unused declaration. NFC.
llvm-svn: 299598
2017-04-05 22:49:52 +00:00
Bryant Wong
4e9b1eac89 [Bugpoint] Use unique_ptr correctly.
Moving Modules into `testMergedProgram` is incorrect (and causes segmentation
faults) since all callers expect to retain ownership. This is evidenced by the
later calls to `unique_ptr<Module>::get` in the same function.

Differential Revision: https://reviews.llvm.org/D31727

llvm-svn: 299596
2017-04-05 22:23:48 +00:00
Keno Fischer
c27c9fda8a [X86 TTI] Implement LSV hook
Summary:
LSV wants to know the maximum size that can be loaded to a vector register.
On X86, this always matches the maximum register width. Implement this
accordingly and add a test to make sure that LSV can vectorize up to the
maximum permissible width on X86.

Reviewers: delena, arsenm

Reviewed By: arsenm

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D31504

llvm-svn: 299589
2017-04-05 20:51:38 +00:00
Ivan Krasin
53c893e263 Remove accidental debug printf. Follow up to r299583.
llvm-svn: 299584
2017-04-05 20:07:43 +00:00
Ivan Krasin
f25940dbd7 Revert r299536. [AMDGPU] SDWA peephole: enable by default.
Reason: breaks multiple bots:

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/3988
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/1173

Original Review URL: https://reviews.llvm.org/D31671

llvm-svn: 299583
2017-04-05 19:58:12 +00:00
Krzysztof Parzyszek
b037805178 [Hexagon] Use -mattr to select HVX mode in a testcase, NFC
llvm-svn: 299582
2017-04-05 19:46:37 +00:00
Daniel Berlin
eae8ec3193 MemorySSA: Remove MemorySSA walker caching.
Summary:
Remove all the caching the clobber walker does, and that the
caching walker does.  With the patch to enable storing clobbering
access results for stores, i can find no improvement with the cache
turned on (and a number of degradations, both time and memory, from
the cost of caching.  For a large program i have, we do millions of
lookups and inserts with zero hits).

I haven't tried to rename or simplify the walker otherwise yet.

(Appreciate some perf testing on this past my own testing)

Reviewers: george.burgess.iv, davide

Subscribers: Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D31576

llvm-svn: 299578
2017-04-05 19:01:58 +00:00
Petr Hosek
7c25606532 [llvm-readobj] Only print the real size of the note
Note payloads are padded to a multiple of 4 bytes in size, but the size
of the string that should be print can be smaller e.g. the n_descsz
field in gold's version note is 9, so that's the whole size of the
string that should be printed. The padding is part of the format of a
SHT_NOTE section or PT_NOTE segment, but it's not part of the note
itself.

Printing the extra null bytes may confuse some tools, e.g. when the
llvm-readobj is sent to grep, it treats the output as binary because
it contains a null byte.

Differential Revision: https://reviews.llvm.org/D30804

llvm-svn: 299576
2017-04-05 18:55:50 +00:00
Adam Nemet
f9970cbc84 [DAGCombine] Support FMF contract in fused multiple-and-sub too
This is a follow-on to r299096 which added support for fmadd.

Subtract does not have the case where with two multiply operands we commute in
order to fuse with the multiply with the fewer uses.

llvm-svn: 299572
2017-04-05 17:58:48 +00:00
Adam Nemet
33bb79be94 [DAGCombine] Remove commented-out code from r299096
llvm-svn: 299571
2017-04-05 17:58:44 +00:00
Sanjay Patel
df07f28660 [InstCombine] add fold for icmp with or mask of low bits (PR32542)
We already have these 'and' folds:

// X & -C == -C -> X >  u ~C
// X & -C != -C -> X <= u ~C
//   iff C is a power of 2

...but we were missing the 'or' siblings.

http://rise4fun.com/Alive/n6

This should improve:
https://bugs.llvm.org/show_bug.cgi?id=32524
...but there are 2 or more other pieces to fix still.

Differential Revision: https://reviews.llvm.org/D31712

llvm-svn: 299570
2017-04-05 17:57:05 +00:00
Keno Fischer
5d34206be4 [ExecutionDepsFix] Don't recurse over the CFG
Summary:
Use an explicit work queue instead, to avoid accidentally
causing stack overflows for input with very large CFGs.

Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D31681

llvm-svn: 299569
2017-04-05 17:42:56 +00:00
Sanjay Patel
9fe8d049ec [InstCombine] fix formatting and variable names; NFCI
There must be some opportunity to refactor big chunks of nearly duplicated code in FoldOrOfICmps / FoldAndOfICmps.
Also, none of this works with vectors, but it should.

llvm-svn: 299568
2017-04-05 17:38:34 +00:00
Dmitry Preobrazhensky
659728e389 [AMDGPU][MC] Fix for Bug 28158 + LIT tests
Added support of the following instructions:
- s_cbranch_cdbgsys
- s_cbranch_cdbgsys_and_user
- s_cbranch_cdbgsys_or_user
- s_cbranch_cdbguser
- s_setkill

Reviewers: vpykhtin

Differential Revision: https://reviews.llvm.org/D31469

llvm-svn: 299567
2017-04-05 17:26:45 +00:00
Daniel Berlin
07dceae344 MemorySSA: Fix and use optimized_def_chain
llvm-svn: 299566
2017-04-05 17:26:25 +00:00
Reid Kleckner
75978a9b78 [lit] Revert to old execution strategy while I debug these pickling errors
llvm-svn: 299565
2017-04-05 17:16:37 +00:00
Reid Kleckner
a301eb1973 [lit] Use Python 3 style print to satisfy some bots
llvm-svn: 299564
2017-04-05 17:05:31 +00:00
Matthias Braun
69bb613924 ARMFrameLowering: Slight cleanups; NFC
llvm-svn: 299562
2017-04-05 16:58:41 +00:00
Reid Kleckner
ffe34e060c [lit] Use process pools for test execution by default
Summary:
This drastically reduces lit test execution startup time on Windows. Our
previous strategy was to manually create one Process per job and manage
the worker pool ourselves. Instead, let's use the worker pool provided
by multiprocessing.  multiprocessing.Pool(jobs) returns almost
immediately, and initializes the appropriate number of workers, so they
can all start executing tests immediately. This avoids the ramp-up
period that the old implementation suffers from.  This appears to speed
up small test runs.

Here are some timings of the llvm-readobj tests on Windows using the
various execution strategies:

 # multiprocessing.Pool:
$ for i in `seq 1 3`; do tim python ./bin/llvm-lit.py -sv ../llvm/test/tools/llvm-readobj/ --use-process-pool |& grep real: ; done
real: 0m1.156s
real: 0m1.078s
real: 0m1.094s

 # multiprocessing.Process:
$ for i in `seq 1 3`; do tim python ./bin/llvm-lit.py -sv ../llvm/test/tools/llvm-readobj/ --use-processes |& grep real: ; done
real: 0m6.062s
real: 0m5.860s
real: 0m5.984s

 # threading.Thread:
$ for i in `seq 1 3`; do tim python ./bin/llvm-lit.py -sv ../llvm/test/tools/llvm-readobj/ --use-threads |& grep real: ; done
real: 0m9.438s
real: 0m10.765s
real: 0m11.079s

I kept the old code to launch processes in case this change doesn't work
on all platforms that LLVM supports, but at some point I would like to
remove both the threading and old multiprocessing execution strategies.

Reviewers: modocache, rafael

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31677

llvm-svn: 299560
2017-04-05 16:44:56 +00:00
Renato Golin
5f6382ce39 [ARM] Try to re-enable MachineBranchProb.ll for ARM/AArch64
Commit r298799 changed code that made the XFAIL on MachineBranchProb.ll
irrelevant, but some configurations still failed. I can't reproduce it
locally, so I'm hoping that enabling this will tell me if some
configurations will really fail or if they were just too slow.

llvm-svn: 299558
2017-04-05 16:27:11 +00:00
Sanjay Patel
d474da0792 [InstCombine] add tests for missing icmp fold (PR32524)
llvm-svn: 299557
2017-04-05 16:21:38 +00:00
Dmitry Preobrazhensky
37ee3681af [AMDGPU][MC] Fix for Bug 28167 + LIT tests
Corrected src0 for v_writelane_b32:
- Enabled inline constants and literals for SI/CI (VOP2)
- Enabled inline constants for VI (VOP3)

Reviewers: vpykhtin, arsenm

https://reviews.llvm.org/D31463

llvm-svn: 299555
2017-04-05 16:08:21 +00:00
Nirav Dave
7ec57298c0 [SystemZ] Prevent Merging Bitcast with non-normal loads
Fixes PR32505.

Reviewers: uweigand, jonpa

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31609

llvm-svn: 299552
2017-04-05 15:42:48 +00:00
Davide Italiano
63946788d8 [yaml2obj] Factor out error handling code.
llvm-svn: 299551
2017-04-05 15:18:16 +00:00
Davide Italiano
f17960676f [llvm-ar] Remove unneeded std::, NFCI.
This makes it more consistent with other exit() calls in llvm-ar
(and the tools in general).

llvm-svn: 299549
2017-04-05 15:05:05 +00:00
Davide Italiano
c830c23e31 [llvm-ar] errors go on stderr and not on stdout.
llvm-svn: 299548
2017-04-05 14:52:17 +00:00
Jonathan Roelofs
fdb54ce7e7 Respect CMAKE_INSTALL_MANDIR for sphinx generated manpages
This is a re-work of r297516, which was reverted in r297545.

https://reviews.llvm.org/D30906

llvm-svn: 299547
2017-04-05 14:49:46 +00:00
Davide Italiano
c6eb082245 [yaml2obj] Improve error message when output file cannot be opened.
Patch by Sam Clegg!

Differential Revision:  https://reviews.llvm.org/D31351

llvm-svn: 299546
2017-04-05 14:44:00 +00:00
Matthew Simpson
1512933518 [LV] Make test case more robust
This test case depends on the loop being vectorized without forcing the
vectorization factor. If the profitability ever changes in the future (due to
cost model improvements), the test may no longer work as intended. Instead of
checking the resulting IR, we should just check the instruction costs. The
costs will be computed regardless if vectorization is profitable.

llvm-svn: 299545
2017-04-05 14:34:13 +00:00
Sanjay Patel
bb37f0efa2 [DAGCombiner] add and use TLI hook to convert and-of-seteq / or-of-setne to bitwise logic+setcc (PR32401)
This is a generic combine enabled via target hook to reduce icmp logic as discussed in:
https://bugs.llvm.org/show_bug.cgi?id=32401

It's likely that other targets will want to enable this hook for scalar transforms, 
and there are probably other patterns that can use bitwise logic to reduce comparisons.

Note that we are missing an IR canonicalization for these patterns, and we will probably
prefer the pair-of-compares form in IR (shorter, more likely to fold).

Differential Revision: https://reviews.llvm.org/D31483

llvm-svn: 299542
2017-04-05 14:09:39 +00:00
Jonas Paulsson
168f955a23 [DAGCombiner] Don't make a BUILD_VECTOR with operands of illegal type.
When DAGCombiner visits a SIGN_EXTEND_INREG of a BUILD_VECTOR with
constant operands, a new BUILD_VECTOR node will be created transformed
constants.

Llvm-stress found a case where the new BUILD_VECTOR had constant operands
of an illegal type, because the (legal) element type is in fact not a legal
scalar type.

This patch changes this so that the new BUILD_VECTOR has the same operand
type as the old one.

Review: Eli Friedman, Nirav Dave
https://bugs.llvm.org//show_bug.cgi?id=32422

llvm-svn: 299540
2017-04-05 13:45:37 +00:00