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Author SHA1 Message Date
Nate Begeman
bbcae2bf3d Add checks to make sure we don't create bogus extend nodes, and fix a bug 
where we were doing exactly that which was causing failures on x86 and
alpha.

llvm-svn: 26284
 2006-02-18 02:40:58 +00:00
Evan Cheng
b3d9ee74ad Added fisttp for fp to int conversion. 
llvm-svn: 26283
 2006-02-18 02:36:28 +00:00
Evan Cheng
110f651cba Bump up pattern cost if the resulting instruction is marked 
usesCustomDAGSchedInserter.

llvm-svn: 26282
 2006-02-18 02:33:09 +00:00
Evan Cheng
d2ad380df9 Disable PIC for JIT. 
llvm-svn: 26281
 2006-02-18 01:49:25 +00:00
Chris Lattner
5f12d7c418 a previous patch completely disabled trivial unswitching, this fixees it. 
Thanks to nate for pointing this out :)

llvm-svn: 26280
 2006-02-18 01:32:04 +00:00
Chris Lattner
359476b89f initial trivial support for folding branches that have now-constant destinations. 
llvm-svn: 26279
 2006-02-18 01:27:45 +00:00
Evan Cheng
09bd678546 Jit does not support PIC yet. 
llvm-svn: 26278
 2006-02-18 00:57:10 +00:00
Chris Lattner
39356756ac When unswitching a loop, make sure to update loop info with exit blocks in 
the right loop.

llvm-svn: 26277
 2006-02-18 00:55:32 +00:00
Chris Lattner
d9b0de3240 Fix Transforms/SimplifyCFG/2006-02-17-InfiniteUnroll.ll 
llvm-svn: 26275
 2006-02-18 00:33:17 +00:00
Chris Lattner
7e722ae07c new testcase that crashes simplifycfg 
llvm-svn: 26274
 2006-02-18 00:32:44 +00:00
Evan Cheng
bf3558a375 x86 / Darwin PIC support. 
llvm-svn: 26273
 2006-02-18 00:15:05 +00:00
Evan Cheng
c4cda2b89a Moved PICEnabled to include/llvm/Target/TargetOptions.h 
llvm-svn: 26272
 2006-02-18 00:08:58 +00:00
Evan Cheng
bba9078fed Move PICEnabled declaration here. 
llvm-svn: 26271
 2006-02-18 00:06:03 +00:00
Chris Lattner
bd36f029ef Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn't 
exactly the API we wanted to call into.  This fixes the crash on crafty last
night.

llvm-svn: 26269
 2006-02-17 21:58:01 +00:00
Chris Lattner
c3c99f3a18 add a new method 
llvm-svn: 26268
 2006-02-17 21:57:00 +00:00
Nate Begeman
fff4228d3e A few final (for now) tests 
llvm-svn: 26267
 2006-02-17 21:38:45 +00:00
Nate Begeman
9f848d4c36 Yet another test 
llvm-svn: 26266
 2006-02-17 21:32:46 +00:00
Nate Begeman
79c1e470e6 New tests! 
llvm-svn: 26265
 2006-02-17 21:22:08 +00:00
Robert Bocchino
af94600ae5 Added documentation for vset and vselect. 
llvm-svn: 26264
 2006-02-17 21:18:08 +00:00
Nate Begeman
7ebd8fd80d Clean up DemandedBitsAreZero interface 
Make more use of the new mask helpers in valuetypes.h
Combine (sra (srl x, c1), c1) -> sext_inreg if legal

llvm-svn: 26263
 2006-02-17 19:54:08 +00:00
Nate Begeman
aef186befc Fix a nit sabre noticed 
llvm-svn: 26262
 2006-02-17 18:06:19 +00:00
Nate Begeman
a3a0a0340f Don't expand sdiv by power of two before legalize, since it will likely 
generate illegal nodes.

llvm-svn: 26261
 2006-02-17 07:26:20 +00:00
Chris Lattner
3a899dbbc8 unbreak the build 
llvm-svn: 26260
 2006-02-17 07:09:27 +00:00
Evan Cheng
330fd348ff Unbreak x86 be 
llvm-svn: 26259
 2006-02-17 07:01:52 +00:00
Chris Lattner
d5a4da466a Fix loops where the header has an exit, fixing a loop-unswitch crash on crafty 
llvm-svn: 26258
 2006-02-17 06:39:56 +00:00
Nate Begeman
fe88578402 Fix a comment sabre noticed :) 
llvm-svn: 26257
 2006-02-17 06:24:31 +00:00
Nate Begeman
c030319b43 A couple new regression tests to make sure we always pattern match the new 
opcodes on ppc.

llvm-svn: 26256
 2006-02-17 06:16:56 +00:00
Nate Begeman
9c0ab71f4a kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC 
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.

llvm-svn: 26255
 2006-02-17 05:43:56 +00:00
Chris Lattner
6632b8ab04 Fix another miscompilation exposed by lencode, where we lowered i64->f32 
conversions to __floatdidf instead of __floatdisf on targets that support
f32 but not i64 (e.g. sparc).

llvm-svn: 26254
 2006-02-17 04:32:33 +00:00
Chris Lattner
13dd179299 add note about div by power of 2 
llvm-svn: 26253
 2006-02-17 04:20:13 +00:00
Jeff Cohen
04caf92624 Fix bug noticed by VC++. 
llvm-svn: 26252
 2006-02-17 02:12:18 +00:00
Jeff Cohen
c6693dcdab Inform Visual Studio of deleted file. 
llvm-svn: 26251
 2006-02-17 02:11:34 +00:00
Nate Begeman
224405b002 Whoops, didn't mean to check this in yet. 
llvm-svn: 26250
 2006-02-17 00:56:19 +00:00
Nate Begeman
7269afbf38 Add a missing and useful pat frag 
llvm-svn: 26249
 2006-02-17 00:51:06 +00:00
Chris Lattner
e2286db8d8 start of some new simplification code, not thoroughly tested, use at your own 
risk :)

llvm-svn: 26248
 2006-02-17 00:31:07 +00:00
Evan Cheng
c7b32ddecc Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers" 
issue. Need to do more experiments.

llvm-svn: 26247
 2006-02-17 00:04:28 +00:00
Nate Begeman
b0ec087c0f Kill the x86 pattern isel. boom. 
llvm-svn: 26246
 2006-02-17 00:03:04 +00:00
Evan Cheng
3d0135afdc Remove the entry about using movapd for SSE reg-reg moves. 
llvm-svn: 26245
 2006-02-17 00:00:58 +00:00
Evan Cheng
9de0ad321a pxor (for FLD0SS) encoding was missing the OpSize prefix. 
llvm-svn: 26244
 2006-02-16 23:59:30 +00:00
Chris Lattner
585198f5a8 Remove the skeleton target, it doesn't produce useful code and there are 
other small targets that do that can be learned from.  They also have
the added advantage of being tested :)

llvm-svn: 26243
 2006-02-16 23:14:50 +00:00
Evan Cheng
a2433f32b4 Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it 
turns out not to point to a constant string but it forgot change the offset
back.

llvm-svn: 26242
 2006-02-16 23:11:42 +00:00
Evan Cheng
bf4008c701 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This 
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.

llvm-svn: 26241
 2006-02-16 22:45:17 +00:00
Evan Cheng
447c171afd Use movaps / movapd to spill / restore V4F4 / V2F8 registers. 
llvm-svn: 26240
 2006-02-16 21:20:26 +00:00
Chris Lattner
70d21494ed remove skeleton target 
llvm-svn: 26239
 2006-02-16 21:12:54 +00:00
Nate Begeman
0bc71999b9 Rework the SelectionDAG-based implementations of SimplifyDemandedBits 
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
 2006-02-16 21:11:51 +00:00
Chris Lattner
f45c17e51d don't build the skeleton target 
llvm-svn: 26237
 2006-02-16 21:11:49 +00:00
Chris Lattner
a13bad3d53 remove support for the skeleton target 
llvm-svn: 26236
 2006-02-16 21:10:57 +00:00
Chris Lattner
847c7ca438 Change SplitBlock to increment a BasicBlock::iterator, not an Instruction*. Apparently they do different things :) 
This fixes a testcase that nate reduced from spass.

Also included are a couple minor code changes that don't affect the generated
code at all.

llvm-svn: 26235
 2006-02-16 19:36:22 +00:00
Evan Cheng
af9730a217 MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg. 
llvm-svn: 26234
 2006-02-16 19:34:41 +00:00
Duraid Madina
3fcb00a53f distinguish between objects and register names, now we can have stuff 
with names like "f84", "in6" etc etc.

this should fix one or two tests

llvm-svn: 26232
 2006-02-16 13:12:57 +00:00